KR100341126B1 - LCD having high aperture ratio and high transmittance ratio and method for manufacturing the same - Google Patents

Abstract

The present invention discloses a high opening ratio and high transmittance liquid crystal display device and a method of manufacturing the same that can prevent a short between the data bus line and the counter electrode. The present invention discloses a lower substrate; A gate bus line extending in a predetermined direction on the lower substrate; A data bus line disposed on a lower substrate to intersect the gate bus line to define a unit pixel; A common signal line disposed in parallel with the gate bus line between the neighboring gate bus lines; A thin film transistor disposed at an intersection of the gate bus line and the data bus line; A pixel electrode in contact with the thin film transistor and disposed in the unit pixel space, respectively; And a counter electrode overlapping an upper portion of the pixel electrode, forming a fringe field together with the pixel electrode, and partially contacting the common signal line, wherein the pixel electrode and the counter electrode are made of a transparent material. . The counter electrode may include a plurality of branches parallel to the data bus line, and a bar contacting the common electrode line while connecting one end of the branch.

Description

High opening ratio and high transmittance liquid crystal display device and manufacturing method thereof {LCD having high aperture ratio and high transmittance ratio and method for manufacturing the same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to a high opening ratio and high transmittance liquid crystal display device and a method for manufacturing the same that can prevent a short between a counter electrode and a data bus line.

In general, a high aperture ratio and a high transmittance liquid crystal display (Fringe Field switching mode LCD) is proposed to improve the low aperture ratio and transmittance of a general IPS mode liquid crystal display, which is filed in Korean Patent Application No. 98-9243 have.

Such a high aperture ratio and high transmittance liquid crystal display device forms a counter electrode and a pixel electrode with a transparent conductor, and forms a gap between the counter electrode and the pixel electrode to be smaller than a gap between the upper and lower substrates, thereby forming a fringe field on the counter electrode and the pixel electrode. (fringe filed) is formed.

Such a high aperture and high transmittance liquid crystal display is shown in FIG. 1.

Referring to the drawings, the gate bus line 3 and the data bus line 7 are arranged on the lower substrate 1 so as to define unit pixels, and the intersection point of the gate bus line 3 and the data bus line 7. In the vicinity, a thin film transistor TFT is disposed.

The counter electrode 2 is a transparent conductor, is formed for each unit pixel, and has a rectangular plate shape. The counter electrode 2 is in contact with the common signal line 3a to receive a common signal continuously. The common signal line 3a extends in parallel with the gate bus line 3.

The pixel electrode 9 is formed in each of the unit pixel spaces so that the predetermined portion overlaps with the counter electrode 5. The pixel electrode 9 is parallel to the data bus line 7 and overlaps the counter electrode 5 formed on the counter electrode 5 at equal intervals, and the thin film transistor TFT is connected to one end of the comb portion 9a. And a second bar 9c overlapping the counter electrode 5 while connecting the first bar 9b and the other end of the comb portion 9a that are in contact with a predetermined portion of the first bar 9b.

Here, reference numeral CT denotes a contact portion between the counter electrode 5 and the common electrode line 3a.

Such a high aperture ratio and high transmittance liquid crystal display device is formed as follows.

That is, as shown in FIG. 2, an aluminum film having excellent signal conduction characteristics is formed on the lower substrate 1, and then patterned by a predetermined portion to form a gate bus line (not shown) and a common signal line 3a. . Thereafter, the gate insulating film 4 is deposited on the lower substrate 1 on which the gate bus line and the common signal line 3a are formed. Thereafter, the gate insulating film 4 is etched to form a contact hole so that a predetermined portion of the common signal line 3a is exposed, and then an indium tin oxide (ITO) layer is deposited on the gate insulating film 4. Thereafter, the ITO layer is partially patterned to form the counter electrode 5. Although not shown in the drawings, a process of forming a channel layer and an ohmic layer is performed between the step of forming the counter electrode 5 and the step of forming the gate insulating film 4.

At this time, the counter electrode 5 is formed on the gate insulating film 4 because the gate bus line and the common signal line made of an aluminum-based metal film react and corrode easily by the ITO etchant. This is to minimize the reaction with the gate bus line and the common signal line made of a metal film.

Thereafter, the metal film 7 is deposited on the gate insulating film 4, and the metal film 7 is patterned to be disposed on one side of the counter electrode 5, thereby forming the data bus line 7.

Then, the protective film 8 is deposited on the resultant product on which the data bus line 7 and the counter electrode 5 are formed. Subsequently, an ITO film is deposited on the passivation film 8 and the pixel electrode 9a is formed on the passivation film 8 so as to overlap the counter electrode 5.

In this manner, during the process of forming the counter electrode, the common electrode line and the gate bus line are not affected by the etchant of the counter electrode.

However, the above-described high aperture and high transmittance liquid crystal display has the following problems due to the counter electrode disposed on the gate insulating layer.

That is, since the counter electrode 5 is disposed above the gate insulating film 4, the counter electrode 5 is arranged on the same line as the data bus line 7. For this reason, in the process of forming the data bus line 7, residue of the data bus line 7 remains on the counter electrode 5 above. Accordingly, a short occurs between the data bus line 7 and the counter electrode 5, resulting in a line defect.

Accordingly, an object of the present invention is to provide a high opening and high transmittance liquid crystal display device and a method of manufacturing the same, which can prevent a short between the data bus line and the counter electrode.

In addition, an object of the present invention is to provide a high opening and high transmittance liquid crystal display device and a method of manufacturing the same that can minimize the reaction of the gate bus line and the common signal line by the etching solution of the counter electrode when forming the counter electrode.

1 is a plan view of a high aperture ratio and high transmittance liquid crystal display device according to the prior art;

FIG. 2 is a cross-sectional view taken along line II-II ′ of FIG. 1.

3 is a plan view of a high aperture ratio and high transmittance liquid crystal display according to an exemplary embodiment of the present invention.

4 is a cross-sectional view taken along the line IV-IV 'of FIG.

5 is a cross-sectional view of a high aperture ratio and high transmittance liquid crystal display for explaining another embodiment of the present invention.

(Explanation of symbols for the main parts of the drawing)

20-Bottom Board 21-Gate Bus Line

21a- Common signal line 22- Gate insulating film

25-pixel electrode 26-data bus line

27-shield 28-counter electrode

In order to achieve the above object of the present invention, the high aperture ratio and high transmission liquid crystal display device of the present invention comprises a lower substrate; A gate bus line extending in a predetermined direction on the lower substrate; A data bus line disposed on the lower substrate to define a unit pixel and intersect the gate bus line; A common signal line disposed in parallel with the gate bus line between neighboring gate bus lines; A thin film transistor disposed at an intersection of the gate bus line and the data bus line, respectively; A pixel electrode in contact with the thin film transistor and disposed in each unit pixel space; A passivation layer formed on the resultant data bus line and the pixel electrode and exposing the common electrode line; And a counter electrode overlapping the pixel electrode on the passivation layer, the counter electrode being in contact with the common electrode line exposed by the passivation layer. The method of manufacturing the high aperture ratio and high permeability liquid crystal display of the present invention includes a gate bus line on the lower substrate. And forming a common signal line; Forming a gate insulating layer on the lower substrate resultant; Forming a pixel electrode on the gate insulating film; Forming a data bus line on the resultant to intersect the gate bus line; Forming a passivation layer exposing a predetermined portion of the common electrode line on the substrate on which the pixel electrode and the data bus line are formed; And forming a counter electrode overlapping the pixel electrode on the passivation layer and contacting the common electrode line exposed by the passivation layer.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a plan view of a high aperture ratio and high transmittance liquid crystal display device according to an exemplary embodiment of the present invention, FIG. 4 is a cross-sectional view taken along the line IV-IV ′ of FIG. 3, and FIG. 5 is the present invention. It is sectional drawing of the high aperture ratio and the high transmittance liquid crystal display for demonstrating the other Example.

First, referring to FIG. 3, the gate bus line 21 extends in the x direction of the lower substrate 20, and the data bus line 26 is in the y direction substantially perpendicular to the gate bus line 21. Extends to form a rectangular unit pixel space. In this case, the gate bus line 21 is deposited with an aluminum-based metal film having excellent conductivity.

Thin film transistors TFT are disposed near intersections of the gate bus line 21 and the data bus line 26.

The common signal line 21a extends in parallel with the gate bus line 21 between a pair of neighboring gate bus lines 21. Here, the common signal line 21a and the gate bus line 21 are formed of the same material.

The pixel electrode 25 is formed in the unit pixel space in the unit pixel space, respectively. The pixel electrode 25 may be formed in a plate shape or a comb tooth shape as shown in FIG. 3.

The counter electrode 28 overlaps the pixel electrode 25. The counter electrode 28 is formed of a transparent material, and includes a plurality of branches 28a extending in parallel with the data bus line, and a bar 28b contacting a common signal line while connecting one end of the branch 28a. . At this time, the other end of the branch 28a may also be connected by another bar 28c.

In this embodiment, the pixel electrode 25 and the counter electrode 28 are formed of a transparent material so as to form a fringe field between the two electrodes, and the gap is formed to be narrower than the cell gap (the distance between the upper and lower substrates). The line widths of the counter electrode and the pixel electrode are such that the liquid crystal molecules on the electrode can be sufficiently moved by the fringe field.

Such a high aperture ratio and high transmittance liquid crystal display device is formed as follows.

3 and 4, an aluminum-based metal film is deposited on the substrate 20, and predetermined portions are patterned to form a gate, a bus line 21, and a common signal line 21a. Next, a gate insulating film 22 is deposited on the lower substrate 20 on which the gate bus line 21 and the common signal line 21a are formed. Thereafter, an indium tin oxide (ITO) layer is deposited on the gate insulating layer 22, and a predetermined portion is patterned to form the pixel electrode 25. At this time, a process of forming a channel layer and a process of forming an ohmic layer are performed between the step of forming the gate insulating film 22 and the step of forming the pixel electrode 25.

Thereafter, a metal film is deposited on the gate insulating film 22 on which the pixel electrode 25 is formed, and is partially patterned so as to be orthogonal to the gate bus line 21 while being in predetermined contact with the pixel electrode 25. 26) is formed.

Next, a passivation layer 27 is deposited on the resulting product on which the data bus line 26 and the pixel electrode 25 are formed. Thereafter, the passivation layer 27 and the gate insulating layer 22 are etched to expose the lower common signal line 22 surface, thereby forming contact holes. Thereafter, an ITO film is deposited to contact the common signal line 22 exposed on the passivation layer 27, and an ITO film is patterned to overlap the pixel electrode 25 under the passivation layer 27 to form a fringe field. Counter electrode 28a is formed.

Since the counter electrode 28 and the data bus line 26 are insulated with the passivation layer 27 interposed therebetween, the high aperture ratio and the high transmittance liquid crystal display of the present invention remain when the data bus line 26 is formed. Does not affect the counter electrode 28. Thus, a short between the data bus line 26 and the counter electrode 28 is prevented.

In addition, a gate insulating film 22 and a protective film 27 are interposed between the counter electrode 26 and the gate bus line (or common signal line), so that the common signal line and the gate bus line are influenced by an etchant for etching the counter electrode. Do not receive.

Although the pixel electrode is formed in a plate shape in this embodiment, the present invention is not limited thereto, and the same effect can be obtained even when the pixel electrode is formed in the shape of a comb as shown in FIG.

In addition, although the description about the alignment film, the polarizing plate, and the liquid crystal is omitted in the present embodiment, these are the same as the conventional high opening ratio and high transmittance liquid crystal display device.

As described in detail above, the counter electrode is formed on the passivation layer so as to overlap the pixel electrode and is in contact with the common signal line. As a result, a protective film is interposed between the counter electrode and the data bus line to ensure insulation.

In this way, shorting of the counter electrode is prevented, and line defects are prevented.

In addition, this invention can be implemented in various changes within the range which does not deviate from the summary.

Claims (4)

Lower substrate; A gate bus line extending in a predetermined direction on the lower substrate; A data bus line disposed on the lower substrate to define a unit pixel and intersect the gate bus line; A common signal line disposed in parallel with the gate bus line between the neighboring gate bus lines; A thin film transistor disposed at an intersection of the gate bus line and the data bus line; A pixel electrode in contact with the thin film transistor and disposed in the unit pixel space, respectively; A passivation layer formed on the data bus line and the resultant electrode on which the pixel electrode is formed and exposing the common electrode line; And And a counter electrode overlapping the pixel electrode on the passivation layer, the counter electrode contacting the common electrode line exposed by the passivation layer. The liquid crystal display of claim 1, wherein the counter electrode includes a plurality of branches parallel to the data bus line, and a bar contacting the common electrode line while connecting one end of the branch. . Forming a gate bus line and a common signal line on the lower substrate; Forming a gate insulating layer on the lower substrate resultant; Forming a pixel electrode on the gate insulating layer; Forming a data bus line on the resultant to intersect the gate bus line; Forming a passivation layer on the substrate on which the pixel electrode and the data bus line are formed to expose a predetermined portion of the common electrode line; And And forming a counter electrode on the passivation layer, the counter electrode overlapping the pixel electrode and contacting the common electrode line exposed by the passivation layer. 4. The liquid crystal display of claim 3, wherein the gate bus line and the common signal line forming material are aluminum-based metal layers.