KR100314219B1 - Apparatus for demultiplexing ATM cell of AAL5 type and converting ATM cell of AAL2' type to AAL2 type - Google Patents

Abstract

The present invention provides an AAL5 type ATM cell demultiplexing system that separates an ATM switched ATM cell into an AAL5 cell and an AAL2 'cell and restores an AAL2' cell to an AAL2 cell through an ATM switch in a base station controller of an IMT-2000 mobile communication system. And an AAL2 type ATM cell conversion apparatus. The present invention receives an AAL5 type ATM cell and an AAL2 'ATM cell transmitted from an ATM switch, and demultiplexes the AAL5 ATM cell into a plurality of E1 lines and AAL2'. Restore the ATM cell to an AAL2 ATM cell. At this time, only the voice data packet of one user is extracted from the input AAL2 'cell and continuously filled in one ATM cell to generate an AAL2 ATM cell. In this way, a single device handles AAL5 cell demultiplexing and AAL2 cell reconstruction of AAL2 'cells, thereby reducing device volume and enabling the use of AAL2 ATM cells for voice data processing.

Description

Apparatus for demultiplexing ATM cell of AAL5 type and converting ATM cell of AAL2 'type to AAL2 type}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a base station controller of a next generation mobile communication system (International Mobile Telecommunications-2000; IMT-2000), and in particular, an ATL 5 type (ATM Adaptation) transmitted from an Asynchrous Transfer Mode (ATM) switch. Layer 5 (AAL5) ATM cells and AAL2 'ATM cells are input to demultiplex AAL5 ATM cells and convert AAL2' ATM cells into AAL2 ATM cells, thereby implementing voice data processing. The present invention relates to an AAL5 type ATM cell demultiplexing and AAL2 type ATM cell conversion apparatus, which enables the use of an AAL2 ATM cell and enables the processing of an AAL5 ATM cell and an AAL2 'ATM cell simultaneously on one chip.

The AAL2 'type ATM cell is an ATM cell containing only one user's voice data in one cell so that the ATM switch can be switched in an ATM switch.

Currently, a technology for transmitting voice data in an ATM cell is widely known, and this is called VTOA (Voice Telephony Over ATM) in the ATM Forum. At this time, ATM cell type uses ATM Adaptation Layer (AAL) type 1 defined in ITU-T (International Telecommunication Union Telecommunication Standardization) Recommendation I.363.1 standard.

As such, voice data in a constant bit rate (CBR) format, that is, voice data, was transmitted through an ATM network in the form of an AAL 1 ATM cell. According to the VTOA, AAL1 is required to operate additional ATM networks such as Peak Cell Rate (PCR), Cell Loss Ratio (CLR), and Cell Delay Variation (CDV). There is data. As a result, additional bandwidth is required, and the operational data is continuously transmitted despite no traffic, thereby lowering the bandwidth usage efficiency.

And the AAL1 type should always transmit at the same bit rate, only one user data can be loaded in one ATM cell, and the voice signal should be determined as 64Kbps or multiple of 64Kbps (64Kbps * N). There was a problem in that it could not process compressed voice signals or silence.

Overcoming these shortcomings is the AAL2 ATM cell type shown in Figure 1, and the standard is defined in ITU-T Recommendation I.363.2.

As shown in Fig. 1, an AAL2 ATM cell is composed of a cell header of 5 bytes and a payload of 48 bytes. The payload consists of one byte of STF (STart Field) and 47 bytes of space to hold several Common Part Sublayer (CPS) packets. 1 shows an example of an AAL2 ATM cell, which contains four CPS packets. One byte of STF consists of a 6-bit Offset Field (OSF), a 1-bit Sequence Number (SN), and a 1-bit Parity (P). The OSF has an interval value from the STF to the first CPS packet. That is, if the length of the CPS packet is continuously added and the value exceeds 47 bytes, the remaining CPS packet length becomes the OSF value.

One CPS packet is variable and its length varies according to the characteristics of the voice data. The configuration is composed of a 3-byte CPS packet header and a maximum 45-byte CPS packet payload. Here, the first 8 bits of the three-byte CPS packet header are CID (Channel Identifier), the next 6 bits are LI (Length Indicator), the 5 bits are User to User Indication (UUI), and the remaining 5 bits are A cyclic redundancy check (CRC) value for 19 bits of. The CPS packet payload contains a variable voice signal of up to 45 bytes.

Attempts to carry voice in the form of AAL2 are increasing. The advantages of AAL2 are the ability to send variable voice data and the ability to put multiple users' data together in a single ATM cell. This allows for efficient use of bandwidth.

However, when adopting such AAL2, there is a problem that switching with a conventional commercial ATM switch is impossible. That is, a problem arises that the ATM switch cannot switch voice data of multiple users in the AAL2 ATM cell.

A solution proposed for this is the AAL2 'type ATM cell. As shown in Fig. 2, unlike the AAL2 ATM cell format, only one CPS packet is configured in the ATM cell payload. If the CPS packet is smaller than 48 bytes, '0' is inserted into the remaining payload. The configuration of the CPS packet is the same as that of AAL2.

Thus, this means that one ATM cell has only one CPS packet so that the ATM switch can be switched in an ATM switch.

However, a device for restoring such an AAL2 'type ATM cell back to an AAL2 type ATM cell is not implemented.

Accordingly, the present invention has been proposed by the necessity of the prior art as described above, and an object of the present invention is

By receiving the AAL5 type ATM cell and AAL2 'ATM cell transmitted from the ATM switch, demultiplexing the AAL5 ATM cell into four E1 lines and converting the AAL2' ATM cell into an AAL2 ATM cell. AAL2 ATM cell demultiplexing and AAL2 type ATM cell conversion apparatus, which enables the use of AAL2 ATM cells and allows the processing of AAL5 ATM cells and AAL2 'ATM cells simultaneously on a single chip.

In order to achieve the above object, the AAL5 type ATM cell demultiplexing and AAL2 type ATM cell conversion apparatus according to the present invention,

A transmission FIFO unit for performing an interfacing with the multiplexer of the IMT-2000 base station controller according to the UTOPIA level 1 standard and performing the temporal buffering function required for transmission to the E1 line;

A 1: 4 demultiplexer for demultiplexing an ATM cell transmitted from the transmission FIFO unit into four E1 line paths using a virtual channel identifier (VCI);

A plurality of AAL2 / 5 processors for separating the demultiplexed ATM cells into AAL5 ATM cells and AAL2 'ATM cells and restoring AAL2' ATM cells to AAL2 ATM cells in the 1: 4 demultiplexer;

A plurality of physical layer matching units which have a one-to-one correspondence with the AAL2 / 5 processor and buffer an ATM cell transmitted from the AAL2 / 5 processor;

The technical configuration is characterized by consisting of a 4: 1 multiplexer for multiplexing and outputting the ATM cells transmitted from the physical layer matching unit to the rear stage.

The AAL2 / 5 processor includes: a cell processor for separating an ATM cell inputted from the 1: 4 demultiplexer into an AAL5 ATM cell and an AAL2 'ATM cell using a VCI, and extracting a header of the last input cell of the AAL2' ATM cell; A CPS extraction unit for extracting a variable CPS packet from an AAL2 'ATM cell separated from the cell processor; An AAL2 cell recovery unit for restoring an AAL2 ATM cell with a cell header extracted from the cell processor, a header extracted from the CPS extractor, and a start field value; The AAL5 ATM cell separated from the cell processor and the AAL2 ATM cell recovered from the AAL2 cell recovery unit are multiplexed and transmitted to a corresponding physical layer matching unit.

1 is a diagram showing an AAL2 ATM cell type according to the ITU-T standard;

2 is a view showing an AAL2 'ATM cell form;

3 is a block diagram of an ATM cell multiplexing / demultiplexing apparatus of an IMT-2000 base station controller to which the present invention is applied;

4 is a block diagram of an AAL5 ATM cell demultiplexing and AAL2 ATM cell converter according to the present invention;

5 is a block diagram illustrating the internal configuration of the AAL2 / 5 processor of FIG. 4;

6 is a diagram illustrating an operation of extracting a CPS packet from an AAL2 'ATM cell and restoring it to an AAL2 ATM cell;

<Explanation of symbols for the main parts of the drawings>

100: Transmission FIFO part 200: 1: 4 demultiplexer

300-1 to 300-4: AAL2 / 5 processor 400-1 to 400-4: Physical layer matching unit

500: 4: 1 multiplexer

Hereinafter, the above-described AAL5 type ATM cell demultiplexing and AAL2 type ATM cell conversion apparatus of the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram of an ATM cell multiplexing / demultiplexing apparatus of an IMT-2000 base station controller to which the present invention is applied.

A plurality of E1 line interface units (LIUs) 10-13 that perform ATM physical layer functions and interface with E1 lines to the base station; A UTOPIA function performing unit 20-23 corresponding to the E1 line matching unit 10-13 one to one to perform a universal test and operations physical interface for ATM (Utopia) layer 1 (level 1) interface; A plurality of type conversion units (30-33) for performing a type conversion interface function so that ATM cells between the UTOPIA function performing unit (20-23) and an ATM switch can be ATM switched; A multiplexer (40) for multiplexing the ATM cells from the type conversion section (30-33); ATM cell routing unit (cubit) 50 for matching the ATM cell transmitted from the multiplexer 40 to the ATM cell bus.

Although not shown in FIG. 3, a processor is configured to control the overall operation of the ATM cell multiplexing / demultiplexing apparatus of the IMT-2000 base station controller.

The ATM cell multiplexing / demultiplexing apparatus of the IMT-2000 base station controller can handle all 16 channels. The AAL2 'ATM cell transmitted from the ATM switch is divided into four groups through the ATM cell routing unit 50 and the multiplexer 40. That is, all of them are divided into four groups, and each of the four channels is input to the type converter 30-33. Therefore, after the AAL5 demultiplexing function and the AAL2 cell type conversion function are performed in the AAL5 cell demultiplexing / AAL2 cell type conversion apparatus according to the present invention, the E1 line matching unit 10-13 is passed through the UPOPIA function performing unit 20-23. Is transmitted to the base station through.

Each type conversion unit 30-33 is equipped with an AAL5 type ATM cell demultiplexing and an AAL2 type ATM cell conversion device according to the present invention, the configuration of which is shown in FIG.

The present invention comprises: a transmission FIFO unit (100) for performing an interface with the multiplexer (40) and a UTOPIA level 1 standard and performing a temporal buffering function required for transmission on an E1 line; A 1: 4 demultiplexer (200) for demultiplexing ATM cells transmitted from the transmission FIFO unit (100) into four E1 line paths using a virtual channel identifier (VCI); An AAL2 / 5 processor (300-1 to 300-4) for separating the demultiplexed ATM cell into an AAL5 ATM cell and an AAL2 'ATM cell and restoring the AAL2' ATM cell to an AAL2 ATM cell in the 1: 4 demultiplexer 200; ; A plurality of physical layer matching units 400-1 to 400-4 corresponding to the AAL2 / 5 processors 300-1 to 300-4 and buffering ATM cells transmitted from the AAL2 / 5 processors; It consists of a 4: 1 multiplexer 500 for multiplexing the ATM cells transmitted from the physical layer matching units 400-1 to 400-4 and transmitting the multiplexed ATM cells to a corresponding UTOPIA function performing unit.

As shown in FIG. 5, the AAL2 / 5 processors 300-1 to 300-4 use an AAL5 ATM cell and an AAL2 'ATM as an ATM cell input from the 1: 4 demultiplexer 200 using VCI. A cell processor 310 for separating into cells and extracting a header of the last input cell of the AAL2 'ATM cell; A CPS extracting unit (320) for extracting a variable CPS packet from the AAL2 'ATM cell separated by the cell processor (310); An AAL2 cell recovery unit (330) for restoring an AAL2 ATM cell with the cell header extracted from the cell processor (310), the header extracted from the CPS extractor (320), and a start field value; 2: 1 for multiplexing the AAL5 ATM cell separated by the cell processor 310 and the AAL2 ATM cell restored by the AAL2 cell recovery unit 330 and transmitting the multiplexed AAL5 ATM cell to the corresponding physical layer matching units 400-1 to 400-4. It consists of a multiplexer 340.

The cell processor 310 separates an AAL5 ATM cell from the 1: 4 demultiplexer 200 into an AAL5 ATM cell and an AAL2 'ATM cell by identifying a VCI, and splits the AAL5 ATM cell into the 2: 1 multiplexer 340. A VCI identification unit 311 for transmitting to the terminal; The cell header extractor 312 extracts a header of the last input AAL2 'ATM cell among the AAL2' ATM cells separated by the VCI identification unit 311 and provides the header to the AAL2 cell recovery unit.

The AAL2 cell recovery unit 330 may include: a CPS buffer 331 for buffering the CPS packets extracted by the CPS extraction unit 320; An STF generator 332 for generating a start field value of the AAL2 ATM cell; The AAL2 cell header generator 333 generates a cell header value extracted by the cell processor 310 as a header value of an AAL2 ATM cell.

Referring to the operation of the AAL5 type ATM cell demultiplexing and AAL2 type ATM cell conversion apparatus according to the present invention as follows.

First, the AAL2 'ATM cell input through the upper multiplexer 40 is input to the transmission FIFO unit 100. The transmission FIFO unit 100 has a FIFO structure capable of storing four ATM cells, and processes the cell data from the cell bus transmitted asynchronously, and transmits the cell data as much as the time required for transmission to the E1 line. Buffer

The buffered ATM cells are thus divided into four channels using the VCI [9] [8] of the ATM cell header in the internal 1: 4 demultiplexer 200, and each divided data is divided into AAL2 / 5 processors (300-). 1 to 300-4) are input to the corresponding AAL2 / 5 processor. At this time, the AAL2 'cell is not distinguished from the AAL5 cell, and the VCI [9] [8] values are determined as 00, 01, 10, and 11, respectively, and transmitted to the corresponding AAL2 / 5 processor.

The AAL2 / 5 processor 310 divides the received ATM cell into an AAL5 ATM cell and an AAL2 'ATM cell. The AAL5 ATM cell passes and the AAL2 'ATM cell extracts the CPS packets in the cell and stores them in its own memory. The AAL2 ATM cell is configured according to a format conforming to the AAL2 standard, and then the AAL5 ATM cell and the AAL2 ATM cell are output to the corresponding physical layer matching unit through the 2: 1 multiplexer 340.

Then, the physical layer matching unit 400-1 has four FIFOs. When one cell of 53 bytes is ready for transmission, a 'ready' signal indicating that it is ready to be transmitted to the 4: 1 multiplexer 500 is provided. Send. In this case, the 4: 1 multiplexer 500 transmits an acknowledgment signal 'ready_i' signal indicating that the cell data may be transmitted to the physical layer matching unit 400-1. Accordingly, the physical layer matching unit 400-1 transmits the prepared ATM cell to the 4: 1 multiplexer 500.

The 4: 1 multiplexer 500 outputs four input ATM cells to the corresponding UTOPIA function performing unit by priority scheduling. That is, by multiplexing using a method of outputting in order of high priority, processing can be performed even when multiple inputs are input at the same time.

Here, the operation of the AAL2 / 5 processors 300-1 to 300-4 will be described in more detail. The VCI identification unit 311 uses the VCI of the cell header to transfer the ATM cell from the 1: 4 demultiplexer 200 to the AAL5. Separate into cell and AAL2 'cell. In this case, the cell may be separated using the VCI [7: 1] value, and the cell may be separated using the VCI [15:14]. This allows pins to be externally available for optional use.

Therefore, the VCI identification unit 311 passes the separated AAL5 cell to the 2: 1 multiplexer 340, and transmits the AAL2 'cell to the CPS extraction unit 320. At this time, the cell header extractor 312 extracts and copies the header of the last input cell (the most recent input cell) among the AAL2 'cells.

The CPS extractor 320 receives the AAL2 'cells separated by the cell processor 310, and extracts only the CPS packets having a variable length, as shown in FIG. That is, the CPS packet is extracted by reading and decoding a 6-bit LI value (having one octet value less than the CPS packet payload) of the 3-byte header of the CPS packet.

Then, the AAL2 cell header generator 333 of the AAL2 cell restorer 330 generates the header of the AAL2 cell using the header extracted from the cell header extractor 312, and the STF generator 332 generates the STF field of the AAL2 cell. Create The STF generation unit 332 continuously adds the lengths of the CPS packets, and if the value exceeds 47 bytes, the remaining CPS packet lengths are set as OSF values, and the SNs are generated as '0' without using SN. After performing an exclusive OR (XOR) operation on 6-bit OSF and 1-bit SN, '1' and XOR are performed to generate 1-bit P. Thus, 8 bits of STF are generated so that they are always odd values.

When the 8-bit STF is generated as described above, CPS packet data is received in the input order through the CPS buffer 331 to generate a 53-byte AAL2 cell. At this time, the AAL2 cell recovery unit 330 fills the remaining payload with '0' to make a 53-byte AAL2 cell if no CPS packet is input for a predetermined time (about 2 ms), and then performs a 2: 1 multiplexer 340. )

When the AAL5 cell is processed, the AAL2 cell recovery unit 330 temporarily holds the operation.

When the AAL5 cell is separated from the cell processor 310 or the AAL2 cell is restored from the AAL2 cell recovery unit 330, the 2: 1 multiplexer 340 multiplexes the ATM cell into one data line to provide a physical layer matching unit. Will be sent.

When the AAL5 type ATM cell demultiplexing and AAL2 type ATM cell conversion apparatus according to the present invention transmit voice data in the form of AAL2 'ATM cell in the ATM switch, the AAL5 type ATM cell demultiplexer recovers the AAL2 cell and transmits it to the corresponding E1 line, and in the form of AAL5 ATM cell. When transmitted, it demultiplexes and demultiplexes to the corresponding E1 line.

As described above, the AAL5 type ATM cell demultiplexing and the AAL2 type ATM cell conversion apparatus according to the present invention are FPGAs mounted in an IMT-2000 base station controller based on ATM, and are switched from an ATM switch to an ATM cell. When transmitted, the ATM cells are demultiplexed with the corresponding E1 line path and the AAL5 cells are bypassed by separating the AAL5 cells and AAL2 'cells from the demultiplexed ATM cells, and the AAL2 cells are restored to the AAL2 cells, thereby providing the AAL5 cells and the AAL2' cells. The cells can be processed simultaneously, reducing the system volume.

In addition, since the AAL2 'cell can be restored to the AAL2 cell, voice data can be efficiently transmitted without wasting bandwidth in the form of an ATM cell.

Claims (4)

In the base station controller of the IMT-2000 mobile communication system, A transmission FIFO unit performing a temporal buffering function to transmit an ATM switched ATM cell to an E1 line in an ATM switch of the base station controller; A 1: 4 demultiplexer for demultiplexing the ATM cells buffered in the transmission FIFO unit into four E1 line paths using a virtual channel identifier (VCI); A plurality of AAL2 / 5 processors for separating the demultiplexed ATM cells into AAL5 ATM cells and AAL2 'ATM cells and restoring AAL2' ATM cells to AAL2 ATM cells in the 1: 4 demultiplexer; A plurality of physical layer matching units which have a one-to-one correspondence with the AAL2 / 5 processor and buffer an ATM cell transmitted from the AAL2 / 5 processor; An AAL5 type ATM cell demultiplexing and AAL2 type ATM cell converting apparatus, comprising: a 4: 1 multiplexer for multiplexing and outputting an ATM cell transmitted from the physical layer matching unit to a rear stage. The method of claim 1, wherein the AAL2 / 5 processor, A cell processor for separating an ATM cell input from the 1: 4 demultiplexer into an AAL5 ATM cell and an AAL2 'ATM cell using a VCI, and extracting a header of the last input cell of the AAL2' ATM cell; A CPS extraction unit for extracting a variable Common Part Sublayer (CPS) packet from an AAL2 'ATM cell separated from the cell processor; An AAL2 cell recovery unit for restoring an AAL2 ATM cell with a cell header extracted from the cell processor, a header extracted from the CPS extractor, and a start field value; AAL5 type ATM cell demultiplexing and AAL2 type, comprising a 2: 1 multiplexer for multiplexing the AAL5 ATM cell separated from the cell processor and the AAL2 ATM cell recovered from the AAL2 cell recovery unit and transmitting the multiplexed AAL5 ATM cell to the corresponding physical layer matching unit. ATM cell converter. The method of claim 2, wherein the cell processor, A VCI identification unit for identifying the VCI from the 1: 4 demultiplexer, separating the ACI5 ATM cell and the AAL2 'ATM cell, and transmitting the AAL5 ATM cell to the 2: 1 multiplexer; AAL5 type ATM cell demultiplexing and AAL2 type ATM, comprising: a cell header extractor configured to extract a header of the last input AAL2 'ATM cell among the AAL2' ATM cells separated from the VCI identification unit and provide the header to the AAL2 cell recovery unit; Cell converter. The method of claim 2, wherein the AAL2 cell recovery unit, A CPS buffer for buffering the CPS packets extracted by the CPS extractor; An STF generation unit for generating a start field value of an AAL2 ATM cell; An AAL5 type ATM cell demultiplexing and AAL2 type ATM cell converting apparatus, comprising: an AAL2 cell header generation unit configured to generate a cell header value extracted from the cell processor as a header value of an AAL2 ATM cell.