KR100287418B1 - Main Control Unit of Host Digital Terminal in Demand-Density Optical Subscriber Transmitter - Google Patents

Abstract

The present invention relates to a main control device of a host digital terminal in a demand dense optical subscriber transmission device.

Of the components constituting the present invention, the microprocessor unit is responsible for the overall control of each component of the main control device using a predetermined microprocessor, and the state and control register unit stores the state and control data of the main control device In this case, the status information can be displayed on the display device.

The LAN matching unit serves to interface the Ethernet port with the microprocessor unit, the serial communication unit connects the microprocessor unit and the operation terminal to each other by serial data communication, and the interprocessor communication processing unit is the microprocessor unit. And microprocessors of other functional units in the host digital terminal to communicate with each other.

On the other hand, the ATM cell bus, which is the transfer path of the ATM cell, is connected to the main control device through the first cell bus connection part and the second cell bus connection part. A predetermined OAM function is performed, and the operational communication processor performs a function of communicating with the optical terminator (ONU) using an ATM cell input / output through the second cell bus connection unit.

Description

A Main Control Unit of Host Digital Terminal in Fiber Loop Carrier-Curb Systems

The present invention relates to a main control device of a host digital terminal in a demand dense optical subscriber transmission device, and more particularly, to a demand dense optical subscriber transmission device (hereinafter referred to as a Fiber Loop Carrier-Curb System: FLC-C system). The present invention relates to a main control unit (MCU), which is a device that performs overall control and management functions for a host digital terminal (HDT).

Conventionally, as the use of voice information and a computer has become common, an integrated services digital network (ISDN) using a digital communication method has been proposed and used as a method of integrating and communicating data information. Although coaxial cable has been used, coaxial cable has a problem in that it is not possible to secure a bandwidth required for high-speed data communication or image information communication, which is rapidly expanding demand.

As a solution to this problem, optical communication methods have been devised and used, and optical communication networks have been extended to all sections of the communication section. The device to realize this is the FLC-C system.

1 is a configuration diagram of the FLC-C system 200, the FLC-C system 200 is a service transmission platform of the FTTC (Fiber To The Curb) method, providing a variety of services, such as home-shopping, games, movies The service providers 130 are connected to the subscribers 140 through the host digital terminal 210 (HDT) and the optical end device 220 (Optical Network Unit) constituting the ATM switch 100 and the FLC-C system 200. To provide services.

Here, the host digital terminal 210, which is a component of the FLC-C system 200, is a device installed in a telephone station, and is based on asynchronous transfer mode (ATM) based on the DS1 and DS1E signals and the broadband switching network. The signal is connected, integrated-multiplexed into the synchronous digital hierarchy, and then optically transmitted to the optical terminator 220 (ONU), which is a power device, and vice versa.

The host digital terminal 210 is an ATM transmit / receive unit (211,212: ATM Transmit Receive Unit), ATM cell transmission path of the ATM cell bus 213, an optical transmit and receive unit (214: Optical Transmit Receive Unit), DS1E processing unit (215 ), And the main controller 216 (MCU).

At this time, two ATM transmission / reception units 211 and 212 are generally mounted on one host digital terminal 210, and four synchronous transport modules-1 (STM−) each having a transmission rate of 155.52 Mbps from the ATM switch 100. After receiving the 1: Synchronous Transport Module-1) signal and processing the overhead included in the STM-1 signal, the ATM cell is extracted and sent to the ATM cell bus 213 or vice versa.

The optical transmission / reception unit 214 is generally composed of eight, and one optical transmission / reception unit 214 is connected to two optical terminators, so that it is connected to a total of 16 optical terminators (ONU). The optical transmitting / receiving unit 214 receives ATM cells through the ATM cell bus 213 to make an STM-4 class optical signal (622.08 Mbps) and transmits the same to the optical terminator (ONU) or performs the reverse function.

The DS1E processing unit 215 is usually composed of eight cards, which accepts 12 DS1E signals from a public switched telephone network (PSTN) or a dedicated network, maps them to the ATM payload space, and then maps the ATM cell bus 213. A function of sending to the optical transmission / reception unit 214 and its reverse function is performed.

In addition, the optical termination unit (ONU) is installed in a distribution center in a dense residential area such as an apartment complex to separate subscriber signals from STM-4 class optical signals received from the host digital terminal 210 (HDT) according to service. It is a device that performs the function provided to the subscriber and its reverse function.

On the other hand, the host digital terminal 210 performs the overall management, control, communication with the optical termination device of the FLC-C system 200, and also the status of each functional unit connected to the host digital terminal 210 You need a device to manage it.

Therefore, the present invention has been made to meet the above needs, and is mounted on the host digital terminal 210 of the FLC-C system 200, the overall management, control, optical termination device of the FLC-C system 200 and The main purpose of the main control device of the host digital terminal in the device for managing the status of each functional unit connected to the host digital terminal 210, that is, the demand-density optical subscriber transmission device for performing the communication function of the have.

In order to achieve the above object, in the high-density optical subscriber transmission device according to the present invention, the main control device of the host digital terminal includes a microprocessor unit for controlling each component of the main control device; A status and control register section for storing state information and control data of the main control device so as to display status information on a display device; A LAN matching unit for interfacing an Ethernet port with the microprocessor unit; A serial communication unit which connects the microprocessor unit and a predetermined operation terminal to each other by serial data communication; An interprocessor communication processor configured to allow the microprocessor of the microprocessor unit and other functional units in the host digital terminal to perform interprocessor communication (IPC); A first cell bus connection part and a second cell bus connection part connected to the ATM cell bus to exchange signals in predetermined ATM cell units; An operation maintenance function unit configured to perform a predetermined OAM function on an ATM cell input / output through the first cell bus connection unit; And an operation communication processing unit 390 for exchanging data with a predetermined optical end device ONU using an ATM cell input / output through the second cell bus connection unit.

At this time, the microprocessor unit a predetermined microprocessor; A ROM in which the initial operation program and data of the main controller are permanently stored, a DRAM for storing data generated when the main controller is operated, and predetermined data among data input and output from the serial communication unit. Memory means configured of nonvolatile RAM (NVRAM) for permanent storage of the data; Receiving address data from an address bus of the microprocessor and generating a chip select signal for each of the components used in the main controller, and controlling the DRAM. An address decoder and a DRAM controller; And a dynamic bus size adjusting unit which adjusts the size of the data input / output bus of the microprocessor to be used by a predetermined peripheral device.

1 is a block diagram of a demand-density optical subscriber transmission device,

2 is a block diagram of a main control device according to the present invention;

3 is a configuration diagram of the microprocessor unit.

* Explanation of symbols for main parts of the drawings

100: ATM exchanger 200: demand dense optical subscriber transmission device

210: host digital terminal (HDT) 211, 212: ATM transmit / receive unit (ATRU)

213: ATM cell bus 214: optical transceiver unit (OTRU)

215: main control unit (MCU) 220: optical termination unit (ONU)

310: microprocessor unit 311: microprocessor

312: ROM 313: Address Decoder and DRAM Control Unit

314: DRAM 315: dynamic bus size control

316: non-volatile RAM (NVRAM) 317, 318: buffer

320: status and control register section 330: LAN matching section

340: serial communication unit 350: interprocessor communication processing unit

360: first cell bus connection 370: second cell bus connection

380: operation maintenance function unit 390: operation communication processing unit

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2 is a block diagram of the main control device of the demand-density optical subscriber transmission device according to the present invention, which includes a microprocessor unit 310, a status and control register unit 320, a LAN matching unit 330, and a serial communication unit ( 340, an interprocessor communication processing unit 350, a first cell bus connection unit 360, a second cell bus connection unit 370, an operation maintenance function unit 380, and an operation communication processing unit 390.

At this time, the microprocessor unit 310 performs a function of controlling each component constituting the main controller 215 using a predetermined microprocessor.

3 is a configuration diagram of the microprocessor unit 310, and includes a microprocessor 311 (CPU), a ROM 312: ROM, an address decoder and a DRAM controller 313, a DRAM 314, and a dynamic bus size controller 315. ), Nonvolatile RAM 316 (NVRAM), and buffers 317 and 318.

The ROM 312: ROM is a component in which programs and data necessary for the initial operation of the main controller 215 are permanently stored, and the DRAM 314 stores data generated when the main controller 215 operates. Function as a memory device. The nonvolatile RAM 316 (NVRAM) is a RAM used to permanently store predetermined data among data input and output from the serial communication unit 340 and may store various important data even when the power is turned off.

The address decoder 313 receives address data from the address bus of the microprocessor 311 and uses a high-order 16-bit address to generate a chip select signal for each component used in the main controller 215. ) At this time, there may be a case where an internal source is accessed and another unit is accessed for inter processor communication (IPC). In addition, the DRAM controller 313 controls the DRAM 314 by performing a function of multiplexing an address, a function of generating a Low Address Strob / Column Address Strob (RAS / CAS) signal, and a refresh function of the DRAM.

The dynamic bus size adjuster 315 is a component for connecting a microprocessor 311 operating in 32 bits and a peripheral device of 8 bits or 16 bits. That is, since there are 8 bits and 16 bits in addition to 32 bits among the internal and external resources accessed by the main controller 215, the main controller 215 is used to freely access internal and external resources. 340, the interprocessor communication processing unit 350, the operation maintenance function unit 380, the first cell bus connection unit 360, and the second cell bus connection unit 370 are sized buses (PA [1 ... 0], DSD [31..16]) to connect to the microprocessor unit 310.

Meanwhile, the level used in the interrupt handler uses two levels of level 6 (MFP1) and level 5 (MFP2), and these interrupts are collected and delivered to the microprocessor 310.

The status and control register unit 320 is composed of registers that store predetermined state information and control information of the FLC-C system 200, and predetermined alarm-related state information is output to an LED unit (not shown). By turning on the LED, the user can easily check the current status.

Specifically, the status and control register unit 320 inputs and outputs data through the data bus D [31..0] of the microprocessor 310, and the status register is mounted on the host digital terminal 210. It stores data for indicating the power failure and mounting / detaching status of the functional units, and the control register is used to control the corresponding LED of the LED part, and the fault, emergency alarm, major alarm, general alarm, loopback, optical termination device ( ONU) Displays alarm, alarm history display and audible alarm cut off.

The LAN matching unit 330 functions to interface an Ethernet port with the microprocessor unit 310.

Specifically, LAN data input through an Ethernet port processes a function of a physical layer in a predetermined Ethernet matching unit (not shown), and processes a MAC layer in a LAN controller (not shown). . The LAN controller stores the data in a predetermined local memory using its direct memory access (DMA) function, and then raises an interrupt to the microprocessor 311 to transmit a reception state of data. The microprocessor 311 reads and processes data of the corresponding local memory.

On the other hand, the LAN data in the transmission direction proceeds in the reverse order of reception. That is, the microprocessor 311 writes data to the local memory and then transmits the existence of data to be transmitted by setting a specific register of the LAN controller. Then, the LAN controller reads data from a specific address of the local memory and then performs a corresponding protocol process to transmit the data.

At this time, since the Ethernet identification number (ID) is important information, it is recorded in the nonvolatile RAM (316: NVRAM).

The serial communication unit 340 connects the microprocessor unit 310 and a predetermined operation terminal to each other by serial data communication. That is, it is possible to connect to CIT (Craft Interface Terminal) and debug using RS232C connection port.

The address data of the serial communication unit 340 is received from the address bus A [31..0] of the microprocessor 311, and the serial communication data is controlled by the data bus DSD controlled by the dynamic bus size adjusting unit 315. (31..16)) is transmitted and received with the microprocessor unit 310.

The interprocessor communication processor 350 enables the microprocessor of the microprocessor unit 310 and the other functional units 211, 212, 214, and 216 in the host digital terminal 210 to perform interprocessor communication (IPC) with each other. .

At this time, the IPC address bus and the IPC control bus are connected to the address bus A [31..0] of the microprocessor 311 through a predetermined buffer, and the IPC data bus is controlled by the dynamic bus size adjusting unit 315. The data bus (DSD [31..16]).

The inter-processor communication (IPC) that occurs in the inter-processor communication processor 350 is largely implemented in two ways. First, in the case of ATM transceivers 211 and 212 (ATRU), since a processor exists inside the device, dual port RAM (DPRAM) is used for inter-processor communication. However, for other functional units without a processor, the main controller 215 directly accesses the resources inside each unit.

The first cell bus connection unit 360 and the second cell bus connection unit 370 are connected to the ATM cell bus 213 to transmit and receive signals in a predetermined ATM cell unit, so that the main controller 215 is connected to the ATM cell unit unit. Allows you to send and receive signals.

At this time, the first cell bus connection unit 360 transfers the IPC cell and the OAM cell received from the ATM cell bus 213 to the operation maintenance function unit 380 or is received from the operation maintenance function unit 380. The OAM cell is delivered to the ATM cell bus 213.

On the other hand, if the cell received through the ATM cell bus 213 is a general user cell (HDT-ONU communication cell), the second cell bus connection unit 370 removes the routing header from the received user cell, and then the operation communication processor ( 390, and if the loopback cell (loopback) cell, it loops back inside the second cell bus connection 370 and transmits back to the ATM cell bus (213).

The operation maintenance function unit 380 performs a predetermined maintenance function (loopback, continuity check) on the ATM cell input / output through the first cell bus connection unit 360.

That is, an OAM cell to perform a corresponding operation maintenance function is generated and transmitted to the ATM cell bus 213 through the first cell bus connection unit 360, or the OAM cell received from the ATM cell bus 213 is analyzed and corresponding. Perform maintenance management.

The operational communication processor 390 receives a control RAM for storing control data of an ATM adaptive layer-5 (AAL5) reception processing function, a packet RAM for storing received data, and a control RAM of the control RAM. The ATM cell assembly and disassembly unit generates an ATM cell by assembling an ATM cell or generating a message by dividing a message received in a packet RAM according to control data of a control RAM, and through a second cell bus connection unit 370. By using input / output ATM cell, it exchanges necessary information with the corresponding optical end device (ONU).

Specifically, operational communication means communication between the host digital terminal 210 and the optical end device (ONU), and is a Transmission Control Protocol / Internet Protocol (TCP / IP) over an ATM adaptation layer-5 (AAL5) protocol. Use

In the case of data reception, it is made through a cell segmentation and reassembly (SARA), a second cell bus connection 370 (CUBIT), and an ATM cell bus 213, which are inputted from the ATM cell bus 213. The data is first stored in a predetermined packet memory through the second cell bus connection unit 370 (CUBIT) and the cell disassembly and reassembly unit. The cell disassembly and reassembly unit transmits the reception of data to the microprocessor 311 through an interrupt, and the microprocessor 311 raises the upper part for TCP / IP protocol processing.

On the other hand, in the case of data transmission, a method different from that of reception is used.

That is, data to be transmitted is inserted from the local RAM through the control cell path of the second cell bus connection unit 370 (CUBIT), and a predetermined Tx Request Register of the second cell bus connection unit 370 (CUBIT) is inserted. Set and send.

Using the present invention as described above, the host constituting the FLC-C system 200 by independently performing the operation maintenance processing function, the operation communication with the optical end device, and the inter-processor communication (IPC) function The digital terminal 210 can be effectively controlled.

Claims (2)

A main control device for controlling a host digital terminal (HDT) of a predetermined demand-density optical subscriber transmission device including an ATM cell bus which is a transmission path of an asynchronous transmission mode cell (ATM cell), each of the main control devices. Micro processor unit for controlling the component; A status and control register section for storing state information and control data of the main control device so as to display status information on a display device; A LAN matching unit for interfacing an Ethernet port with the microprocessor unit; A serial communication unit which connects the microprocessor unit and a predetermined operation terminal to each other by serial data communication; An interprocessor communication processor configured to allow the microprocessor of the microprocessor unit and other functional units in the host digital terminal to perform interprocessor communication (IPC); A first cell bus connection part and a second cell bus connection part connected to the ATM cell bus to exchange signals in predetermined ATM cell units; An operation maintenance function unit configured to perform a predetermined OAM function on an ATM cell input / output through the first cell bus connection unit; And Demand dense optical subscriber transmission device comprising an operation communication processing unit 390 for exchanging data with a predetermined optical end device ONU using an ATM cell input / output through the second cell bus connection unit. The main controller of the host digital terminal. The method of claim 1, wherein the microprocessor unit A predetermined microprocessor; A ROM in which the initial operation program and data of the main controller are permanently stored, a DRAM for storing data generated when the main controller is operated, and predetermined data among data input and output from the serial communication unit. Memory means configured of nonvolatile RAM (NVRAM) for permanent storage of the data; Receiving address data from an address bus of the microprocessor and generating a chip select signal for each of the components used in the main controller, and controlling the DRAM. An address decoder and a DRAM controller; And The main controller of the host digital terminal in the demand-density optical subscriber transmission device, characterized in that it comprises a dynamic bus size adjusting unit for adjusting the size of the data input and output bus of the microprocessor so that a predetermined peripheral device can be used.