KR100272706B1 - Circuit for controlling data transfer rate - Google Patents

Abstract

PURPOSE: A device for controlling a data transmission speed in a D-VHS(Digital-Video Home System), is provided to perform RS ECC(Reed-Solomon Error Correction Code) for digital compression data to record/reproduce the data in a tape, and to control a data transmission speed and allocate a memory bus, so as to transmit data having mutually different speeds. CONSTITUTION: A main data processing unit(A) receives the first frequency of main data from a set top box(10) to generate the second frequency of main data, when recording data in a tape or in a recording operation. And the main data processing unit(A) receives the second frequency of main data to supply the first frequency to the set top box(10), when reproducing data recorded in the tape or in a reproducing operation. A sub data processing unit(B) generates the second frequency of sub data in the recording operation, and generates the fourth frequency of sub data in the reproducing operation. A track format data processing unit(C) receives the second frequency of track format data for recording in a tape(160) in the recording operation, and receives the second frequency of track format data recorded in the tape(160) to generate the second track format data in the reproducing operation. A DRAM(Dynamic RAM)(90) stores the second frequency of digital compression data multiplexed from the first SRAM(Static RAM)(40) and the second SRAM(50), and the second frequency of sub code data supplied from the third SRAM(80), in the recording or reproducing operation. An RS CODEC(Reed-Solomon Coder-Decoder)(100) receives the second frequency of digital compression data stored in the DRAM(90), to correct error information, in the recording or reproducing operation. And a controller(170) controls each unit, in the recording or reproducing operation.

Description

Data transfer rate control device in D-HS

The present invention relates to a data transmission rate control apparatus in D-VHS, and more particularly, to data transmission for recording and reproducing, recording, and reproducing a tape on a tape by performing RS ECC (Reed-Solomon Error Correction Code) on digital compressed data and sub data. It relates to a speed control device.

Digital Video Home System (D-VHS) is a new digital data recording technology based on the Video Home System (VHS), one of the world's most popular home video formats. In April 1995, the technical standard of digital VHS Standard (STD) mode was completed through technical agreement between Hitachi, Matsushita Electric, and Philips. D-VHS not only performs existing VHS functions, but also records digital data transmitted through digital broadcasting such as DVB and DSS, and reproduces original data immediately before recording. Digital VHS is a bit stream recording / reproducing apparatus having a function of storing and outputting to tape without providing compressed or processed data. Digital VHS uses a generalized ferric oxide tape (S-VHS) to provide 7 hours for input data rates of 14.1 Mbps with high stability and price competitiveness, and 14 hours for 7 Mbps for long playback modes. Can be stored. It is a 44-gigabyte, suited-capacity, with very high recording density and price competitiveness compared to DVD, RAM, HDD, and Mo's DSM (Data Storage Media).

Applications include video servers, safety surveillance, data record storage media, and the like.

In other words, the D-VHS system provides the features of the existing VHS, while at the same time describing the needs of multimedia applications, the new VHS technology provides a bitstream recording capability that allows the recording of compressed data such as digital broadcasting. . In other words, D-VHS can be used in new applications such as home digital data storage, which is expected in the future, by including most of the advantages of tape media, such as high capacity and low cost.

Accordingly, an object of the present invention is to perform a Reed-Solomon Error Correction Code (RS ECC) and to record / reproduce data on a digitally compressed data in D-VHS, and to control a data transfer rate to allocate a memory bus to each other. It is an object of the present invention to provide a data transfer rate control device suitable for recording / reproducing digital compressed data capable of smoothly transferring data having a rate.

1 illustrates a memory data transmission rate control apparatus for RS ECC in D-VHS according to an embodiment of the present invention.

FIG. 2 is a diagram for describing in detail an operation of recording data to tape in FIG. 1.

FIG. 3 is a diagram for explaining an operation of reproducing data from a tape in FIG. 1 in detail.

<Description of the symbols for the main parts of the drawings>

A: main data processor B: sub data processor

C: Track Format Data Processing Unit 10: Set Top Box

20: first in, first out (FIFO) 30: first active part

40, 50, 80, 120, 130: SRAM 60: second active portion

70: main control unit

90: Dynamic RAM 100: RS CODEC

110: third active portion 140: fourth active portion

150 processor 152 scrambler

154: Pre-coder 156: Sync Searcher

158 de-scrambler 160 tape

170: controller

In order to realize the object of the present invention, the present invention

In the recording operation for recording data on the tape, the main data of the first frequency is received from the set-top box to generate the main data of the second frequency, and in the reproduction operation for reproducing the data recorded on the tape, the main of the second frequency A main data processor for receiving data and providing a first frequency to the set top box;

A sub data processor for generating sub data of a second frequency in a recording operation and generating sub data of a fourth frequency in a reproducing operation;

In the recording operation, the track format data of the second frequency is supplied to record the track format data of the second frequency on the tape, and in the reproducing operation, the track format data of the second frequency recorded on the tape is supplied to the track format data of the second frequency. A track format data processor for generating track format data;

A dynamic RAM for storing digitally compressed data of a second frequency muxed from the first SRAM and the second SRAM and sub-code data of a second frequency provided from the third SRAM during a write operation or a reproduction operation on a tape;

An RS CODEC for receiving digital compressed data of a second frequency stored in the dynamic RAM and correcting error information in a recording operation or a reproducing operation on a tape; And

Provided is a data transfer rate control apparatus in D-VHS comprising a controller for controlling the main data processing unit, the sub data processing unit, the track format data processing unit, the RS CODEC, and the dynamic RAM during recording or reproducing operation to tape.

As described above, the digital VHS (D-VHS) is a method and apparatus for recording / reproducing compressed information such as digital broadcasting data on a tape. At this time, the error embedded in the data is checked and corrected when recording / reproducing the data. This is called RS-Rec-Solomon Error Correction Code (ECC).

According to the above configuration, when recording for RS Error Correction Code (RS ECC) in the D-VHS, the digital compressed data and the sub code data are stored in the dynamic RAM. When playing back the tape, RS ECC goes through reverse process.

In this case, since the above-described series of operations use one dynamic RAM, it is possible to record / reproduce data sufficiently compressed by one dynamic RAM even if the above-described series of operations are not performed sequentially by controlling the appropriate data transfer rate. In addition, by appropriately using one dynamic RAM, cost reduction and device miniaturization can be achieved.

Hereinafter, with reference to the accompanying drawings, the present invention will be described in more detail through an embodiment of the present invention.

1 shows an apparatus for controlling data rate in D-VHS according to an embodiment of the present invention.

The apparatus for controlling data rate in the D-VHS includes a main data processor (A), a sub data processor (B), a track format data processor (C), an RS CODEC (100), a dynamic RAM (90), and a controller (170). It consists of.

In the recording operation for recording data on the tape, the main data processing unit A receives 27 MHz main data from the set-top box 10 to generate 19.14 MHz main data, and reproduces the data recorded on the tape. Receive 19.14 MHz main data and provide 27 MHz to the set top box 10.

The sub data processing unit B generates 19.14 MHz sub data in the recording operation, and 19.14 / 128 MHz sub data in the reproducing operation.

The track format data processing unit C receives the 19.14 MHz track format data in the recording operation and records the 19.14 MHz track format data on the tape 160. In the reproducing operation, the 19.14 MHz track recorded on the tape 160. It receives format data and generates data for 19.14 MHz track format.

The dynamic RAM 90 is provided from the third SRAM 80 and the 19.14 MHz digital compressed data muxed from the first SRAM 40 and the second SRAM 50 during a recording operation or a reproducing operation on a tape. Stores 19.14 MHz subcode data.

The RS CODEC 100 corrects error information by receiving 19.14 MHz digitally compressed data stored in the dynamic RAM 90 in a recording operation or a reproduction operation on a tape.

The controller 170 controls the main data processing unit A, the sub data processing unit B, the track format data processing unit C, the RS CODEC 100 and the dynamic RAM 90 in a recording operation or a reproduction operation on a tape. Control each.

The main data processor A includes a first-in, first-out machine 20, a first active part 30, a first SRAM 40, a second SRAM 50, and a second active part 60.

The set top box 10 generates 27 MHz main data in an operation of recording data on a tape, and receives 27 MHz main data in a reproduction operation.

The first-in, first-out machine 20 receives the 27 MHz main data from the set top box 10 during the recording operation and generates 19.14 / 8 MHz main data in a first-in first-out manner. The 27 MHz main data is generated on a first-in first-out basis.

The first active unit 30 performs a function of a demux (DEMUX) for separating 19.14 / 8MHz main data through one transmission path through two transmission paths during a recording operation, It functions as a mux for transmitting 19.14 / 8MHz main data through one transmission channel to one transmission channel.

The first SRAM 40 receives 19.14 / 8 MHz main data from the first-in, first-out-first-out method in the first-in, first-out manner in the write operation to generate the 19.14 MHz main data, and generates the 19.14 MHz main data in the reproducing operation. Generates 19.14 / 8MHz main data.

The second SRAM 50 receives another 19.14 / 8 MHz main data from the first-in, first-out method in the first-in first-out manner during the write operation, and generates another 19.14 MHz main data, and during the reproducing operation, It receives another 19.14 MHz main data and generates another 19.14 / 8 MHz main data.

In the write operation, the second active unit 60 receives 19.14 MHz main data from the first SRAM 30 and the second SRAM 40 so as to be muxed so as to pass through one transmission path. When digitally compressed data is generated and reproduced, the 19.14 MHz data through one transmission channel is separated and the demux functions through the two transmission channels.

The sub data processing unit B is composed of a central control unit 70 and a third SRAM 80.

The Main Control Unit 70 generates 19.14 / 128 MHz sub data in the recording operation and receives 19.14 / 128 MHz sub data in the reproducing operation.

The third SRAM 80 receives 19.14 / 128 MHz sub data from the central control unit 70 in a write operation to generate 19.14 MHz sub data, and receives 19.14 MHz data in a reproducing operation. MHz data is provided to the central control unit 60.

The track format data processor C includes a third active part 110, a fourth SRAM 120, a fifth SRAM 130, a fourth active part 140, and a processor 150.

The third active unit 110 functions as a demux for separating 19.14 / 8 MHz main data through one transmission path through two transmission paths during a recording operation, and two transmission paths during a reproduction operation. It functions as a mux for transmitting 19.14 / 8MHz main data through a single channel.

The fourth SRAM 120 receives the 19.14 MHz track format data from which the error is corrected from the RS CODEC 100 during the recording operation, and generates the 19.14 / 8 MHz track format data, and during the reproduction operation, the 19.14 / The 128 MHz track format data is converted into 19.14 MHz track format data and provided to the third active unit 110.

The fifth SRAM 130 receives another 19.14 MHz track format data from which the error is corrected from the RS CODEC 100 to generate another 19.14 / 8 MHz track format data during a recording operation, and reproduces the data. City, converts another 19.14 / 128 MHz track format data into another 19.14 MHz track format data and provides it to the third active unit 110.

The fourth active unit 140 muxes two 19.14 / 8 MHz track format data generated from the fourth SRAM 100 and the fifth SRAM 110 during a write operation, thereby collecting one 19.14 / 8 MHz track. It generates a format data and performs a demuxing operation of separating 19.14 / 8 MHz track format data through one transmission path into two transmission paths during a reproduction operation.

The processor 150 receives 19.14 / 8 MHz track format data provided from the fourth active unit 140 in a recording operation to generate 19.14 MHz track format data, and provides 19.14 MHz track format data in a reproducing operation. Receive the 19.14 / 8MHz track format data to the fourth active part 140.

In this case, the processor 150 includes a scrambler 152, a pre-coder 154, a synchronous searcher 156, and a descrambler 158.

The scrambler 152 scrambles the muxing data for one track format provided from the fourth active unit 140 during a write operation, and the precoder 154 pre-frees the scrambled data from the scrambler 152. Code to generate 19.14 MHz track format data.

In addition, the synchronization search 156 searches for synchronization of the 19.14 MHz track format data provided from the tape to generate 19.14 MHz track format data during the playback operation, and the descrambler 158 performs the synchronization search 156. 19.14 MHz track format data is descrambled to generate 19.14 / 8 MHz track format data.

The dynamic RAM 90 is provided from the third SRAM 80 and 19.14 MHz digital compressed data muxed from the first SRAM 40 and the second SRAM 50 when recording / reproducing data on a tape. Stores 19.14 MHz subcode data.

The RS CODEC 100 corrects error information by receiving 19.14 MHz digitally compressed data stored in the dynamic RAM 90 when recording / reproducing on a tape.

The tape 160 records 19.14 MHz track format data provided from the processor 150 in a recording operation, and generates 19.14 MHz track format data in the processor 150 in a reproducing operation. And

The controller 170 controls the second active part 60, the third SRAM 80, the third active part 110, the RS CODEC 100, and the dynamic RAM 90 when recording / playing back to tape. do.

Hereinafter, an operation of recording / reproducing digitally compressed data on a tape will be described in detail with reference to FIGS. 2 and 3.

2 is a diagram for explaining in detail the operation of recording digitally compressed data on a tape.

The first-in first-out machine 20 receiving the 27 MHz main data from the set-top box 10 generates 19.14 / 8 MHz main data in a first-in first-out manner and provides the first data to the demux 30.

The demux, which has received 19.14 / 8 MHz main data from the first-in-first-out machine 20, decomposes two signals which can be sent to two transmission paths through demuxing, and then decomposes one 19.14 MHz main data. One SRAM 40 is provided, and another 19.14 MHz main data is provided to the second SRAM 50, respectively.

The first SRAM 40 converts the 19.14 / 8 MHz main data provided from the demux 30 into 19.14 MHz main data and provides the same to the mux 60.

The second SRAM 50 converts the 19.14 / 8 MHz main data provided from the demux 30 into 19.14 MHz main data and then provides it to the mux 60.

The mux 60 muxes the 19.14 MHz main data provided from the first SRAM 40 and the second SRAM 50, respectively, and generates the 19.14 MHz main data through one transmission path and provides the result to the controller 170. do.

Also, the 19.14 / 128 MHz sub data generated in the central control unit 70 is provided to the third SRAM 80 to generate 19.14 MHz sub data and provide it to the controller 170.

Dynamic RAM 90 stores 19.14 MHz digitally compressed main data and 19.14 MHz subcode data provided to controller 170, and RC CODEC 100 stores 19.14 MHz digitally compressed main stored in dynamic RAM 90. Error information is corrected by receiving data and 19.14MHz subcode data.

The demux 110 receives the error corrected 19.14 MHz track format data from the RC CODEC 100 through one transmission path and demuxes the fourth SRAM 120 through the two transmission paths. It is provided to the fifth SRAM 130, respectively.

The fourth SRAM 120 and the fifth SRAM 130, which have received the error corrected 19.14M track format data from the demux 110, convert the data to the 19.14 / 8 MHz track format.

The 19.14 / 8MHz track format data input through the two transmission paths is provided to the scrambler 152 and input to the precoder 154 through a scrambling process, and then undergoes a precoding process. 19.14 MHz track format data is recorded on the tape.

FIG. 3 is a diagram for explaining in detail an operation in which digital compressed data is reproduced from a tape.

The sync searcher 156 searches for the sync section from the 19.14 MHz track format data provided from the tape 160 to generate the 19.14 MHz track format data in which the sync section is searched, and provides it to the descrambler 158.

The descrambler 158 descrambles the generated 19.14 MHz track format data, descrambles the 19.14 / 8 MHz data, and provides it to the mux 140.

The MUX 140 receives 19.14 / 8 MHz track format data through one transmission path, generates two 19.14 MHz track format data, and provides them to the fourth SRAM 120 and the fifth SRAM 130, respectively. .

The fourth SRAM 120 and the fifth SRAM 130, which have received the 19.14 / 8 MHz track format data generated from the mux 140, respectively convert the 19.14 MHz track format data to the demux 110, respectively. to provide.

The demux 110 demuxes the two 19.14 MHz track format data provided from the fourth SRAM 120 and the fifth SRAM 130 into one 19.14 MHz track format data and provides it to the controller 170.

The RS CODEC 100 receives the 19.14 MHz track format data from the controller 170, corrects the error information, and provides the corrected error information back to the controller 170.

The dynamic RAM 90 receives error corrected data from the controller 170 and stores it.

The SRAM 80 receives 19.14 MHz sub data from the data stored in the dynamic RAM 90 through the controller 170 to generate 19.14 / 128 MHz sub data, and provides the same to the central control unit 70.

The mux 60 receives 19.14 MHz main data from the data stored in the dynamic RAM 90 through the controller 170 and performs muxing to separate the 19.14 MHz main data through two transmission paths. It is provided to the SRAM 40 and the 2nd SRAM 50, respectively.

The first SRAM 40 and the second SRAM 50 receive 19.14 MHz main data from the mux 60, convert the data into 19.14 / 8 MHz main data, and provide them to the demux 30, respectively. .

The demux 30 receives two 19.14 / 8 MHz main data and then demuxes one of the 19.14 / 8 MHz main data to provide the first-in, first-out machine 20.

The first-in, first-out machine 20 receives 19.14 / 8 MHz main data from the demux 30 and converts the 27-MHz main data into the set-top box 10 by the first-in first-out method.

Therefore, when recording data for RS Random Signal Error Correction Code (RS ECC) processing, the digital compressed data and sub code data are stored in the dynamic RAM, and the stored data is subjected to RS ECC processing, and then the track format is recorded on the tape. In the case of tape playback, RS ECC is performed through the reverse process.

In this case, since the above-described series of operations do not occur in sequence, only one dynamic RAM (DRAM) is used, and a plurality of memory buses are provided between the controller and the respective input means and the reproducing means so as to smoothly use the dynamic RAM. By setting the static RAM of SRAM to control the transmission speed of data with different speed uniformly, it is possible to record / play back compressed data even with one dynamic RAM even if the above series of operations are not performed in sequence. In addition, by using one dynamic ram properly, cost reduction and device miniaturization can be achieved.

As described above, in the D-VHS system which records / reproduces compressed information such as digital broadcast data on a tape by performing a random signal error correction code (ECC) according to the data transmission rate control apparatus of the present invention, RS ECC In order to record, the digital compressed data and the sub code data are stored in the dynamic RAM, and the stored data is recorded on the tape by performing a track format after RS ECC processing, and RS ECC is performed through the reverse process during tape playback.

At this time, since the above series of operations use one dynamic RAM, the proper data transfer rate is controlled so that even if the series of operations are not performed sequentially, even one dynamic RAM can record / reproduce data sufficiently compressed. Can be.

In addition, the proper use of a single dynamic RAM can reduce the cost and size of the device.

Although the above has been described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the present invention without departing from the spirit and scope of the invention described in the claims below. I can understand that you can.

Claims (4)

In a recording operation for recording data on a tape (hereinafter referred to as a recording operation), the set-top box 10 receives main data of a first frequency to generate main data of a second frequency, and writes the data recorded on the tape. A main data processing unit A for receiving a main data of a second frequency and providing a first frequency to the set top box 10 during a reproducing operation (hereinafter referred to as a reproducing operation); A sub data processor (B) for generating sub data of a second frequency in a recording operation and generating sub data of a fourth frequency in a reproducing operation; In the recording operation, the track format data of the second frequency is received to record track format data of the second frequency on the tape 160. In the reproducing operation, the track format data of the second frequency recorded on the tape 160 is recorded. A track format data processor (C) for receiving and generating track format data of a second frequency; In the recording operation or the reproduction operation, the digital compressed data of the second frequency muxed from the first SRAM 40 and the second SRAM 50 and the sub code data of the second frequency provided from the third SRAM 80 are stored. A dynamic ram 90 for the purpose; An RS CODEC 100 for receiving digital compressed data of a second frequency stored in the dynamic RAM 90 and correcting error information during a recording operation or a reproduction operation; And A controller for controlling the main data processing unit (A), the sub data processing unit (B), the track format data processing unit (C), the RS CODEC (100), and the dynamic RAM (90) during recording or reproducing operation to tape, respectively; 170) a data transmission rate control apparatus in D-VHS. The method of claim 1, wherein the main data processing unit (A) In the recording operation, the main data of the first frequency is received from the set top box 10 to generate the main data of the third frequency in a first-in first-out manner, and in the reproducing operation, the main data of the third frequency of the first frequency is generated. A first-in, first-out 20 for generating main data in a first-in, first-out manner; In the recording operation, the demux for separating the main data of the third frequency through one transmission path through the two transmission paths, and during the reproducing operation, the main data of the third frequency through the two transmission paths A first active part 30 which performs a function of a mux for transmitting to one transmission path; In the recording operation, the first-in first-out unit 20 receives main data of the third frequency in a first-in first-out manner, and generates the main data of the second frequency. The first SRAM 40 for generating main data of frequency; In the recording operation, the first-in first-out method receives the main data of another third frequency from the first-in, first-out method and generates main data of another second frequency. In the reproducing operation, the main of another second frequency is generated. A second SRAM 50 for receiving data and generating main data of another third frequency; And In the write operation, the main data of each second frequency is received from the first SRAM 30 and the second SRAM 40, and the digitally compressed data of the second frequency is muxed so as to pass through one transmission path. D-VHS, characterized in that it consists of a second active unit 60 for generating and reproducing, separating the data of the second frequency through one transmission path to perform the function of the demux through the two transmission paths. Data Rate Control Device The method of claim 1, wherein the sub data processing unit (B) A main control unit 70 for generating sub data of the fourth frequency in the recording operation and receiving the sub data of the fourth frequency in the reproducing operation; And In the recording operation, the sub data of the fourth frequency is received from the central control unit 60 to generate the sub data of the third frequency. In the reproducing operation, the sub data of the fourth frequency is received by the data of the second frequency. And a third SRAM (80) for providing to said central control unit (60). The track format data processing unit (C) according to claim 1, wherein In the recording operation, the DEMUX operation of separating the main data of the third frequency through one transmission path through the two transmission paths is performed. In the reproducing operation, the third frequency of the third frequency through the two transmission paths is performed. A third active unit 110 performing an operation of a mux for transmitting main data to one transmission path; In the recording operation, the track format data of the third frequency is received from the RS CODEC 100 by correcting an error, and the track format data of the third frequency is generated. A fourth SRAM (120) for converting into track format data of a second frequency and providing the same to the third active unit (110); In the recording operation, the track format data of another second frequency is received from the RS CODEC 100 with the error corrected, and the track format data of another third frequency is generated. A fifth SRAM (130) for converting track format data of frequency into track format data of another second frequency and providing it to the third active unit (110); In the recording operation, the data for the track format of one third frequency is generated by muxing the track format data of two third frequencies generated from the fourth SRAM 100 and the fifth SRAM 110, and the reproduction operation is performed. A fourth active part 140 for demuxing the track format data of the third frequency through one transmission path into two transmission paths; And In the recording operation, the track format data of the second frequency is generated by receiving the track format data of the third frequency provided from the fourth active unit 140, and in the reproducing operation, the track format data of the second frequency is received. And a processor (150) for providing track format data of three frequencies to the fourth active unit (140).

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