KR100257427B1 - Polishing method of semiconductor substrate for forming flat surface shape by polishing semiconductor substrate surface - Google Patents

Abstract

A method of polishing a semiconductor substrate for planarizing the surface of the semiconductor substrate includes a main polishing step and a finish polishing step. The main polishing step is used to polish the surface of the semiconductor substrate using the first polishing liquid. The finish polishing step is used to polish the surface of the semiconductor substrate using a chelating agent. Thus, metallic contaminants are efficiently removed from the semiconductor substrate after being polished by a small number of process steps.

Description

TECHNICAL BACKGROUND A semiconductor substrate polishing method for polishing a surface of a semiconductor substrate to form a flat surface shape {POLISHING METHOD OF SEMICONDUCTOR SUBSTRATE FOR FORMING FLAT SURFACE SHAPE BY POLISHING SEMICONDUCTOR SUBSTRATE SURFACE}

The present invention relates to a method for polishing a semiconductor substrate, and more particularly, to a method for polishing a semiconductor substrate for forming a flat surface shape for polishing the surface of the semiconductor substrate.

Recently, the introduction of leveling technology using CMP (Chemical Mechanical Polishing) has been actively carried out in mass production lines of semiconductors. According to the prior art, a method of polishing a semiconductor substrate using such a CMP comprises spraying a polishing liquid first on a polishing stool having a polishing cloth attached thereto, and by a substrate support base on a rotating or vibrating stool. Pushing at a suitable pressure to polish the substrate to be retained, polishing (mainly polishing) the surface of the substrate to be polished, and then using pure water to remove scratches and dust generated after the main polishing. Polishing (finishing polishing) the substrate.

However, the metallic contamination state of the surface of the semiconductor substrate due to metallic impurities at the completion of finish polishing does not satisfy the manufacturing requirements of semiconductor integrated circuits (semiconductor chips) requiring precise etching precision at all, and cleaning (mechanical cleaning, alkaline chemical solution) Washing with rinse, acidic chemical solution and chelating agent and pre-cleaning for carrying out the next process step) are further needed as a washing step after polishing.

A method of polishing a semiconductor substrate using an abrasive (polishing solution) is described, for example, in Japanese Patent Application Laid-Open No. 2-278822 (corresponding to US Pat. Nos. 4,954,142 and 5,084,071). This publication describes polishing (etching) using abrasives and chelating salts of transition metals. However, when the abrasive and chelating salts are mixed and the surface of the semiconductor substrate is polished using this mixture, a continuous cleaning step is required by a mechanical cleaning step or a cleaning step using an acid or alkaline chemical solution to remove metallic contaminants. Do. Therefore, the technique of the above patent publication does not simplify the cleaning step after the polishing step.

As described above, according to the polishing method of the semiconductor substrate of the prior art, various cleaning steps must be performed after the polishing step (main polishing step). In addition, according to the polishing method of the semiconductor substrate of the prior art, there is a problem that the aluminum wiring is corroded when cleaning with an acidic chemical solution, and there is a problem of metallic contaminants caused by residual metal when cleaning that causes corrosion of the aluminum wiring is omitted. This problem of the polishing method of the semiconductor substrate of the prior art is described in more detail later.

It is an object of the present invention to provide a method for polishing a semiconductor substrate which can efficiently remove metallic contaminants from the semiconductor substrate after polishing by a small number of processing steps. It is another object of the present invention to provide a method for polishing a semiconductor substrate capable of sufficiently removing metallic contaminants without causing corrosion of aluminum wiring.

According to the present invention, there is provided a method of polishing a semiconductor substrate for planarizing the surface of the semiconductor substrate, comprising: a main polishing step for polishing the surface of the semiconductor substrate using a first polishing liquid, and after the main polishing step, Provided is a method of polishing a semiconductor substrate, including a finish polishing step for polishing the surface using a chelating agent.

The main polishing step and the finishing polishing step can be performed using the same polishing stool and the same polishing cloth. The main polishing step can be performed using the first polishing stool and the first polishing cloth, and the finishing polishing step can be performed using the second polishing stool and the second polishing cloth.

The finish polishing step can be performed using a chelating agent and the first polishing solution used in the main polishing step. Preferably, the first polishing solution comprises slurry containing particles and an alkaline transition metal.

The finish polishing step can be performed using a chelating agent and a second polishing solution different from the first polishing solution used in the main polishing step. Preferably, the first polishing solution comprises slurry containing abrasive particles and alkaline transition metal, and the second polishing solution comprises slurry containing abrasive particles and ammonia or amine.

The chelating agent may be at least one component selected from the group consisting of citric acid, ethylenediaminetetraacetic acid, hydroxyethylene N-diaminetriacetic acid, ammoniatriacetic acid, diethylenetriaminepentaacetic acid and ethanol diglucinate. The volume concentration of the chelating agent is 0.01% to 20%.

1 is a schematic cross-sectional view showing an example of a semiconductor substrate polishing apparatus;

2A is a schematic cross-sectional view useful for explaining the main polishing process of the first embodiment of the method for polishing a semiconductor substrate according to the present invention;

2B is a schematic cross-sectional view for explaining a finish polishing process of the first embodiment of the method of polishing a semiconductor substrate according to the present invention;

3A is a schematic cross-sectional view useful for explaining the main polishing process of the second embodiment of the method for polishing a semiconductor substrate according to the present invention;

3B is a schematic cross-sectional view useful for explaining the finish polishing process of the second embodiment of the method for polishing a semiconductor substrate according to the present invention;

3C is a schematic cross sectional view useful for explaining a modification of the finish polishing method of the second embodiment of the polishing method of the semiconductor substrate shown in FIG. 3B;

4A is a schematic cross-sectional view useful for explaining the main polishing process of the third embodiment of the method of polishing a semiconductor substrate according to the present invention;

4B is a schematic cross-sectional view useful for explaining the finish polishing process of the third embodiment of the method for polishing a semiconductor substrate according to the present invention;

4C is a schematic cross sectional view useful for explaining a modification of the finish polishing process of the third embodiment of the method of polishing the semiconductor substrate shown in FIG. 4B;

5A to 5F are schematic cross-sectional views each showing an example of a semiconductor manufacturing process to which a polishing method of a semiconductor substrate of the present invention is applied;

6A is a schematic cross-sectional view showing another example of the semiconductor substrate polishing apparatus to which the polishing method of the semiconductor substrate of the present invention is applied;

FIG. 6B is a plan view showing a substrate support base portion in the semiconductor substrate polishing apparatus shown in FIG. 6A;

FIG. 6C is a cross-sectional view taken along the line X-X of the substrate support base portion shown in FIG. 6B. FIG.

Explanation of symbols for main parts of the drawings

1, 11, 21: semiconductor substrate 2, 12, 22: substrate support base

3, 13, 17, 23: polishing liquid supply mechanism 3a, 13a, 17a, 23a: polishing liquid

4, 14: abrasive cloth 5, 15: abrasive stool

6, 16, 26, 33: Chelate supply mechanism 6a, 16a, 33a: Chelating agent

18, 38: mixture supply mechanism 18a, 38a: mixture

24: first polishing cloth 25: first polishing stool

34: second abrasive cloth 35: second abrasive stool

The present invention can be more clearly understood from the following preferred embodiments described in connection with the accompanying drawings.

Prior to describing a preferred embodiment of the method of polishing a semiconductor substrate according to the present invention, examples of the semiconductor polishing apparatus and problems of the method of polishing a semiconductor substrate according to the prior art will be described with reference to FIG. 1.

1 shows an example of a semiconductor substrate polishing apparatus. 1, a semiconductor substrate 101, a semiconductor support base (plate) 102, a polishing liquid supply mechanism (polishing liquid supply section) 103, a polishing cloth (polishing pad) 104, and a polishing stool 105 Is shown. Here, the semiconductor substrate polishing apparatus is used to polish the semiconductor substrate in each of the manufacturing steps of the semiconductor integrated circuit (semiconductor chip) as described later with reference to Figs. 5A to 5F. By the way, the abrasive (polishing liquid) 103a is composed of abrasive particles such as silica (SiO ₂ ), cerium oxide (CeO ₂ ), alumina (Al ₂ O ₃ ) and the like, and an alkaline slurry (potassium hydroxide: KOH, ammonia: NH ₄ OH). , Amines and the like).

In the semiconductor substrate polishing apparatus, the semiconductor substrate 101 is supported by the supporting substrate base 102 and is pushed by the polishing cloth 104 disposed on the stool 105 at a moderate pressure as shown in FIG. Here, the support substrate 12 rotates in the first direction (eg clockwise), while the stool 105 rotates in the second direction (eg counterclockwise). In other words, the stool 105 and the support substrate base 102 rotate in opposite directions about the same axis of rotation. When the semiconductor substrate 101 is polished, the polishing liquid 103a is used by the polishing liquid supply mechanism 103. By the way, the support substrate base 102 and the stool 105 can be shaken (vibrated) in addition to the rotation thereof.

The polishing method of the semiconductor substrate according to the present invention uses, for example, the semiconductor substrate polishing apparatus shown in FIG. 1, and first sprays the polishing liquid 103a onto the stool 105 having the polishing cloth 104 fitted thereto. And press the semiconductor substrate (polishing substrate: semiconductor wafer) held by the substrate support base 102 with a rotating or swinging stool 105 at an appropriate pressure, and polish the semiconductor substrate for about 2 to 5 minutes, or in other words, In terms of film thickness, it is polished by thousands of angstroms (main polishing). Then, polishing (finishing polishing) is performed with pure water for about 30 seconds to remove scratches and dirt on the substrate surface resulting from such main polishing.

Here, the metallic contamination state of the semiconductor substrate due to metallic impurities from the polishing apparatus itself, the polishing cloth 104 or the polishing liquid 103a is about 7.9 × 10 ¹⁰ atoms / cm 2 at a surface concentration in the case of iron, for example. to be.

That is to say, for example, the metal contamination state of the surface of the semiconductor substrate 101 is about 10 to be processed in the next manufacturing process in the manufacture of a semiconductor integrated circuit required for precision etching based on a design rule not larger than 0.3 μm. Contamination levels should be maintained no greater than ¹⁰ atoms / cm 2. Thus, if the metallic contamination state is, for example, about 7.9 × 10 ¹⁰ atoms / cm 2, at least the following four steps are necessary to maintain the metallic contamination state of about 10 ¹⁰ atoms / cm 2 or less.

The four steps below are:

1) a mechanical cleaning step to remove particulates from adhering due to polishing by a brush,

2) cleaning of alkaline chemical solution to completely remove particulates,

3) cleaning with acidic chemical solution or chelating agent to remove metallic contaminants,

4) Next, the pre-cleaning step for executing the semiconductor device manufacturing process.

The above-described method for polishing a semiconductor substrate according to the prior art requires at least four steps of steps 1) to 4) to remove metallic contaminants and depending on conditions, and each cleaning step must be performed several times. As a result, a large number of steps must be executed. In some cases, cleaning with a very dilute acidic chemical solution should be performed. However, if the wiring made of aluminum is already formed on the semiconductor substrate, there is a problem that such aluminum wiring is corroded at a predetermined rate. Therefore, a decrease in yield inevitably occurs. In order to prevent corrosion of the aluminum wiring, a cleaning step of applying a chemical solution having a corrosion function to the aluminum is avoided, thereby causing another problem in that metallic contaminants are not sufficiently removed.

Hereinafter, each embodiment of the method of polishing a semiconductor substrate according to the present invention will be described in more detail with reference to the accompanying drawings.

2A is a schematic cross-sectional view useful for explaining the polishing process of the first embodiment of the polishing method according to the present invention, and FIG. 2B is a view for explaining the finish polishing process of the first embodiment of the polishing method of the semiconductor substrate according to the present invention. A schematic cross section. In addition, each of the following embodiments shows a case where the polishing method of the present invention is applied to the semiconductor polishing apparatus shown in FIG. 1 as an example, but each embodiment shows various other semiconductor substrate polishing apparatus shown in FIGS. 6A to 6C. Similarly apply to.

2A and 2B, the semiconductor substrate 1, the substrate support base (plate) 2, the polishing liquid supply mechanism (polishing liquid supply section) 3, the polishing cloth (polishing pad) 4, the polishing stool (stool) 5 and a chelating agent supply mechanism (chelating agent supply section) 6 are shown. The polishing method of the semiconductor substrate of this first embodiment is carried out at each step for manufacturing an integrated circuit (semiconductor chip) which will be described later with reference to Figs. 5A to 5F. This polishing method also includes the polishing method of the semiconductor substrate of the second embodiment of FIGS. 3A and 3B (FIG. 3C) and the third embodiment of FIGS. 4A and 4B (FIG. 4C).

First, as shown in Fig. 2A, in the main polishing method of the polishing method of the semiconductor substrate of the first embodiment, the semiconductor substrate 1 is held by the substrate support base 2, and the polishing liquid supply mechanism 3 The polishing liquid 3a from is supplied to the polishing cloth 4. While the polishing liquid 3a is supplied, the semiconductor substrate 1 is pushed by the polishing cloth 4 on the stool 5, and the surface of the semiconductor substrate 1 is polished for about 2 to about 5 minutes (main polishing ). Therefore, the surface of the semiconductor substrate 1 is removed (grinded) by thousands of angstroms in terms of film thickness. Here, the main polishing step of the first embodiment shown in Fig. 2A corresponds to the main polishing step of the above-described prior art method.

Specifically, the polishing liquid 3a used during the main polishing step is a mixture (mixture) having, for example, abrasive particles such as silica and potassium hydroxide or iron nitrate.

Then, in the finishing step of the first embodiment, the chelating agent 6a is supplied from the chelating agent supply mechanism 6 to the polishing cloth 4 following the main polishing step described above, and the surface of the semiconductor substrate 1 Polishing (finishing polishing) is performed for about 30 seconds as shown in Fig. 2B. This finish polishing is intended to remove dust and scratches on the surface of the semiconductor substrate 1 due to the main polishing.

Here, the chelating agent has a function of removing metallic contaminants from the surface of the semiconductor substrate by combining with a metal to form a chelating salt. Thus, in an exemplary case, the chelating agent is used as a chemical solution used in a cleaning step after polishing of a semiconductor substrate. In this embodiment, however, the chelating agent is added during polishing. Thus, the function of chemically enhancing the chelate reaction is added to the surface of the semiconductor substrate subjected to pressure from the polishing cloth or the polishing tool in the abrasive, in addition to the usual chelate reaction described above. Therefore, the chelate salt can be formed more efficiently than the effect of cleaning performed after the finish of polishing, so that metallic contaminants can be removed.

In other words, the surface of the semiconductor substrate 1 is polished (peeled off) in a reactive state by the main polishing step using the polishing liquid 3a shown in Fig. 2A, and this finish polishing step using the chelating agent 6a is performed. Since it is carried out continuously in the main polishing step, dirt, scratches and the like on the surface of the semiconductor substrate 1 can be efficiently removed before the contaminants are bonded to the surface of the semiconductor substrate 1. In other words, the chelating agent in the finishing polishing step of this embodiment is suspended (not firmly bound) on the surface of the semiconductor substrate 1 by a chelating reaction rather than a conventional chelating reaction of a metal already firmly bonded to the surface of the semiconductor substrate. ) Easily remove metals (pollutants). For this reason, contaminants can be removed efficiently.

At this time, the metal contamination state on the surface of the semiconductor substrate 1 after polishing is a low contamination state (about 10 ¹⁰ atoms / cm 2 or less) of about 8.9 × 10 ⁹ atoms / cm 2 at the surface concentration, and thus is required in the past. Each step to reduce contamination levels no greater than about 10 ¹⁰ atoms / cm 2 was eliminated.

In other words, according to the first embodiment, the metallic contamination state of the surface of the semiconductor substrate 1 is lowered to about 8.9 × 10 ⁹ atoms / cm 2, for example, after polishing, which is indispensable in the polishing method according to the prior art. Three cleaning steps, namely

1) a mechanical cleaning step to remove particulates from adhering due to polishing by a brush,

2) cleaning of alkaline chemical solution to completely remove particulates,

3) The cleaning step with acidic chemical solution or chelating agent can be omitted to remove metallic contaminants.

Since the first embodiment of the present invention eliminates the need for the acidic chemical solution in the cleaning step 3) as described above, the problem of corrosion due to the acidic chemical solution even when the wiring made of aluminum is formed on the semiconductor substrate 1 This is not caused.

The effects of the first embodiment described above can be equally achieved in the second and third embodiments described below.

3A is a schematic cross-sectional view useful for explaining the main polishing process of the second embodiment of the method for polishing a semiconductor substrate according to the present invention, and FIG. 3B is the finish polishing process of the second embodiment of the method for polishing a semiconductor substrate according to the present invention. It is a schematic cross-sectional view useful for explaining. 3A and 3B show a semiconductor substrate 11, a support base 12, a polishing liquid supply mechanism 13, an abrasive cloth 14, an abrasive stool (stool) 15, and a chelating agent supply mechanism 16. It is.

As shown in Fig. 3A, the main polishing step of the second embodiment of the polishing method of the semiconductor substrate according to the present embodiment is the same as the main polishing step of the first embodiment described above. In other words, the semiconductor substrate 11 is held by the substrate support base 12, and the polishing liquid 13a is supplied from the polishing liquid supply mechanism 13 to the polishing cloth 14. While the polishing liquid 13a is supplied, the semiconductor substrate 11 is pushed by the polishing cloth 14, and the surface of the semiconductor substrate 11 is polished for about 2 to about 5 minutes while the pressure is applied (main polishing) The surface is then removed by thousands of angstroms in terms of film thickness. Here, the polishing liquid 13a is the same as the polishing liquid 13a used in the first embodiment.

Next, in order to eliminate the processing damage applied to the surface of the semiconductor substrate 11 during the main processing, the chelating agent 16a is supplied from the chelating agent supply mechanism 16 to the polishing cloth 14 as shown in FIG. 3B. A small amount of polishing liquid 13a is supplied from the polishing liquid supply mechanism 13 to the polishing cloth 14 so as to carry out the finishing polishing step. Therefore, the surface of the semiconductor substrate 11 is slightly polished by the polishing liquid 13a, and the dust and scratches of the semiconductor substrate 11 are removed by the chelating agent 16a. The finishing chemical solution to be used in the finishing polishing step of the second embodiment may be the same as the polishing liquid 13a from the polishing liquid supply mechanism 13 used in the main polishing shown in FIG. 3A, or another polishing liquid supply Polishing liquid from the mechanism 17.

In other words, if the polishing liquid 17a from the polishing liquid supply mechanism 17 provided only for the finish polishing step and the chelating agent 16a from the chelating agent supply mechanism 16 are used in the finish polishing step, the finish polishing A polishing liquid 17a most suitable for the step can be selected. Specifically, an example of the polishing liquid 17a used in the finish polishing step is a mixture (mixture) containing abrasive particles such as silica and ammonia or amine that does not contain an alkaline transition metal.

3C is a schematic cross-sectional view useful for explaining a modification of the finish polishing method of the second embodiment of the polishing method of the semiconductor substrate shown in FIG. 3B. In Fig. 3C, reference numeral 18 denotes a mixture supply mechanism of the polishing liquid and the chelating agent.

As shown in Fig. 3C, the finish polishing step can be performed using the mixture 18a including the polishing liquid and the chelating agent supplied from the mixture supply mechanism 18 of the polishing liquid and the chelating agent. The polishing liquid contained in the mixture 18a is the same as the polishing liquid 13a used for the main polishing step or the polishing liquid 17a provided only for the finishing polishing step, and the chelating agent contained in the mixture 18a is described above. It is the same as the chelating agent 16a used in the finish polishing step in one second embodiment.

4A is a schematic cross-sectional view useful for explaining the main polishing process of the third embodiment of the method for polishing a semiconductor substrate according to the present invention, and FIG. 4B is the finish polishing process of the third embodiment of the method for polishing a semiconductor substrate according to the present invention. It is a schematic cross-sectional view useful for explaining. 4A, the semiconductor substrate 21, the support base 22, the polishing liquid supply mechanism 23, the first polishing cloth 24, the first polishing stool (stool) 25, and the chelating agent supply mechanism 26, A second polishing cloth 34 and a second polishing stool (stool) 35 are shown.

First, as shown in FIG. 4A, the main polishing step of the third embodiment of the polishing method of the semiconductor device is the same as the main polishing step of the first and second embodiments described above. In other words, the semiconductor substrate 21 is supported by the substrate support base 22, and the polishing liquid 23a is supplied from the polishing liquid supply mechanism 23 to the first polishing cloth 24. The semiconductor substrate 21 is pushed by the first polishing cloth 24 on the first stool 25 while the polishing liquid 23a is supplied, and the surface is polished for about 2 to about 5 minutes while the pressure is applied. Polishing) to remove (grind) the surface of the semiconductor substrate by thousands of angstroms in terms of film thickness. Here, the polishing liquid 23a is the same as the polishing liquid 3a used in the first embodiment.

Next, as shown in FIG. 4B, the third embodiment has a second polishing cloth 34 different from the first polishing cloth 24 and the first stool 25 used in the main polishing step shown in FIG. 4A. And finish polishing by using the second stool 35 and by using the chelating agent 33a from the chelating agent supply mechanism 33 disposed on the second polishing cloth 34 and the second stool 35. do.

In other words, in this finishing polishing step of the third embodiment, the semiconductor substrate 21 is quickly separated from the polishing liquid 23a and the first polishing cloth 24 exposed to the metallic contaminants generated from the main polishing step, and the polishing stool The (second stool) 35 and the second polishing cloth 34 are different from those used in the main polishing step used in the finish polishing step. Thus, the cleaning effect of finish polishing is further improved.

4C is a schematic cross-sectional view useful for explaining a modification of the finish polishing process of the third embodiment of the method of polishing the semiconductor substrate shown in FIG. 4B. In Fig. 4C, reference numeral 38 denotes a mixture supply mechanism of the polishing liquid and the chelating agent.

As shown in FIG. 4C, the finish polishing step can be performed using the mixture 38a containing the polishing liquid and the chelating agent supplied from the mixture supply mechanism 38 of the polishing liquid and the chelating agent. The polishing liquid contained in the mixture 38a is the same as the polishing liquid 23a useful for the main polishing step or the polishing liquid provided for the finishing polishing step (corresponding to the polishing liquid 17a) and included in the mixture 38a. The chelating agent used is the same as the chelating agent 33a used for the finish polishing step in the third embodiment described above.

In other words, it is preferable that a slurry of ammonia or amine not containing alkaline metal is used as the polishing liquid for the finish polishing step. Because, if a slurry containing alkaline metal (eg potassium hydroxide) is used in the finishing step, the alkaline metal remains on the semiconductor substrate and becomes a new source of contamination.

In the above-described first to third embodiments, at least one selected from the group consisting of citric acid, ethylenediaminetetraacetic acid, hydroxyethylene N-diaminetriacetic acid, ammoniatriacetic acid, diethylenetriaminepentaacetic acid and ethanol diglucinate The component can be selected and used for the chelating agent. The volume concentration (vol%) of the chelating agent is preferably 0.01% to 20%. If the volume concentration of the chelating agent is less than 0.01%, the amount of the chelating agent is not sufficient, and the above-described cleaning effect is not sufficiently achieved. On the other hand, if the volume concentration of the chelating agent is greater than 20%, the amount of the chelating agent becomes a problem due to the residual organic material due to the chelating agent itself. Therefore, the volume concentration of the chelating agent is preferably set in the range of 0.01% to 20%, and the dust adhering to the surface can be sufficiently and surely removed due to the scratches and the main polishing generated on the surface of the semiconductor substrate.

More specifically, the surface concentration (current iron contamination concentration) of the residual iron contaminants on the semiconductor substrate at the completion of polishing is about 8.9 × 10 ⁹ atoms / cm 2 as described above in all of the first, second and third embodiments. The residual iron contamination concentration can be significantly reduced compared to the numerical value of 7.9 x 10 ¹⁰ atoms / cm 2 by the polishing method according to the prior art.

5A to 5F are schematic cross-sectional views each showing an example of a semiconductor manufacturing process to which the polishing method of a semiconductor substrate of the present invention is applied.

FIG. 5A shows an example of planarization of an interlevel insulating film without a stopper, and FIG. 5B shows an example of planarization of an interlevel insulating film with a stopper. 5A and 5B illustrate a first interlevel insulating film 211, barrier layers 212 and 214, a first layer wiring 213, an insulating film 215, and a stopper insulating film 216.

In the example shown in FIG. 5A, the semiconductor substrate is polished to the positions C1-C1 by applying the polishing method of the present invention to planarize or planarize the insulating film (interlevel insulating film) 215. In the embodiment shown in Fig. 5B, the semiconductor substrate is polished to the position C2-C2 by applying the polishing method of the present invention to planarize the insulating film to the stopper insulating film 216. Figs.

FIG. 5C shows an example of planarization to cover the via hole, and FIG. 5D shows an example of planarization of the double wavy (hidden) wiring. 5A and 5B show a barrier layer 217, a blanket metal layer 218 and via holes 219. By this method, the insulating film 215 constitutes a second layer interlevel insulating film.

The example shown in FIG. 5C shows a via hole 219 having a semiconductor film polished to a position C3-C3 by applying the polishing method of the present invention, whereby the surface is flattened and covered with a metal film 218 therein. ) Is formed. The example shown in Fig. 5D shows the case where the semiconductor substrate is polished to the position C4-C4 by applying the polishing method of the present invention, and the second layer wiring 218 'is formed on the via hole 219. will be.

5E shows an example of planarization to cover deep grooves. A deep groove 220, a pad oxide film 221, a silicon nitride film 222, and a polycrystalline silicon film 223 are shown in the drawing.

The example shown in FIG. 5E illustrates a case where the semiconductor substrate is polished to the position C5-C5, that is, to the silicon nitride film 222 by applying the polishing method of the present invention to form a flattened deep groove occlusion.

5F shows an example of flattening of shallow grooves that are covered. The pad oxide film 224, the silicon nitride film 225, and the shielded insulating film 226 are shown in the figure.

5F shows that the semiconductor substrate is polished to position C6-C6, i.e., to silicon nitride film 225 by applying the polishing method of the present invention, to planarized shallow grooves (device isolation regions) 227 and The case where the device region 228 is formed is shown.

5A to 5F illustrate some examples to which the present invention is applied, and of course, various semiconductor manufacturing processes may be applied to the method of polishing a semiconductor substrate according to the present invention.

6A to 6C show another example of the semiconductor substrate to which the polishing method of the semiconductor substrate according to the present invention is applied. FIG. 6A is a schematic cross-sectional view of the semiconductor substrate polishing apparatus, FIG. 6B is a plan view showing the substrate support base portion in the semiconductor substrate polishing apparatus, and FIG. 6C is an X-X line cross-sectional view of the substrate support base portion shown in FIG. 6B. 6A to 6C, the semiconductor substrate 41, the substrate support base (plate) 42, the polishing liquid supply mechanism (polishing liquid supply section) 43, the polishing cloth (polishing pad) 44, the stool 45, A chelating agent supply mechanism (chelating agent supplying section) 46 is shown.

In the semiconductor substrate polishing apparatus shown in FIG. 6A, the polishing cloth 44 is disposed on the polishing stool (stool) 45 that rotates with the machining center L1 as a center and is supported by the support substrate 42. The substrate 41 is pushed into the polishing cloth 44 at a suitable pressure. Here, the stool 45 is hollow, and the coolant caused to flow through this stool 45 controls the temperature rise due to the frictional heat between the semiconductor substrate 41 and the polishing cloth 44.

As shown in FIGS. 6B and 6C, the semiconductor substrate 41 is supported by the support base 42 by, for example, wax 47, and the support base 42 is then processed by the processing head 40. Is fitted to. The support base 42 can rotate with an axis L2 whose center is different from the rotation axis (processing center) of the stool 45, and the composite rotation thereof is used to polish the semiconductor substrate 41. A plurality of support bases 42 (processing head 40) can be arranged around the machining center L1.

The semiconductor substrate polishing apparatus also has a polishing liquid supply mechanism 43 for supplying the polishing liquid 43a used in the main polishing step, and a chelating agent supply mechanism for supplying the chelating agent 46a used in the finishing polishing step ( 46).

As described above, the semiconductor substrate polishing method according to the present invention can be applied to a wide range of polishing apparatuses.

As described above, the semiconductor substrate polishing method according to the present invention can polish the surface of the semiconductor substrate using a chelating agent, thereby simplifying the cleaning step of the surface of the semiconductor substrate after polishing, and the aluminum formed on the semiconductor substrate Dust can be efficiently removed while preventing corrosion of wiring.

Many different embodiments of the invention can be made without departing from the spirit and scope of the invention, and the invention is not limited by the specific embodiments described herein, but only by the claims.

According to the present invention, the surface of the semiconductor substrate is polished using a chelating agent to simplify the cleaning process of the surface of the semiconductor substrate after polishing and to effectively remove dust and contaminants while preventing corrosion of aluminum wiring formed on the semiconductor substrate. It works.

Claims (20)

In the polishing method of a semiconductor substrate for planarizing the surface of a semiconductor substrate, A main polishing step of polishing the surface of the semiconductor substrate using a first polishing liquid; And a final polishing step of polishing the surface of the semiconductor substrate using a chelating agent after the main polishing step. The method of claim 1, Wherein said main polishing step and said finishing polishing step are performed using the same polishing stool and the same polishing cloth. The method of claim 2, And the finishing polishing step is performed using the chelating agent and the first polishing liquid used in the main polishing step. The method of claim 2, And the finishing polishing step is performed using the chelating agent and a second polishing liquid different from the first polishing liquid used in the main polishing step. The method of claim 4, wherein And the first polishing liquid includes slurry containing abrasive particles and an alkaline transition metal, and the second polishing liquid includes slurry containing abrasive particles and ammonia or amine. The method of claim 1, Wherein said main polishing step is performed using said first polishing stool and a first polishing cloth, and said finishing polishing step is performed using a second polishing stool and a second polishing cloth. The method of claim 6, And the finishing polishing step is performed using the chelating agent and the first polishing liquid used in the main polishing step. The method of claim 6, And the finishing polishing step is performed using the chelating agent and a second polishing liquid different from the first polishing liquid used in the main polishing step. The method of claim 8, And the first polishing liquid includes slurry containing abrasive particles and an alkaline transition metal, and the second polishing liquid includes slurry containing abrasive particles and ammonia or amine. The method according to any one of claims 1 to 9, And said chelating agent is at least one component selected from the group consisting of citric acid, ethylenediaminetetraacetic acid, hydroxyethylene N-diaminetriacetic acid, ammonia triacetic acid, diethylenetriaminepentaacetic acid and ethanol diglucinate. The method of claim 10, A method of polishing a semiconductor substrate, wherein the volume concentration of the chelating agent is 0.01% to 20%. In the polishing method of a semiconductor substrate for planarizing the surface of a semiconductor substrate, A main polishing step of polishing the surface of the semiconductor substrate using a first polishing liquid; After the main polishing step, a finish polishing step of polishing the surface of the semiconductor substrate with a chelating agent; Wherein said main polishing step and said finishing polishing step are performed using the same polishing stool and the same polishing cloth. The method of claim 12, And the finishing polishing step is performed using the chelating agent and a second polishing liquid different from the first polishing liquid used in the main polishing step. The method of claim 13, And the first polishing liquid includes slurry containing abrasive particles and an alkaline transition metal, and the second polishing liquid includes slurry containing abrasive particles and ammonia or amine. In the polishing method of a semiconductor substrate for planarizing the surface of a semiconductor substrate, A main polishing step of polishing the surface of the semiconductor substrate using a first polishing liquid; After the main polishing step, a finish polishing step of polishing the surface of the semiconductor substrate with a chelating agent; Wherein said main polishing step is performed using a first polishing stool and a first polishing cloth, and said finishing polishing step is performed using a second polishing stool and a second polishing cloth. The method of claim 15, And the finishing polishing step is performed using the chelating agent and the first polishing liquid used in the main polishing step. The method of claim 15, And the finishing polishing step is performed using the chelating agent and a second polishing liquid different from the first polishing liquid used in the main polishing step. The method of claim 17, And the first polishing liquid includes slurry containing abrasive particles and an alkaline transition metal, and the second polishing liquid includes slurry containing abrasive particles and ammonia or amine. The method according to any one of claims 15 to 18, And said chelating agent is at least one component selected from the group consisting of citric acid, ethylenediaminetetraacetic acid, hydroxyethylene N-diaminetriacetic acid, ammonia triacetic acid, diethylenetriaminepentaacetic acid and ethanol diglucinate. The method of claim 19, A method of polishing a semiconductor substrate, wherein the volume concentration of the chelating agent is 0.01% to 20%.

Images