KR100251680B1 - Method and apparatus for error control on atm system - Google Patents

Abstract

PURPOSE: An apparatus for managing an OAM(Operation Administration and Maintenance) fault in an ATM(Asynchronous Transfer Mode) network is provided to process a fault management with a CPU and another hardware, so as to prevent wrong operations caused by the load increase of the CPU or the loss of OAM cells. CONSTITUTION: Fault state fields for indicating fault states are allocated to each storing area of a memory(10) for storing connection information, relating to each connection of an ATM(Asynchronous Transfer Mode) network, respectively. Whenever cells for a fault management OAM(Operation Administration and Maintenance) are received, values with which states of the received cells have to be maintained, are written in the fault state fields corresponding to the connections. The state values of the fault state fields are sequentially identified one by one, every constant period. If the state values do not expire, the state values are changed as many as constant unit values.

Description

Maintenance operation management fault condition processing method and device in asynchronous transmission mode network

The present invention relates to the operation, administration and maintenance (AAM) of the asynchronous transfer mode (hereinafter referred to as "ATM") network, in particular fault status processing (fault) The present invention relates to a method and an apparatus for management.

In general, in an ATM network, network end devices, all devices performing an ATM layer function in a user-network interface (UN) or a network node interface (NNI), and terminal devices applying an ATM protocol are OAMs. Essentially equipped with the function. In these devices, the OAM unit detects whether a transmission line or exchange is operating normally, or monitors performance such as cell loss or operation error. OAM functions include fault notification, continuity test, return test, and performance test. Among them, a fault notification is to send an Alarm Indication Signal (AIS) cell, which is a fault condition processing OAM cell, to notify the occurrence of a fault in a downstream exchange which detects a fault to a terminal of a called party. At this time, the called terminal repeatedly transmits a RDI (Remote Defect Indication) cell, which is a failure state processing OAM cell for notifying a remote receiving failure, to notify the calling terminal of the failure. Based on these signals, connection reconnection or bypass is attempted between two terminals on the called and calling sides.

When an ATM network element receives an AIS cell or an RDI cell, the ATM element enters the AIS state or the RDI state. The conditions for recovering from the AIS state or the RDI state to the normal state are as follows. The first condition is a case of receiving a user cell or a CC (Continuity Check) cell, and the second condition is a case in which an AIS cell is not received for 2.5 ± 0.5 seconds. In addition, if a user cell or CC cell is not received for 3.5 ± 0.5 seconds, a CC fail. Details of this are provided in Recommendation I.610, International Telecommunication Union-Telecommunications standardization sector (ITU-T). The CC cell is an OAM cell for conducting a conduction test, and is a cell which is sent to perform CC when the circuit is opened or when there is no distinction between whether a user cell exists or whether a connection is cut off.

At present, the ATM switch adopts a method of receiving a fault processing OAM cell such as AIS, RDI, CC, etc. by the central processing unit (CPU) and generating AIS state or RDI state in software according to the above conditions. . However, this method greatly increases the load on the CPU when the number of connections increases, which is very likely to cause a malfunction. In addition, the input speed of the cell is much faster than the processing speed of the current CPU, which may result in the loss of the OAM cell. For reference, the input speed of a cell in an ATM-ESS exchange is 155Mbps.

As described above, in the conventional ATM network, as the failure state processing is performed by the CPU in the software, a malfunction occurs due to an increase in the load of the CPU and causes a loss of the OAM cell.

Accordingly, an object of the present invention is to provide a failure state processing method and apparatus that can perform OAM failure state processing in an ATM network without load of a CPU.

1 is a timing diagram of a processing section according to an embodiment of the present invention;

2 is a block diagram of a failure state processing apparatus according to an embodiment of the present invention;

3 is a memory map of FIG. 2 in accordance with an embodiment of the present invention;

4 is a flowchart illustrating processing of a cell receiving processor according to an exemplary embodiment of the present invention;

5 is a processing flowchart of an expiration processing unit according to an embodiment of the present invention;

6 is an expiration processing timing diagram of the present invention.

The present invention for achieving the above object is the process of allocating a fault state feed for indicating a fault condition to each of the storage areas of the memory for storing one connection information for each of the connections of the ATM network, Each time a cell for the OAM is received, the process of writing a value to be maintained in the fault state shield corresponding to the connection, and a state value of the fault state shield for the connections It is characterized in that it has a process of changing by a predetermined unit value if it does not expire by sequentially checking one by one at a predetermined period.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description and the annexed drawings, numerous specific details are set forth in order to provide a more thorough understanding of the present invention, such as specific memory map configurations and processing flows. It will be apparent to those skilled in the art that the present invention may be practiced without these specific details. And a detailed description of known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted.

First, the present invention implements the fault condition processing specified in ITU-T Rec. I.610 in hardware instead of the CPU. Accordingly, when the OAM cell is received, the AIS state and the RDI state are processed without load on the CPU. When the user cell or CC cell is received, the AIS state or the RDI state is released and restored to the normal state as recommended in ITU-T Rec. I.610.

In order to implement a fault condition in this manner, two processes must be performed. First, it is necessary to determine whether 2.5 ± 0.5 seconds have passed after receiving the AIS cell or the RDI cell. Therefore, to implement this, an expiry process that operates regardless of whether a cell is received is required. Secondly, when the AIS cell or the RDI cell is received, the AIS state or the RDI state should be entered, and when the user cell or the CC cell is received, the normal state should be restored. In order to implement this, cell reception processing performed only when a cell is received is required.

In order to implement the above two kinds of processing, the present invention divides one cell time interval into a plurality of intervals, and alternately processes cell reception processing and expiration processing for one interval. Here, one cell time is a time between incoming cells. In the following description, an example of processing one cell time into two sections will be described for convenience.

1 shows an example of processing one cell time divided into two sections as described above. In the present invention, as shown in FIG. 1, one cell time is divided using the cell synchronization signal C_Sync, which corresponds to a period between the cell synchronization signals C_Sync. The cell synchronizing signal C_Sync is typically a signal which locates and specifies the head of a cell in consecutive bit streams and is synchronized with an incoming cell. In this way, the cell time is divided into two sections, that is, the cell receiving processing section and the expiration processing section. When a cell is input, the cell receiving processing is processed within the cell receiving processing section and is sequentially performed on the connections regardless of the cell input. The expiration process that is operated as is processed within the expiration process section. The order of the cell reception processing section and the expiration processing section may be interchanged. If necessary, another clock may be used instead of the cell synchronization signal C_Sync.

On the other hand, in the expiration process, a global timer is required to obtain a connection address to be updated now. The global timer consists of a binary counter that is incremented by one every period and must be a modulo Q counter. At this time, Q value should be divided by M in case of handling M fault condition for each connection. In the following description, the global timer uses an x-counted counter that is incremented by one whenever the cell sync signal C_Sync is generated one by one. This binary counter should be able to represent at least the number of Equations 1 below, assuming that there are currently N connections that can be supported, M faults are handled per connection, and 1 cell time is 2.7 ms. do. That is, the global timer uses the binary counter such that the maximum count value GT _max is equal to the following equation (1).

In Equation 1, 4 seconds means a maximum time required for processing a fault state, and when a fault state process specified in ITU-T Rec. I.610 is performed, a maximum value of 3.5 ± 0.5 second condition becomes CC failure. 4 seconds is equivalent to this.

In addition, since the global timer is incremented by 1 every 1 cell time, the connection address to be updated in the current expiration process is obtained by Equation 2 below.

In Equation 2, CONN_ID is a connection address, GT is a count value of a global timer, and M and N are the same as in Equation 1 above. And [GT / M] is the maximum integer not exceeding GT / M. For example, [3.5] = 3.

Figure 2 shows a block diagram of a failure state processing apparatus according to an embodiment of the present invention for performing the above-described failure, which is applied to the OAM portion of a typical ATM network. The memory 10 is allocated a failure state feed for indicating a failure state to each of the storage areas for correspondingly storing one connection information for each connection of the ATM network.

3 illustrates a memory map of the memory 10 according to an exemplary embodiment of the present invention, and illustrates an example in which there are n + 1 connections. As shown in FIG. 3, in the storage areas corresponding to each of the connections in the memory 10, an AIS state avoidance that may indicate a fault condition according to an embodiment of the present invention, in addition to the other connection information feed 20 which is conventional. A failure state feed consisting of a shield 22, an RDI state feed 24, and a CC state feed 26 is assigned. This failure state feed consists of n bits, and as described later, when an AIS state or an RDI state occurs, the cell reception process maintains a value other than the expiration value, and about 2.5 seconds after the AIS state or the RDI state occurs. When it has elapsed, it is set to an expiration value by the expiration process. In the following description, the expiration value is set to 0. Therefore, the user can determine whether the AIS state or the RDI state without the separate failure state processing OAM cell processing routine by checking the failure state of the memory 10.

The memory access arbiter 12 then arbitrates the cell reception processing unit 16 and the expiration processing unit 18 to access the memory 10. As such, the technique of arbitrating access to the memory is well known in the art, and thus a detailed description thereof will be omitted. In addition, the cell synchronization signal generator 14 generates the cell synchronization signal C_Sync of FIG. 1 as described above. At this time, the cell synchronizing signal generator 14 generates a cell synchronizing signal C_Sync in which a pulse appears once every cell cycle by using a clock signal SYS_CLK which is faster than the cell synchronizing signal C_Sync. The cell synchronizing signal C_Sync generated from the cell synchronizing signal generating unit 14 is commonly applied to the cell receiving processing unit 16 and the expiration processing unit 18, and the clock signal SYS_CLK is also applied to the cell receiving processing unit 16 and the expiration processing unit 18. Is commonly applied to.

In the above state, whenever the cell reception processor 16 receives any one of an AIS cell, an RDI cell, a CC cell, and a user cell, the cell reception processor 16 corresponds to a value in the memory 10 to maintain a state corresponding to the received cell. A corresponding one of the AIS state feed 22, the RDI state feed 24, and the CC state feed 26 corresponding to the connection is written to. At this time, the cell reception processing unit 16 inputs the incoming cell in synchronization with the cell synchronization signal C_Sync. The cell reception processing unit 16 operates during the cell reception processing section of FIG. 1 divided based on the cell synchronization signal C_Sync generated from the cell synchronization signal generation unit 14. The cell reception processing unit 16 may be designed using a conventional VHDL (Very High Speed Hardware Description Language) according to the flowchart of FIG. 4 as described later.

In addition, the expiration processing unit 18 stores the failure state feed of the memory 10, that is, the AIS state feed 22, the RDI state feed 24, and the CC state feed 26, respectively, for the connections. The AIS status value, the RDI status value, and the CC status value are checked one by one for each cycle of the cell synchronization signal C_Sync. To this end, the expiration processing unit 18 is provided with a global timer as described above. Here, since the expiration value is set to 0 as described above, the expiration processing unit 18 will be described below by decreasing the corresponding state value by 1 for each update period. This expiration process is performed sequentially for the supporting connection regardless of the reception of the cell. The expiration process is performed regardless of whether the connection is active. The expiration processing unit 18 operates during the expiration processing section of FIG. 1 divided based on the cell synchronizing signal C_Sync generated from the cell synchronizing signal generating unit 14. The expiration processing unit 18 may be designed using VHDL similarly to the cell reception processing unit 16 described above according to the flowchart of FIG. 5 as described later.

For reference, assuming that the number of currently supported connections is N, M faults are handled for each connection, and 1 cell time is 2.7 ms, the expiration processing update period of the fault status feed for each connection is Equation 3 below.

Update cycle = 2.7 ms × M × N

Therefore, if it supports a total of 4096 connections and provides three failure states of AIS, RDI, and CC as above, M = 4096, N = 3. The period is 4096 x 2.7 s x 3 = 33.178 s. Accordingly, the state value to be written to the fault state feed of the memory 10 is expressed by Equation 4 below.

In Equation 4, P is a time to maintain the required state. If M = 4096, N = 3 and the AIS state and the RDI state are to be maintained for 2.5 seconds, respectively, the state value is 2.5 ÷ (2.7 x 10 ^-6 x 4096 x 3) = 75.35. Therefore, in this case, 75 (4B'h) is written to the AIS state feed 22 and the RDI state feed 24. If M = 4096, N = 3 and the CC state is to be maintained for 3.5 seconds, then the state value is 3.5 ÷ (2.7 x 10 ^-6 x 4096 x 3) = 105.49. Therefore, in this case, 105 (69'h) is written to the CC state feed 26.

4 shows a processing flowchart of the cell receiving processing unit 16 according to the embodiment of the present invention. If the incoming cell received by the cell reception processing unit 16 is an OAM cell for fault condition processing, the cell reception processing unit 16 responds to this in step 100 of FIG. 4 and responds with the current connection address in step 102. In step 104, the cell type is checked. In this case, if the AIS cell is received, the cell receiving processor 16 writes a state value in which the AIS state is to be maintained in the AIS state feed 22 for the connection in the memory 10 in step 106. . At this time, if the AIS state should be maintained for 2.5 seconds as in the above example, the state value is written as 75 (4B'h). In contrast, in the case of receiving the RDI cell, the cell receiving processor 16 writes a state value in which the RDI state is to be maintained in the RDI state feed 24 for the connection in the memory 10 in step 108. . At this time, if the RDI state is to be maintained for 2.5 seconds as in the above-described example, it writes 75 (4B'h).

When the CC cell or the user cell is received, the cell receiving processor 16 writes a state value at which CC is failed to the CC state feed 26 of the connection information of the memory 10 in step 110. The values of the AIS state feed 22 and the RDI state feed 24 are written to zero. At this time, writing the AIS state value and the RDI state value to 0 is because when the user cell or CC cell is received as described above, the AIS state value and the RDI state value should be released from the AIS state or the RDI state and restored to the normal state. For example, if there is no user cell or CC cell for 3.5 seconds as in the above-described example, a CC fail is written, and 105 (69'h) is written. The condition under which the AIS state, the RDI state, the CC fail state, etc. are released may be determined flexibly according to a user's request.

5 shows a processing flow diagram of the expiration processing unit 18 according to the embodiment of the present invention, and FIG. 6 shows an expiration processing timing. First, the expiration processing unit 18 initializes the count values GT, AIS state value, RDI state value, and CC state value of the global timer to zero in step 200 of FIG. 5. Thereafter, the expiration processing unit 18 performs steps 202 to 204 for each period of the cell synchronization signal C_Sync. That is, the expiration processing unit 18 performs step 204 whenever an event in which the cell synchronization signal C_Sync is input from the cell synchronization signal generation unit 14 occurs. In step 204, the expiration processing unit 18 increases the count value GT of the global timer by one, and obtains the connection address CONN_ID to be currently updated by Equation 2 described above in step 206. FIG.

Next, the expiration processing unit 18 fetches the failed state feed of the current connection address CONN_ID-th connection in the memory 10 in step 208, and checks the rest of the GT / M in step 210. Here, since M = 3 is an example, the AIS status feed 22 and the RDI status feed 24, which are the failure status feed of the current connection address CONN_ID-th connection, remainder after dividing the count value GT of the global timer by 3 ), One of the CC status feeds 26. Accordingly, as shown in FIG. 6, the AIS state value, the RDI state value, and the CC state value of the memory 10 are sequentially checked and updated one by one for each cycle of the cell synchronization signal C_Sync, and one connection is performed during the three periods of the cell synchronization signal C_Sync. Will be expired. That is, if the rest of GT / 3 is 0, the AIS state is updated, if it is 1, the RDI state is updated, and if it is 2, the CC state is updated.

In step 210, if the remainder of the GT / 3 is 0, the expiration processing unit 18 stores the AIS state stored in the AIS state feed 22 of the current connection address CONN_ID-th connection of the memory 10 in step 212. Check that the value is zero. In this case, if the AIS state value is not 0, the expiration processing unit 18 decreases the AIS state value by 1 in step 214 and writes the AIS state feed 22 of the current connection address CONN_ID-th connection again in step 202. Return to On the contrary, if the AIS state value is 0, the expiration processing unit 18 immediately returns to step 202 described above. Therefore, in this case, the AIS status value is kept at zero.

In contrast, if the remainder of the GT / 3 is 1 in step 210, the expiration processing unit 18 stores the RDI state feed 24 of the current connection address CONN_ID th connection of the memory 10 in step 216. Check if the RDI status value is 0. In this case, if the RDI state value is not 0, the expiration processing unit 18 decreases the RDI state value by 1 at step 218, and then writes the RDI state feed 24 of the current connection address CONN_ID-th connection again (step 202). Return to On the contrary, if the RDI state value is 0, the expiration processing unit 18 immediately returns to step 202 described above. Therefore, in this case, the RDI state value is kept at zero.

In addition, if the remainder of the GT / 3 is 2 in step 210, the expiration processing unit 18 stores the CC stored in the CC state feed 26 of the current connection address CONN_ID-th connection of the memory 10 in step 220. Check if the status value is 0. In this case, if the CC status value is not 0, the expiration processor 18 decreases the CC status value by 1 at step 222, and then writes the CC status feed 26 of the current connection address CONN_ID-th connection again in step 202. Return to On the contrary, if the CC state value is 0, the expiration processing unit 18 immediately returns to step 202 described above. Therefore, in this case, the CC status value is kept at zero.

Therefore, the AIS state value, RDI state value, and CC state value of all connections are sequentially updated one by one for each cell synchronization signal C_Sync period. For example, when an AIS cell is received, a non-zero value, that is, 75 is written as an AIS state value when 2.5 seconds is received by the cell receiving processor 16, and one cell time is received by the expiration processor 18 regardless of whether the cell is received. Decrease this value by 1 every time. After 2.5 seconds, the AIS state is "0". When the CC cell or the user cell is received, 105 is written by the cell reception processor 16 when the time constant is 3.5 seconds, and when the CC cell or the user cell is not received, the CC state is passed after 3.5 seconds by the expiration process. Becomes "0". Therefore, the user only needs to check the failure state feed of the memory 10. At this time, if a value other than "0" is written to the AIS state feed 22, the AIS state is lost. If a value other than "0" is written to the RDI state feed 24, the RDI state is entered. It will be missing. In addition, when "0" is written in the CC state feed 26, it can be seen that the CC fail state.

Therefore, as the fault condition is handled by the hardware separate from the CPU, the fault condition can be processed without the load of the CPU.

Meanwhile, in the above description of the present invention, specific embodiments have been described, but various modifications can be made without departing from the scope of the present invention. Particularly, in the embodiment of the present invention, three examples of AIS, RDI, and CC are shown as failure states, but the number or type of failure states may be differently applied as necessary. Similarly, the number of connections, the one cell time, the number of processing sections within one cell time, the state value, and the like may be applied as necessary. Therefore, the scope of the invention should not be defined by the described embodiments, but should be defined by the equivalent of claims and claims.

As described above, the present invention has an advantage of preventing malfunction or loss of the OAM cell due to an increase in the load of the CPU as the failure state processing is handled by hardware separate from the CPU in the ATM network.

Claims (18)

In the maintenance operation management fault condition processing method in asynchronous transmission mode network, Allocating a failure state feed to indicate a failure state to each of storage areas of a memory for correspondingly storing connection information for each of the connections of the asynchronous transmission mode network; Fault condition processing A process of writing a value to maintain a state corresponding to a received cell to a fault state feed corresponding to a corresponding connection each time a cell for maintenance operation management is received; And checking the status values of the failure status feeds for the connections sequentially one by one at a predetermined period, and changing them by a predetermined unit value if they have not expired. The method of claim 1, wherein the predetermined period is one cell time. The fault condition processing method according to claim 1, wherein the change is to reduce the state value by the unit value. 4. The method of claim 3, wherein the expiration value is set to zero and the unit value is one. In the maintenance operation management fault condition processing device in the asynchronous transmission mode network, A memory having storage areas for correspondingly storing connection information for each of the connections of the asynchronous transmission mode network, and each of the storage areas being allocated a failure state feed for indicating a failure state; A cell reception processing unit for writing a value in which a state corresponding to a received cell should be maintained in a failure state feed corresponding to a corresponding connection each time a cell for fault condition processing maintenance operation management is received; An expiration processing unit which sequentially checks the state values of the connections one by one at a predetermined period and changes them by a predetermined unit value when they have not expired; And a memory access arbiter for arbitrating access to the memory of the cell receiving processing section and the expiration processing section. The fault condition processing apparatus according to claim 5, wherein the predetermined period is one cell time based on a cell synchronization signal synchronized with an incoming cell. The fault condition processing apparatus according to claim 5, wherein the expiration processing unit changes the state value by decreasing the unit value. The fault condition processing apparatus according to claim 5, wherein the expiration value is set to 0 and the unit value is 1. The fault condition processing apparatus according to claim 6, wherein the cell reception processing unit and the expiration processing unit alternately operate for one section for a plurality of sections in which the one cell time is divided. The fault condition processing according to claim 6, wherein the cell receiving processing unit operates for one section of two sections in which the one cell time is divided, and the expiration processing section operates for the remaining one section of the two sections. Device. The fault condition processing apparatus according to claim 5, wherein the state value is set according to a fault condition processing condition. In the maintenance operation management fault condition processing device in the asynchronous transmission mode network, Storage areas for correspondingly storing one connection information for each connection of the asynchronous transmission mode network, and each of the storage areas includes an AIS state feed, an RDI state feed, and a CC state to indicate a failure state. The memory to which the shield is allocated, Whenever one of an AIS cell, an RDI cell, and a CC cell / user cell is received, a value for which a state corresponding to the received cell among the AIS state, the RDI state, and the CC state is to be maintained is avoided. A cell reception processing unit for writing to a corresponding one of a shield, an RDI state feed, and a CC state feed; An expiration processing unit which checks the AIS state value, the RDI state value, and the CC state value of the connections one by one at a predetermined period, and changes the unit value by a predetermined unit value when it has not expired; And a memory access arbiter for arbitrating access to the memory of the cell receiving processing section and the expiration processing section. The fault condition processing apparatus according to claim 12, wherein the predetermined period is one cell time based on a cell synchronization signal synchronized with an incoming cell. The fault condition processing apparatus according to claim 12, wherein the expiration processing unit changes the state value by decreasing the unit value. The fault condition processing apparatus according to claim 14, wherein the expiration value is set to 0 and the unit value is 1. The fault condition processing apparatus according to claim 13, wherein the cell reception processing unit and the expiration processing unit alternately operate for one section for a plurality of sections in which the one cell time is divided. The fault condition processing according to claim 13, wherein the cell receiving processing unit operates for one section of two sections in which the one cell time is divided, and the expiration processing section operates for the remaining one section of the two sections. Device. The fault condition processing apparatus according to claim 12, wherein the state value is set according to a fault condition processing condition.

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