KR100251148B1 - Method for driving three electrodes surface discharge plasma display panel - Google Patents

Abstract

PURPOSE: A method for driving a three electrode surface discharge plasma display panel is provided to prevent a duplicate display of an image by displaying odd and even field signals only on odd and even numbered horizontal display lines, respectively. CONSTITUTION: Image signals of an even field is divided into a plurality of sub fields having different luminances. The plurality of sub fields are sequentially displayed in an order of a reset period which resets all cell of an even line among a horizontal line, an address period which scans the even line to select a cell corresponding to a sub field value, and a sustain discharge period which displays the selected cell. Image signals of an odd field is divided into a plurality of sub fields having different luminances. The plurality of sub fields are sequentially displayed in an order of a reset period which resets all cell of an odd line among a horizontal line, an address period which scans the odd line to select a cell corresponding to a sub field value, and a sustain discharge period which displays the selected cell.

Description

Driving method of 3-electrode surface discharge plasma display panel

The present invention relates to a method of driving a three-electrode surface discharge plasma display panel (hereinafter referred to as a three-electrode surface discharge, PDP), and in particular, displays an image signal transmitted in an interlaced system on a three-electrode surface discharge PDP. It relates to a method of driving a three-electrode surface discharge PDP.

As the modern society is called the information society, the importance of display increases with the development and spread of information processing system, and its kinds are gradually diversified.

CRT (Cathode Ray Tube), which has been the most used display for a long time, has various problems such as large size, high operating voltage, and distortion of display. Recently, research and development of various flat displays having a matrix structure have been actively progressed since they are not suitable.

Among the flat panel displays, PDP (Plasma Diplay Panel) is in the spotlight as the next-generation large-screen flat panel display. The PDP has a large screen and a small thickness, and has been applied to wall-mounted televisions, home theater displays, workstation monitors, and the like.

FIG. 1 shows a simplified configuration of a three-electrode surface discharge PDP, one of the most commonly used PDPs, and a driving device for displaying a moving image or still image on the three-electrode surface discharge PDP. It is.

In FIG. 1, reference numeral 10 denotes N first holding electrodes Y ₁ to Y _N and N second holding electrodes X ₁ to X _{N that} are alternately arranged in parallel with each other, and the first holding electrode. Surface discharge with _M address electrodes A ₁ to A _M arranged to be orthogonal to the electrodes Y ₁ to Y _N and the second holding electrodes X ₁ to X _N with a predetermined space therebetween PDP. Here, one end of the second holding electrodes (X ₁ to X _N or X) is connected in common, and the first holding electrodes (Y ₁ to Y _N ) are independent of each other, and the N first holding electrodes ( A cell is formed at each intersection of Y ₁ to Y _N and the second holding electrode X and the M address electrodes A ₁ to A _M , so that the entire screen of the three-electrode surface discharge PDP 10 is formed in a matrix form M. FIG. It consists of x N cells. In addition, the N first and second sustain electrode pairs Y ₁ X ₁ , Y ₂ X ₂ ,..., Y _N X _N correspond to N horizontal display lines of the entire screen, respectively.

The configuration of each cell of the three-electrode surface discharge PDP 10 will be described by taking the cells of the i-th row and the j-th column shown in FIG. 2 as an example.

First, the i-th first holding electrode Y _i and the i-th second holding electrode X _i parallel to each other are formed on one surface of the front substrate 11, which is a display surface of an image, and the first holding electrode ( A dielectric layer 12 is formed on Y _i ) and the second holding electrode X _i to limit the discharge current during discharge and facilitate the generation of wall charges, and sputtering occurs during discharge on the dielectric layer 12. from there the first sustain electrodes (Y _i) and the second sustain electrodes (X _i) and dielectric layer 12 of magnesium oxide (MgO) protective layer 13 for protecting these are formed.

Further, the j-th address electrode A _j is formed on the opposite surface to the front substrate 11 among the back substrates 14 arranged in parallel with the front substrate 11 at a predetermined distance therebetween, and the front substrate First and second barrier ribs 15a and 15b are arranged between the 11 and the rear substrate 14 to prevent inter-cell mixing and to secure a discharge space. The first and second barrier ribs are arranged on the address electrode A _j and the first and second barrier ribs. Phosphor 16 is applied to a part of 15a and 15b, and a discharge gas is injected into the discharge space.

The basic driving principle of each cell of the three-electrode surface discharge PDP 10 configured as described above generates a discharge between the first holding electrode Y _i and the address electrode A _j to make the discharge gas into a plasma state to generate ultraviolet rays. The ultraviolet rays excite the phosphor 16 so that visible light is generated, and discharge is generated between the first holding electrode Y _i and the second holding electrode X _i to maintain the generation of the visible light.

In addition, in FIG. 1, reference numeral 20 denotes a Y driving unit in which one end of the first holding electrodes Y ₁ to Y _N is connected to the output terminal in a one-to-one correspondence, and 30 denotes the second holding electrodes X. One end represents an X driver connected in common to the output terminals, 40 represents an address driver in which one end of the address electrodes A ₁ to A _M is connected in one-to-one correspondence, and 50 represents various external inputs. Accordingly, a control unit generates various driving voltage waveforms and control signals and supplies them to the X driving unit 20, the Y driving unit 30, and the address driving unit 40.

More specifically, the controller 50 digitizes the analog image signal IMAGE input from the outside to output a digital image signal, and the digital image signal, the clock CLK, the horizontal synchronization signal HS and the vertical synchronization signal According to VS), various driving voltage waveforms and control signals are generated.

On the other hand, the gray scale implementation of each cell of the three-electrode surface discharge PDP 10 configured as described above is implemented through the number of discharges per unit time because the intensity of the discharge is difficult to adjust, and each frame When the number of discharges of cells is divided into 0 ~ 2 ^X -1 discharges, the brightness of each cell changes according to the number of discharges during one frame, resulting in a 2 ^× grayscale image of the entire screen, that is, 0 ~ 2 ^X -1 level for each cell. One level of image is displayed.

One of the gradation implementation methods based on the above concept is the ADS subfield method (Addressing and Display System sub-field method), and the ADS subfield method has two types, each cell being on and off. Using a binary X bit system based on operating in a state and implementing 2 ^X gradations, one frame is divided and driven into X subfields having different discharge counts (i.e., discharge sustain periods).

Next, an image display process according to the conventional ADS subfield method will be described in more detail.

First, one frame is divided into X subfields to drive 2 ^X gray scales, and each subfield is divided into a reset period, an address period, and a discharge sustain period.

In the above-described reset period of each subfield, a writing pulse having a voltage higher than the discharge start voltage is applied between all of the first sustaining electrodes Y ₁ to Y _N and the second sustaining electrodes X. All the cells of the electrode surface discharge PDP 10 are discharged and emitted to generate wall charges therein, and then an OV is applied for a predetermined time to erase the internal wall charges of each cell. The address pulse is applied by selectively applying an address pulse having a voltage higher than a discharge start voltage between all of the first sustain electrodes Y ₁ to Y _N and the address electrodes A ₁ to A _M. Only the cell is turned on to generate wall charges therein, and the discharge sustain period is a voltage lower than the discharge start voltage between the entire first sustaining electrodes Y ₁ to Y _N and the second sustaining electrodes X. The wall created in the previous address period And a period for applying a sustain pulse (sustain pulse) of the same polarity to maintain the discharge and light emission of the ondoen cell in the address period.

In the above, the relative ratio of the number of sustain pulses applied between the first sustain electrodes Y ₁ to Y _N and the second sustain electrodes X during the discharge sustain period of each subfield is usually 2 ⁰ : 2 ¹ : 2 ² : 2 ³ : 2 ⁴ :. : 2 ^X-2 : 2 ^X-1 to enable 2 ^X gradation.

In addition, the brightness of each subfield screen should also consider the brightness due to the write discharge in the reset period and the address discharge in the address period, but for convenience of understanding, the write discharge and the address discharge do not contribute to the brightness of the screen and sustain the discharge sustain period. Assume that only the discharge contributes to the brightness of the screen.

In addition, conventionally, the type of signal input from the outside is transmitted in a sequential system (for example, sequential systam) image signal-for example, VGA (Video Graphic Array) signal-image signal transmitted in a cognitive interlacing method-for example, NTSC Television signal of type-different driving method is adopted depending on recognition.

That is, the image signals transmitted in the sequential manner (hereinafter, referred to as sequential signals) are input after 1/60 seconds because all image signals corresponding to the cells of the entire horizontal display line are input for 1/60 seconds (about 16.67 ms). While one frame of sequential recall is displayed on the electrode surface discharge PDP 10, the image signal transmitted in the interlaced manner (hereinafter referred to as interlaced signal) is first displayed in the cells of the even-numbered horizontal display lines among the entire horizontal display lines. After a corresponding image signal (hereinafter referred to as an even field signal) is input for 1/60 second, an image signal corresponding to the cells of the remaining odd horizontal display line (hereinafter referred to as an odd field signal) is next 1/60 second. Since the interlaced image of one frame can be displayed on the three-electrode surface discharge PDP 10 only after 1/30 seconds (about 33.34 ms), the driving method is different in each case.

Hereinafter, a process of displaying a sequential signal continuously input from the outside on the three-electrode surface discharge PDP will be described in more detail with reference to a timing diagram of some driving voltage waveforms applied to the electrodes shown in FIG. 3.

First, in the reset period of each subfield, as shown in FIG. 3, the second holding is performed while OV is applied to all the address electrodes A ₁ to A _M and the first holding electrodes Y ₁ to Y _N. A write pulse of the voltage Vw is applied to the electrodes X to cause a write discharge between the first and second sustain electrodes Y ₁ to Y _N and the second sustain electrode X. At this time, + wall charges are generated on the inner first sustain electrodes Y ₁ to Y _N side of the entire cell, and − wall charges are generated on the second sustain electrode X side.

Thereafter, the voltages applied to the entire address electrodes A ₁ to A _M and the first holding electrodes Y ₁ to Y _N are kept at OV for a predetermined time t, and the second holding electrode X is kept at the same time. When OV is applied, self-erasing discharge is generated between + and-wall charges generated by the write discharge, and after a predetermined time t, the wall charges generated inside the entire cell are erased.

In the address period of each subfield, the N first sustain electrodes in the state where OV is applied to all the address electrodes A ₁ to A _M , the first sustain electrodes Y ₁ to Y _N , and the second sustain electrode X. s (Y ₁ ~ Y _N) sequentially one by one scan pulse voltage -Vs (scan pulse) is applied at the same time the entire address electrodes (a ₁ ~ a an image pulse (image pulse) of the voltage Va synchronized with the scan of the peoldeu that _It is selectively applied to _M ) so that an address discharge occurs only inside a cell to which an address pulse of Va + Vs voltage is applied between the first sustain electrode and the address electrode.

During the discharge sustain period of each subfield, the entire second sustain electrode is provided with OV applied to the entire address electrodes A ₁ to A _M , the first sustain electrodes Y ₁ to Y _N , and the second sustain electrode X. A sustain pulse of Vs voltage alternated to (X) and the first holding electrodes Y ₁ to Y _N is applied to maintain discharge and light emission of the cells turned on in the immediately preceding address period.

In addition, the voltage pulses Vw, Vf (discharge start voltage), Vs, and Va applied to each electrode are set to voltage values satisfying Vw >>Vf> Vs and Va + Vs> Vf, and The image pulse applied to the address electrodes A ₁ to A _M during the address period corresponds to one bit value among the X bit sequential image signals (lowest bit B ₁ to highest bit B _X ) corresponding to each cell. more specifically, the first two B ₁ during the address period of the subfield, a 2 B ₂ is, for eodeure w period of the subfield ... During the address period of the X subfield, B _X is applied.

As a result, when the first to X subfield screens are sequentially configured for 1/60 second through the detailed process described above, one frame of progressive images is displayed on the three-electrode surface discharge PDP 10.

In addition, various driving voltage waveforms shown in FIG. 3 are applied to the corresponding electrodes through the Y driver 20, the X driver 30, and the address driver 40, respectively, and the timing is controlled by the controller 50. do.

Next, the process of displaying the interlaced signal continuously input from the outside on the three-electrode surface discharge PDP will be described.

In general, the driving device of the three-electrode surface discharge PDP shown in FIG. 1 is designed to be suitable for the sequential signal display process described above. When only image signals corresponding to cells (even field signals or odd field signals) are inputted, image signals corresponding to cells of remaining horizontal display lines to which no external image signals are inputted to cells of odd or even horizontal display lines After generating the corresponding image signal by itself, it was required to display on the three-electrode surface discharge PDP 10 through the same process as the sequential signal display method described above.

In other words, line doubling using an even field signal (an image signal corresponding to cells of an even horizontal display line) input from the outside during the first 1/60 second of 1/30 second which is a frame composition time of interlaced images. ) And an even field screen on the three-electrode surface discharge PDP 10 according to the sequential signal display process, and an odd field signal (an image corresponding to cells of an odd horizontal display line) input from the outside for the next 1/60 second. In accordance with the line doubling and the sequential signal display process, an odd field bottom surface is also formed on the three-electrode surface discharge PDP 10.

In the above, line doubling refers to an even or odd field signal input from an external source as a corresponding picture signal of cells of odd-numbered or even-numbered horizontal display lines positioned directly above or below each of which no corresponding picture signal is input. Say that.

For example, when displaying a 1 frame interlaced image shown in FIG. 4 on a 16 × 12 screen, the even field screen has 16 × 3 cells in each even horizontal display line as shown in FIG. 5A. ), The image signal corresponding to) is overlapped with the corresponding image signal of the cells (16x3) of the odd-numbered horizontal display lines positioned directly above each other, and each odd-numbered horizontal display is shown on the odd field screen as shown in FIG. 5B. The image signals corresponding to the cells of the display line (16x3) are displayed in duplicate by the corresponding image signals of the cells (16x3) of the even-numbered horizontal display line located directly below each, resulting in the even field screen and the odd field. On the one-frame screen composed of overlapping screens, an image different from the original image (shown in FIG. 4) is displayed as shown in FIG. 5C.

That is, when the interlaced signal input from the outside is displayed on the three-electrode surface discharge PDP according to the line doubling method as in the prior art, there is a problem in that the image quality is deteriorated due to the overlapping display of the image as shown in FIG. 5C.

The present invention has been made to solve the above problems, and instead of displaying the image signal transmitted by interlacing by line doubling, the even field signal is displayed only on the even horizontal display line, and the odd field signal is displayed on the odd horizontal display. It is an object of the present invention to provide a method for driving a three-electrode surface discharge PDP which can improve image quality by preventing overlapping of images by displaying only lines.

In addition, the present invention displays an image only on an even-numbered horizontal display line or an odd-numbered horizontal display line for 1/2 frame to reduce the address period of each subfield to 1/2 of the prior art, and the reduced address period is discharge discharge period. Another object of the present invention is to provide a method of driving a three-electrode surface discharge PDP capable of increasing the brightness of the entire screen by assigning to.

In addition, the present invention applies a write pulse only between the first and second sustain electrodes corresponding to the entire even-numbered horizontal display lines in the reset period of each subfield for the configuration of the even-field screen, and configures the odd-field screen. In the reset period of each subfield, a write pulse is applied only between the first and second sustain electrodes corresponding to the entire odd-numbered horizontal display lines to determine the number of write discharges occurring in the cells of each horizontal display line during one frame driving time. Another object of the present invention is to provide a method of driving a three-electrode surface discharge PDP that can improve contrast of the entire screen by reducing the contrast.

1 is a block diagram showing a simplified configuration of a typical three-electrode surface discharge plasma display panel and a driving device thereof.

FIG. 2 is a cross-sectional view of one cell of the three-electrode surface discharge plasma display panel shown in FIG. 1, with the front substrate rotated 90 degrees.

3 is a timing diagram of some drive voltage waveforms applied to each electrode according to the prior art.

FIG. 4 is a diagram showing an interlaced image to be displayed on a screen of a 16 × 12 corresponding figure. FIG.

5a to c are views showing a process in which the interlaced image shown in FIG. 4 is displayed on a screen of 16 × 12 resolution according to the prior art.

6 is an electrode structure diagram of a three-electrode surface discharge PDP to which an embodiment of the present invention is applied.

7 is a timing diagram of driving voltage waveforms applied to each electrode during a first field according to an embodiment of the present invention.

8 is a timing diagram of driving voltage waveforms applied to each electrode during a second field according to an embodiment of the present invention.

9a to c are views showing a process in which the interlaced image shown in FIG. 4 is displayed on a screen of 16 × 12 resolution according to an embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

10: 3-electrode surface discharge plasma display panel 20: Y drive unit

30: X driver 40: address driver

50: control unit

In order to achieve the above object, the driving method of a three-electrode surface discharge PDP according to the present invention includes a plurality of first holding electrode lines corresponding to each horizontal display line of the entire screen and parallel to the first holding electrode line. And intersection points of a second sustain electrode line commonly connected to an even line and an odd line, respectively, and a plurality of address electrodes formed to be orthogonal to each other with a predetermined space therebetween; A method of driving a three-electrode surface discharge PDP in which an interlaced scanning video signal in which one frame is divided into an even field and an odd field is input to a plasma display panel in which cells are formed each time. Each of the subfields is divided into a plurality of subfields having different luminance and sequentially inputted. An even-line display step of sequentially displaying a reset period for resetting all of the phosphorus cells; an address period for scanning the even-numbered lines to select a cell corresponding to the subfield value; and a sustain discharge period for displaying the selected cells; The video signal of the odd field is divided into a plurality of subfields having different luminance, respectively, in turn, and each subfield has a reset period for resetting all the cells of the odd line among the horizontal lines, and the subfield by scanning the odd line. And an odd line display step of sequentially displaying an address period for selecting a cell corresponding to the field value and a sustain discharge period for displaying the selected cell.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in more detail.

6 illustrates an electrode structure diagram of a three-electrode surface discharge PDP to which an embodiment of the present invention is applied.

The detailed structure of the three-electrode surface discharge PDP to which an embodiment of the present invention is applied is the same as the three-electrode surface discharge PDP described in the prior art, but the N second holding electrodes X ₁ to X _N are different from the prior art. One end of the second holding electrodes X ₁ , X ₃ , X ₅ ,..., X _N-3 , X _N-1 or Xo corresponding to the odd-numbered horizontal display line and the first even-numbered horizontal display line. One end of the two holding electrodes X ₂ , X ₄ , X ₆ ,..., X _N-2 , X _N or Xe is commonly connected separately, and the N first holding electrodes Y ₁ to Y _N As in the prior art, each is independent.

In order to display an interlaced signal which is divided into an even field signal and an odd field signal on the three-electrode surface discharge PDP, the driving method of the three-electrode surface discharge PDP according to an embodiment of the present invention includes one frame of even field signals. Each of the X and D fields is divided into a first field and a second field indicating an odd field signal, and each of the X fields is manufactured according to manufacturing (2 ^X ) to be implemented as described in the prior art. The drive is divided into subfields, and each of the subfields is divided into reset periods, address periods, and discharge sustain periods.

In the above-described reset period of each subfield of the first field, the first sustain electrodes Y ₂ , Y ₄ ,..., Y _N-2 , Y _N and the second sustain corresponding to the even-numbered horizontal display lines of the entire screen. After applying a write pulse having a voltage greater than the discharge start voltage only between the electrodes Xe to generate wall charges only in the cells of the entire even-numbered horizontal display lines, the first holding corresponds to the entire even-numbered horizontal display lines for a predetermined time. OV is applied to the electrodes Y ₂ , Y ₄ ,..., Y _N-2 , Y _N and the second holding electrodes Xe to erase wall charges generated in each cell due to the writing pulse. In the reset period of each subfield of the second field, the first holding electrodes (Y ₁ , Y ₃ ,..., Y _N-3 , Y _N-1 ) and the second corresponding to the odd-numbered horizontal display lines of the entire screen. The write pulse is applied only between the sustain electrodes Xo, so that the wall charge is only inside the cells of the entire odd-numbered horizontal display line. After generating the first sustain electrode corresponding to the entire odd horizontal display lines for a predetermined time _{(Y 1, Y 3, ...} , Y N-3, Y N-1) in and second sustain electrodes (Xo) OV Is applied to erase wall charges generated in each cell due to the writing pulse.

Further, in the address period of each subfield of the first field, first sustain electrodes Y ₂ , Y ₄ ,..., _{N N} corresponding to even-numbered horizontal display lines of the entire screen according to the even-field signals continuously input. _-2 , Y _N ) and an address pulse of a voltage greater than the discharge start voltage is selectively applied between the entire address electrodes A ₁ to A _M to turn on only the cells to which the address pulse is applied among the cells of the even-numbered horizontal display lines. In the address period of each subfield of the second field, first sustain electrodes Y ₁ , Y ₃ ,..., And _{N N} corresponding to odd-numbered horizontal display lines of the entire screen according to consecutive odd field signals. The address pulse is selectively applied between _-3 , Y _N-1 ) and the entire address electrodes A ₁ to A _M to turn on only the cells to which the address pulse is applied among the cells of the entire odd-numbered horizontal display lines.

Further, in the discharge sustain period of each subfield of the first field, the first holding electrodes Y ₂ , Y ₄ ,..., Y _N-2 , Y _N corresponding to even-numbered horizontal display lines of the entire screen, and A sustain pulse having a voltage lower than the discharge start voltage and having the same polarity as the wall charge generated in the immediately preceding address period is applied only between the holding electrodes Xe to maintain discharge and light emission of the cell turned on in the immediately preceding address period. In the discharge sustain period of each subfield of the second field, the first holding electrodes Y ₁ , Y ₃ ,..., Y _N-3 , Y _N-1 and the second corresponding to the odd horizontal display lines of the entire screen. The sustain pulse is applied only between sustain electrodes Xo to maintain discharge and light emission of the cells turned on in the immediately preceding address period.

In addition, the first holding electrodes Y ₁ , Y ₃ ,..., Y _N-3 , Y _N-1 and the second holding electrodes Xo corresponding to odd-numbered horizontal display lines of the entire screen during the first field. OV is applied to all cells of the entire odd-numbered horizontal display lines at a black level, and during the second field, the first sustain electrodes Y ₂ , corresponding to the even-numbered horizontal display lines of the entire screen. OV is applied to all of Y ₄ ,..., Y _N-2 , Y _N ) and the second sustain electrodes Xe to display the cells of the entire even-numbered horizontal display lines at the black level.

An embodiment of the present invention described above will be described in more detail with reference to a timing diagram of driving voltage waveforms applied to each electrode of the three-electrode surface discharge PDP shown in FIGS. 7 and 8.

First, in order to display an interlaced image of 2 ^X gradation on the three-electrode surface discharge PDP shown in FIG. 6, one frame is divided into a first field and a second field, and the first field and the second field are respectively The subfields are divided into X subfields, and each subfield is divided into a reset period, an address period, and a discharge sustain period.

More specifically, in the reset period of each subfield of the first field, OV is applied to all the address electrodes A ₁ to A _M and the first sustain electrodes Y ₁ to Y _N , as shown in FIG. 7. N / 2 first sustain electrodes Y ₂ , Y ₄ ,... Corresponding to the even horizontal display liner by applying a writing pulse of the voltage Vw to only the second sustain electrodes Xe corresponding to the even horizontal display lines in. , Y _N-2 , Y _N ) and the write discharge occur only between the second holding electrode Xe. At this time, positive wall charges are generated on the internal first sustain electrodes Y ₂ , Y ₄ ,..., Y _N-2 , Y _N side of the cell where the write discharge has occurred, and negative wall charges are formed on the second sustain electrode Xe side. Is generated.

Thereafter, the voltages applied to the entire address electrodes A ₁ to A _M and the first holding electrodes Y ₁ to Y _N are continuously maintained at OV for a predetermined time t, and the second holding electrodes Xe and Xo are maintained. When OV is applied, branch erase discharge occurs between + and-wall charges generated by the write discharge, and after a predetermined time (t), the wall charges generated inside each cell corresponding to the even-numbered horizontal display line are erased. do.

In the address period of each subfield of the first field, OV is applied to all the address electrodes A ₁ to A _M , the first sustain electrodes Y ₁ to Y _N , and the second sustain electrodes Xe and Xo. The scan pulses of -Vs voltages are sequentially applied to the N / 2 first sustain electrodes Y ₂ , Y ₄ ,..., Y _N-2 , Y _N corresponding to even-numbered horizontal display lines. By selectively applying the image pulse of Va voltage synchronized to the entire address electrodes A ₁ to A _M , address discharge occurs only in a cell in which an address pulse of Va + Vs voltage is applied between the first holding electrode and the address electrode. Turn on

In the discharge sustain period of each subfield of the first field, OV is applied to all the address electrodes A ₁ to A _M , the first holding electrodes Y ₁ to Y _N , and the second holding electrodes Xe and Xo. Apply a sustain pulse of Vs voltage alternately to the second holding electrode Xe and the first holding electrode Y ₂ , Y ₄ ,..., Y _N-2 , Y _N corresponding to the even horizontal display line in FIG. The discharge and light emission of the cells turned on in the previous address period are maintained.

As a result, when the first to X subfield screens are sequentially configured through the detailed process described above for 1/60 seconds while the even field signal is input, the first field screen, that is, the even field screen is displayed on the three-electrode surface discharge PDP. It is composed.

Meanwhile, in the reset period of each subfield of the second field, as shown in FIG. 8, OV is applied to all the address electrodes A ₁ to A _M and the first holding electrodes Y ₁ to Y _N. N / 2 first sustain electrodes Y ₁ , Y ₃ ,..., Corresponding to an odd horizontal display line by applying a writing pulse of a Vw voltage to only the second sustain electrodes Xo corresponding to the odd horizontal display lines. The write discharge occurs only between Y _N-3 , Y _N-1 ) and the second sustain electrode Xo. At this time, + wall charges are generated on the internal first sustaining electrodes Y ₁ , Y ₃ ,..., Y _N-3 , Y _N-1 of the cell where the write discharge has occurred, and − on the second sustaining electrode Xo side. Wall charges are generated.

Thereafter, the voltages applied to the entire address electrodes A ₁ to A _M and the first holding electrodes Y ₁ to Y _N are continuously maintained at OV for a predetermined time t, and the second holding electrodes Xe and Xo are maintained. When OV is applied, branch erase discharge occurs between + and-transformation charges generated by write discharge, and after a predetermined time (t), wall charges generated inside each cell corresponding to the odd horizontal display line are erased. do.

In the address period of each subfield of the second field, OV is applied to all the address electrodes A ₁ to A _M , the first holding electrodes Y ₁ to Y _N , and the second holding electrodes Xe and Xo. Scan pulses of a -Vs voltage are sequentially applied to the N / 2 first sustain electrodes Y ₁ , Y ₃ ,..., Y _N-3 , Y _N-1 corresponding to odd-numbered horizontal display lines. An image pulse of Va voltage synchronized with the scan pulse is selectively applied to all the address electrodes A ₁ to A _M so that an address is applied only in a cell in which an address pulse of Va + Vs voltage is applied between the first holding electrode and the address electrode. Allow discharge to occur and turn on.

In the discharge sustain period of each subfield of the second field, OV is applied to all the address electrodes A ₁ to A _M , the first holding electrodes Y ₁ to Y _N , and the second holding electrodes Xe and Xo. Applies a sustain pulse of Vs voltage alternately to the second sustain electrode Xo and the first sustain electrode Y ₁ , Y ₃ ,..., Y _N-3 , Y _N-1 corresponding to the odd-numbered horizontal display lines in The discharge and light emission of the cells turned on in the immediately preceding address period are maintained.

As a result, when the first to X subfield screens are sequentially configured through the above-described detailed process for 1/60 second while the odd field signal is input, the second field screen, that is, the odd field screen, is displayed on the three-electrode surface discharge PDP. It is composed.

In addition, the voltage pulses Vw, Vf (discharge start voltage), Vs, and Va applied to each electrode are set to voltage values satisfying Vw >>Vf> Vs and Va + Vs> Vf as in the prior art. The image pulse applied to the address electrodes A ₁ to A _M during the address period of each subfield is one bit value of the X bit interlaced image signal (lowest bit B ₁ to highest bit B _N ) corresponding to each cell. More specifically, B ₁ during the address period of the first subfield, B ₂ during the address period of the second subfield,. During the address period of the Xth subfield, _BX is respectively applied.

On the other hand, the contrast of the three-electrode surface discharge PDP screen may be determined by the number of writing discharges occurring in one cell when all cells are displayed at the black level.

That is, when displaying an image on an even-numbered horizontal display line or an odd-numbered horizontal display line as in the above-described embodiment of the present invention, the first and first corresponding to the remaining odd-numbered horizontal display lines or even-numbered horizontal display lines. If the write pulse is not applied between the two holding electrodes, the number of write pulses applied per cell is reduced to 1/2 of the prior art during 1/30 second, which is the frame time of one frame display of the interlaced signal, thereby improving the contrast of the entire screen. Results.

For example, when displaying an interlaced image of 256 (2 ⁸ ) gradations on a three-electrode surface discharge PDP with a resolution of 640x480, one embodiment of the present invention is one horizontal for one frame driving time (1/30 second). Since eight write pulses are applied to each cell of the display line, while the prior art applies 16 write pulses to each cell of one horizontal display line, one embodiment of the present invention provides more black in each cell than the prior art. Looks blacker

In addition, when looking at the aspect of the entire screen, the conventional technology shows that 640 (the number of vertical display lines) × 480 (the number of horizontal display lines) × 3 (one pixel) on the entire screen during the configuration time (1/60 total) of one field screen. Consists of 3 cells (R (Red), G (Green), B (Blue)) × 8 (number of subfields for 256 grayscale implementation) = 7372800 write pulses are applied, while one embodiment of the present invention 640 (number of vertical display lines) × 240 (number of even or odd horizontal lines) × 3 (one pixel consists of R, G, and B cells) × 8 (number of subfields for 256 grayscale implementation) = 3686400 In other words, since the write pulse corresponding to 1/2 of the prior art is applied, and the black screen is displayed more and more black, the contrast is improved compared to the prior art.

In addition, the luminance of the three-electrode surface discharge PDP screen may be determined by the number of sustain discharges occurring in one cell when all cells are displayed at a white level.

For example, when displaying an interlaced image of 256 (2 ⁸ ) gradations on a three-electrode surface discharge PDP with 640x480 resolution, the conventional technique is 1 when the address period is 3 ms and the reset period in one subfield is 300 ms. Reset period is 300 ms × 8 (number of subfields for 256 gradation implementation) × 2 (frame count) = 4.8 ms for 30 seconds, and address period is 3 ms × 480 (number of horizontal display lines) × 8 (256 gradations) Number of subfields for implementation) × 2 (number of frames) = 23.04 ms, so that the discharge sustain period is 33.34 ms-23.04 ms-4.8 ms = 5.5 ms for 1/30 sec. Reset period is 300 ms × 8 (number of subfields for 256 grayscale implementation) × 2 (number of fields) = 4.8 ms for 30 seconds, and address period is 3 ms × 240 (number of even or odd horizontal display lines) × 8 (Number of subfields to implement 256 gradations) × 2 (Number of fields) = 11.52ms, so the discharge sustain period for 1/30 second 33.34ms-11.52ms-4.8ms = 17.02ms.

As described above, in one embodiment of the present invention, since the discharge sustain period is three times longer than 1/3 for the prior art, one or more horizontal display lines to assume that the sustain frequency of the embodiment of the present invention and the prior art are the same. The number of sustain pulses (discharge sustain period x sustain frequency) applied to the cells of R is more than three times greater than that of the prior art, and thus the luminance of the entire screen is greatly increased.

This can be done by assigning an address period, which is shorter than in the prior art, to the discharge sustain period which contributes to the brightness of the screen in the case of one embodiment of the present invention.

In addition, when the image shown in FIG. 4 is displayed on a screen of 16 × 12 degree according to an embodiment of the present invention, only the cells of even-numbered horizontal display lines are shown in the first field as shown in FIG. 9A. An image is displayed, and as shown in FIG. 7B, only the cells of odd-numbered horizontal display lines are displayed in the second field so that the first field screen and the second field screen are overlapped after 1/30 second. On the one frame screen, the same image as that of the original image (shown in FIG. 4) is displayed as shown in FIG. 9C.

That is, according to an exemplary embodiment of the present invention, since the image is not displayed when the screen of the first field screen or the second field is overlapped as in the prior art, the original image input from the outside is displayed on the screen as shown in FIG. 9C. It can be displayed as it is, thereby greatly improving the image quality.

As described above, in the driving method of the three-electrode surface discharge PDP according to the present invention, the even field signal is displayed only on the even horizontal display line, and the odd field signal is displayed on the odd-numbered horizontal display, instead of displaying the image signal transmitted by the interlacing method by line doubling. Instead of reducing the address period of each subfield to 1/2, the display period is additionally assigned to the discharge sustain period, so that the brightness of the three-electrode surface discharge PDP screen can be greatly increased. Image quality can be improved by preventing overlapping display of images when the two-field screen is configured.Only between the first and second holding electrodes corresponding to the even-numbered or odd-numbered horizontal display lines, respectively, when the first or second field is driven. Since the write pulse is applied, the number of write pulses applied to each cell during one frame is reduced to 1/2, so that the contrast of the three-electrode surface discharge PDP screen is reduced. The effect to improve.

Claims (1)

A plurality of first sustain electrode lines corresponding to each horizontal display line of the entire screen, and a second sustain electrode line which is formed in parallel with the first sustain electrode line and connected in common so that a common voltage is applied to even and odd lines, respectively; And a frame of a frame in an even field and an odd field in a plasma display panel in which cells are formed at intersections of a plurality of address electrodes formed to be orthogonal to each other with a predetermined space therebetween. In the driving method of a three-electrode surface discharge PDP displaying an interlaced video signal which is dividedly input, the even field is divided into a plurality of subfields having different luminance and inputted in sequence, and each subfield Is a reset period for resetting all cells of even lines of the horizontal lines, and scanning the even lines to subfield values. Yes address period for selecting a cell and consists of a sustain discharge period to display the selected cell even-line display step are displayed in turn to the; The video signal of the odd field is divided into a plurality of subfields having different luminance, respectively, and inputted in sequence, and each subfield scans the odd line and reset periods for resetting all the cells of the odd line. And an odd-line display step consisting of an address period for selecting a cell corresponding to the subfield value and a sustain discharge period for displaying the selected cell.

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