KR0185848B1 - The compatible encoder - Google Patents

Abstract

The present invention provides a discrete cosine converter (DCT: 21); A reduction portion 30; Low resolution subtractor 31; Low resolution vector quantizer (VQ: 32); Low resolution inverse vector quantizer (IVQ: 33); Low resolution adder 34; A motion compensator MC2: 35; Interpolation unit 29; A determination unit 28 which receives the output of the interpolation unit 29 and compares the motion-compensated high resolution with the low frequency part and outputs an interpolated video signal with motion-compensated high resolution image data if there is no difference; A first subtractor 22; A second subtractor 23; High resolution vector quantizer (VQ: 24); High resolution inverse vector quantizer (IVQ: 25); Adder 26; And a high resolution motion compensator (MCI) 27 to improve the compression efficiency of the video signal.

Description

Compatible encoder

1 is a block diagram showing a conventional compatible encoder,

2 is a block diagram illustrating a compatible encoder according to the present invention.

* Explanation of symbols for main parts of the drawings

10,12: frame memory 11: down sampler

13: encoder 14: vector quantization decoder

15: up sampler 16,22,23: subtractor

17,21: Discrete Cosine Converter 18: Quantizer

19: variable length encoder 24, 32: vector quantizer

25,33: inverse vector quantizer 27,35: motion compensation unit

28: judgment unit 29: interpolation unit

30: reduction portion

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compatible encoder technology for separating and encoding a video signal into a high resolution video signal and a low resolution video signal. More particularly, the present invention relates to a compatible encoder having increased compression ratio by motion compensation.

In general, digital image encoding techniques are widely known as transform encoding, vector quantization, band division encoding, predictive encoding, and entropy encoding, and the encoding techniques have been established by international standardization standards for still image and video encoding. Efforts are being made to obtain more advanced coding techniques by researching them.

On the other hand, compatible coding technology is widely studied for reasons different from the above coding technology, compatible coding (compatible coding) is a technology used to have compatibility between the existing TV technology and the high-definition (HD) TV in the future.

Here, the compatibility refers to the ability to decode the compressed information of the image having a high resolution into an image having a given resolution, and this compatibility is further divided into an upward compatibility and a downward compatibility. Upward compatibility is that a high-definition receiver decodes a bit string transmitted by a low-resolution encoder and then up-samples and reproduces it on the screen or reproduces a portion of the screen by the size of a low-resolution signal. Downward compatibility means that a low resolution receiver decodes and reproduces a required portion of a bit string transmitted by a high resolution encoder.

In addition, if compatibility is divided based on resolution and image quality, compatibility of resolution and image quality can be divided into resolution compatibility. It is the ability to decode and play the video, and the compatibility of the picture quality is that the receiver of the same resolution decodes all the transmitted bit strings when the transmission network is in good condition, and reproduces the high-definition video. It is the ability to play back images of basic quality.

As a result of providing compatibility by the compatible encoding technique, first, a service having a high resolution signal can be processed by a low-cost receiver, and as a result, a broadcast capable of simultaneously supporting various receivers is possible. Useful in the middle of service improvement. A representative example thereof is compatibility with a TV in the HDTV field.

Second, only a part of the entire bit string can be used. In the cable transmission network, a user can select a service according to a cost since it can be connected to a service having various rates.

In addition, another benefit of compatible encoding is called graceful degradation, which guarantees the basic image quality even when the transmission network is in a bad condition. Instead of leaving it unattended, an efficient error correction code is made in the low resolution part of the transmitted data so that the corresponding low resolution video signal can be received on the HDTV. In other words, this may be considered to be a case where a low-resolution signal is sent to a high priority cell in an ATM network.

As such, video encoding of a video signal means a function of transmitting and receiving video signals of two or more standards or formats through the same channel, thereby providing the same service to users with different receivers. do. In other words, when adopting HDTV broadcasting, all users cannot purchase expensive HDTV receivers at the beginning, so that the service provided by HDTV can be provided by general digital TV.

Conventional technology for implementing such a compatible encoding has been filed by the inventor in the patent application No. 95-7350, the compatible filer is the first frame memory (1) for storing the input image as shown in FIG. 10); A down sampler 11 for down sampling the input image of the first frame memory to form a low resolution image signal; A second frame memory 12 for storing the low resolution video signal; A PTS VQ encoder (13) for outputting a low resolution image sequence by PTS vector quantization of the low resolution image of the second frame memory (12); A PTS VQ decoder (14) for decoding the encoded sequence of the PTS VQ encoder (13); An up sampler 15 for upsampling and expanding the output of the PTS VQ decoder 14; A subtractor 16 which subtracts an output of the upsampler 15 from an input video signal of the first frame memory 10; A discrete cosine transformer 17 for discrete cosine transforming the difference image of the subtractor 16; A quantizer 18 for quantizing the output of the discrete cosine transformer 17; And a variable length encoder 19 for variable length coding the output of the quantizer 18.

In the conventional compatible encoder, the input video signal is once stored in the first frame memory 10, and is converted into a low resolution video signal by the down sampler 11 to obtain a low resolution video sequence, and then the PTS VQ encoder 13 Encoded by

On the other hand, the encoded low resolution image sequence is decoded again by the PTS VQ decoder 14 and then enlarged by interpolation in the up sampler 15. The subtractor 16 subtracts the enlarged video signal from the original input video signal to obtain a difference video signal, and the second video signal is a discrete cosine converter (DCT) 17, a quantizer (Q) 18, and a variable. It is encoded by a long coder (VLC) 19 and output as a high resolution image sequence.

However, the conventional compatible encoder as described above has a problem in that coding efficiency is low because a motion compensation part is not applied, and a large amount of data is generated in a part generating a high resolution image sequence.

Accordingly, the present invention has been made to solve the above-mentioned problems, and provides a compatible encoder that improves coding efficiency by adding a determination unit that implements motion compensation and compares an interpolated video with a motion-compensated high resolution video. The purpose is.

In order to achieve the above object, the apparatus of the present invention comprises a discrete cosine converter for receiving the image data stored in the frame memory; An reduction unit configured to receive the output of the discrete cosine converter and downsample the output; A low resolution subtractor which receives the output of the condenser and subtracts the motion compensated low resolution video signal; A low resolution vector quantizer for vector quantizing the output of the subtractor to form a low resolution image sequence; A low resolution inverse vector quantizer for receiving the output of the low resolution vector quantizer and performing inverse vector quantization; A low resolution adder for adding the output of the low resolution inverse vector quantizer to a motion compensated output; A low resolution motion compensation unit configured to compensate for motion by receiving the output of the low resolution adder; An interpolator configured to interpolate the motion-compensated low resolution output and play back the original image in size; A determination unit which receives the output of the interpolation unit and compares the motion-compensated high resolution with the low frequency part and outputs an interpolated video signal with motion compensated high resolution image data if there is no difference; A first subtractor configured to subtract the output image of the discrete cosine converter and the output image of the determination unit; A second subtractor which subtracts the output of the first subtracter from the motion-compensated high resolution image signal; A high resolution vector quantizer for outputting a high resolution image sequence by vector quantizing the output of the second subtractor; A high resolution inverse vector quantizer for inverse vector quantizing the output of the high resolution vector quantizer; A high resolution adder for adding the output of the high resolution inverse vector quantizer and a motion compensated image signal; And a high resolution motion compensator configured to compensate for the motion by receiving the output of the high resolution adder.

That is, the present invention compensates the interpolated image by comparing the low resolution interpolated image data with the high resolution motion compensated image in subtracting the low resolution image sequence from the input image to generate a high resolution image sequence. Then, the amount of data generated in the high resolution image sequence portion is reduced by subtracting from the image inputted by the first subtractor.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

As shown in FIG. 2, the compatible encoder according to the present invention includes a discrete cosine converter (DCT: 21) for receiving discrete video data from a frame memory; A reduction unit 30 which receives the output of the discrete cosine converter 21 and downsamples the output; A low resolution subtractor 31 which receives the output of the reduction unit 30 and subtracts the motion compensated low resolution video signal; A low resolution vector quantizer (VQ: 32) for vector quantizing the output of the low resolution subtractor 31 to form a low resolution image sequence; A low resolution inverse vector quantizer (IVQ: 33) for receiving the output of the low resolution vector quantizer 32 and performing inverse vector quantization; A low resolution adder (34) for adding the output of the low resolution inverse vector quantizer (33) to the motion compensated output; A low resolution motion compensator (MC2: 35) for receiving motion output of the low resolution adder 34 to compensate for the motion; An interpolation unit 29 that receives the motion-compensated low resolution output and interpolates and reproduces the original image in size; A determination unit 28 which receives the output of the interpolation unit 29 and compares the motion-compensated high resolution with the low frequency part and outputs an interpolated video signal with motion-compensated high resolution image data if there is no difference; A first subtractor 22 which subtracts an output of the determination unit 28 from an output image of the discrete cosine converter 21; A second subtractor 23 for subtracting the motion-compensated high resolution video signal from the output of the first subtractor 22; A high resolution vector quantizer (VQ: 24) for outputting a high resolution image sequence by vector quantizing the output of the second subtractor 23; A high resolution inverse vector quantizer (IVQ: 25) for inverse vector quantizing the output of the high resolution vector quantizer 24; A high resolution adder 26 for adding the output of the high resolution inverse vector quantizer 25 and a motion compensated image signal; And a high resolution motion compensator (MCI) 27 for receiving motion from the output of the high resolution adder 26 to compensate for the motion.

In addition, the low resolution motion compensator 35 and the high resolution motion compensator 27 receive an output of the adder 34 or 26 to store a frame memory storing an image of a previous frame, a previous image of the frame memory and a new input. A motion vector estimator for estimating a motion vector by comparing the images of the current frame; And a motion compensator for motion compensating a previous image by the estimated motion vector.

Next, the operation of the apparatus of the present invention configured as described above will be described.

The discrete cosine converter 21 extracts 8 × 8 blocks of image data from the frame memory and performs discrete cosine conversion. The bisine-converted output is a discrete cosine variable coefficient value of 8 × 8 blocks, which are arranged for each frequency component from the top left of the block to the bottom right of the block.

The reduction unit 30 samples the main portion of the original video signal which has been discrete cosine transformed to form basic image data having a small data amount, and the low resolution subtractor 31 moves the current frame image of the reduction unit 30 with the motion-compensated transfer. Output the difference of the frame images. The low-resolution vector quantizer 32 configures the output of the low-resolution subtractor 31 as an input vector, compares the code vector of the built-in codebook, and selects the index of the code vector having the smallest distortion value as a result of the comparison. Output as. The vector quantized low resolution image sequence may further increase the compression ratio by the variable length encoder.

The vector quantized low resolution image sequence is replayed by the low resolution inverse vector quantizer 33, and is added to the low resolution motion compensator 35 by adding the image data of the previous frame to the low resolution adder 34. The low resolution motion compensator 35 extracts a motion vector and outputs the compensated image to the low resolution subtractor 31, the low resolution adder 34, and the interpolator 29.

The interpolator 29 interpolates the motion-compensated low resolution image data to reproduce the original image size, and the determination unit 28 performs the low frequency portion (eg, 8 × 8) of the interpolated image signal and the motion-compensated high resolution image signal. 4x4 block portion of the upper left corner of the block is compared to compensate within the predetermined reference error range, and the interpolated image is compensated and output as a motion compensated image, and the first subtractor 22 is outputted at the output of the discrete cosine converter 21. The output of the determination unit 28 is subtracted to form high resolution image data.

The second subtractor 23 subtracts the motion compensated image data of the previous frame from the high resolution image data of the current frame, and the high resolution vector quantizer 24 receives the output of the second subtracter 23 to form an input vector. After comparing with the code vector of the embedded codebook, the index of the code vector having the smallest distortion value is selected and output as an encoded high-resolution image sequence. The vector quantized high resolution image sequence may further increase the compression rate by a variable length encoder not shown.

The vector quantized high resolution image sequence is reproduced by the high resolution inverse vector quantizer 25 and added to the high resolution motion compensator 27 by adding the image data of the previous frame to the high resolution adder 26. The high resolution motion compensator 27 extracts the motion vector and outputs the compensated image to the second subtractor 23, the high resolution adder 26, and the determiner 28.

As described above, in the implementation of the compatible encoder according to the present invention, it is possible to improve the compression efficiency by reducing the amount of data generated by subtracting the motion-compensated video to the input video, and in particular, to obtain a low resolution video signal. After interpolation, the compression efficiency can be improved in the high resolution part by subtracting from the discrete cosine transformed output compared with the high resolution motion compensated image.

Claims (1)

A discrete cosine converter 21 for receiving the video data stored in the frame memory and performing discrete cosine conversion; A reduction unit 30 which receives the output of the discrete cosine converter 21 and downsamples the output; A low resolution subtractor 31 which receives the output of the reduction unit 30 and subtracts the motion compensated low resolution video signal; A low resolution vector quantizer (32) for vector quantizing the output of the low resolution subtractor (31) to form a low resolution image sequence; A low resolution inverse vector quantizer (33) for receiving an output of the low resolution vector quantizer (32) and performing inverse vector quantization; A low resolution adder (34) for adding the output of the low resolution inverse vector quantizer (33) to the motion compensated output; A low resolution motion compensator (35) for receiving motion from the output of the low resolution adder (34); An interpolation unit 29 that receives the motion-compensated low resolution output and interpolates and reproduces the original image in size; A determination unit 28 which receives the output of the interpolation unit 29 and compares the motion-compensated high resolution with the low frequency part and outputs an interpolated video signal with motion-compensated high resolution image data if there is no difference; A first subtractor 22 for subtracting the output image of the discrete cosine converter 21 and the output image of the determination unit 28; A second subtractor 23 which subtracts the output of the first subtractor 22 from the motion-compensated high resolution image signal; A high resolution vector quantizer (24) for outputting a high resolution image sequence by vector quantizing the output of the second subtractor (33); A high resolution inverse vector quantizer 25 for inverse vector quantizing the output of the high resolution vector quantizer 25; A high resolution adder 26 for adding the output of the high resolution inverse vector quantizer 25 and a motion compensated image signal; And a high resolution motion compensator (27) for receiving motion from the output of the high resolution adder (26).