KR0155760B1 - Teletext decoder - Google Patents

Abstract

A decoder is disclosed in which valid data is extracted from a signal transmitted by a system that transmits the same data several times in succession for error correction.

The decoder according to the present invention is a device for decoding data transmitted from a system for continuously transmitting the same data at least two times in preparation for an error in a transmission line, each corresponding to the number of consecutive transmissions, each installed Buffers for latching data of the memory; And a comparator configured to check whether the data latched in the buffers are identical and output only data for which a majority or more of the same is verified.

The decoder according to the present invention has the effect of providing a decoder suitable for a system for continuously transmitting the same data two or more times.

Description

Character Broadcast Decoder

1 is a diagram showing the configuration of KBPS data.

2 is a block diagram showing a preferred embodiment of the character broadcast decoder according to the present invention.

FIG. 3A shows the NRZ signal provided by the data slicer shown in FIG. 2, and FIG. 3B shows the detection clock generated by the detection clock generator shown in FIG. 2, and FIG. 3C shows in FIG. Shows the output of the detected detector.

FIG. 4 is a memory map showing a data storage state of the buffer unit shown in FIG.

The present invention relates to a decoder, and more particularly, to a character broadcast decoder for decoding data transmitted by a KBPS (Korean Broadcastion Program System) method.

The KBPS method is a kind of data broadcasting using teletext. The transmitter converts data for network control and broadcast program data into a binary coded signal, and vertical blanking interval (VBI) of a video signal. ) Is inserted into any horizontal scanning line and transmitted to the local station and the viewer.

On the other hand, the local station side displays and controls the driving information by using the data transmitted from the transmitting side, and the viewer side can display information on the broadcast program on the screen or use it for a purpose such as reservation recording.

The transmitted video signal varies in amplitude and phase characteristics due to obstacles, weather conditions, and the like, and accordingly, the contents of the above-described data may vary. In order to cope with such a case, the KBPS adds an error correction code for data and transmits the same data three times in succession.

Accordingly, the receiving side should also have a corresponding character broadcast decoder.

It is therefore an object of the present invention to provide a decoder that extracts valid data from a signal transmitted by a system that transmits the same data several times in succession for error correction.

A decoder according to the present invention for achieving the above object is an apparatus for decoding data transmitted from a system that transmits the same data at least two times in succession in preparation for an error in a transmission line, and corresponds to the number of consecutive transmissions. A plurality of buffers each configured to latch data each time; And a comparison unit configured to check whether or not the data latched in the buffers are identical, and output only data for which a majority or more of the same is verified. Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 shows the configuration of KBPS data carried on a horizontal synchronization signal inserted in the VBI. The clock frequency of KBPS data is 5.7272MHz and modulation method uses NRZ (None Return to Zero). As shown in FIG. 1, the KBPS signal is composed of 36 words each having 8 bits as one word. Of the 36 words, the first and second words (W1, W2) are clock synchronization signals for synchronizing the clocks of the decoder, and the third word (W3) is a byte synchronization signal for data division, and the fourth word ( W4) is a field counter for checking the continuity of the transmission signal, and the rest are data headers W5 to W10 and data W11 to W36.

Of the five words constituting the data header, W5 is a packet type signal that determines the type of packet, and W6 through W36 are valid data accordingly.

Since W5-W36 is (8,4) hamming-modulated, each word is decoded to obtain 4-bit data. Since the error correction capability of (8,4) is 1, the error correction can be performed when 1 bit of error occurs in each word. However, when more than 2 bit error occurs, it cannot recognize the error and only recognize the occurrence of the error. have.

The video signal transmitted from the broadcasting station hits a buried object such as a building or a living plane, causing distortion. If the image signal is distorted, an error may occur in the KBPS signal loaded thereon.

To prevent this, the broadcasting station transmits the same contents three times. Accordingly, there is a need for an apparatus for extracting valid data from data repeated three times.

2 is a block diagram showing an embodiment of a decoder according to the present invention and shows an example applied to KBPS, a type of character broadcasting. In FIG. 2, reference numeral 20 is a data slicer, 22 is a jitter correction unit, 24 is a data extraction unit, 26 is an error correction unit, 28 is a buffer unit having a plurality of buffers, and 30 is a comparison unit. And 32 are data stores.

The jitter correction unit 22 includes a detection clock generator 22a and a detector 22b. The detection clock generator 22a generates a detection clock of 8f _sc and provides it to the detector 22b. The detector 22b outputs a bit signal corresponding to a state of a signal provided from the data slicer 20 every five frequencies of the detection clock provided by the detection clock generator 22a.

The data extracting section 24 includes a clock generating section 24a, a data fetching section 24b, and a serial / parallel converter 24c. The clock generator 24a generates a clock signal of 5.7272 MHz in synchronization with the clock synchronizing signal. The data fetch unit 24b samples a signal provided from the jitter correction unit 22 as a clock signal generated by the clock generator 24a and outputs it as a serial signal. The serial-to-parallel converter 24c bundles and outputs the serial signal provided from the data fetch unit 24b as an 8-bit parallel signal, that is, in word units as shown in FIG.

The operation of the apparatus shown in FIG. 2 will be described in detail with reference to FIGS. 3 and 4. The video signal including the data transmitted from the broadcasting station hits an obstacle such as a building, a mountain, an airplane, etc., and is distorted to reach the receiver. This video signal is received through a tuner (not shown) and input to the decoder of FIG.

Here, in order to extract the horizontal synchronous signal having data from the horizontal synchronous signals transmitted during the VBI, a detector having a horizontal synchronous counter should be presented. However, a technique for extracting an arbitrary horizontal synchronous signal from the image signal is known. For example, the horizontal synchronization signal on which the data is carried may vary according to the specifications of each broadcasting station, and thus the specification is not specified herein.

The NRZ modulated signal is shaped into a pulse signal having a binary code through the data slicer 20. However, since the pulse signal at this time is distorted by the obstacle as described above, the signal is different from the signal on the transmitting side. That includes jitter and errors. The jitter correction section 22 corrects jitter on the time axis of the NRZ signal.

The detection clock generator 22a generates a detection clock of 8f _sc (f _sc is 3.579545 MHz as the frequency of the NTSC type color carrier). The frequency 8f _sc of this detection clock corresponds to five times the clock frequency of 5.7272 MHz of KBPS data.

3a to 3c are timing diagrams showing the operation of the detector 22b, and FIG. 3a is a diagram showing the NRZ signal a provided from the data slicer 30, and FIG. 3b is a detection generated by the detection clock generator 22a. The clock b is shown, and FIG. 3c shows the output c of the detector 22b. When there are no jitter components in the NRZ signal, the NRZ signal changes by one bit for every five detection clocks. However, if there is a jitter component, it will change every four or six detection clocks. In severe cases, it will change every three or seven detection clocks.

If a transition occurs in the NRZ signal with one clock of the detection clock, the detection unit 22b skips it as an error or noise and allows up to three clocks as valid data. The NRZ data in which the jitter component is corrected through the jitter correction unit 22 is provided to the data extraction unit 24.

The clock regeneration unit 24a of the data extraction unit 24 generates a clock signal of 5.7272 MHz synchronized with the first and second words (clock synchronization signal) W1 to W2 shown in FIG. The data fetch unit 24b fetches and outputs 32 words (W5 to W36) excluding the clock synchronization signals W1 to W2, the byte synchronization signal W3, and the dead counter W4. The serial-to-parallel converter 24c outputs 32 words of parallel data in which the signal fetched through the data fetch unit 24b is grouped in 8-bit word units.

The error correction section 26 inputs 8-bit words provided from the data extraction section 24 to perform error correction processing. In KBPS, error correction processing is performed using a (8,4) hamming code. Thus, the data output from the error correction 26 has 4 bits per word. Since the Hamming code is an error correction code of 1 bit, it cannot be corrected when there are two or more error bits. In such a case, the output error flag is set to 1 together with the 4-bit data to be output to indicate that an uncorrectable error has occurred.

The 4-bit data error-corrected through the error correction 26 and the error flags attached thereto are stored in the buffers BUF1 to BUF3 and EBUF1 to EBUF4 of the buffer unit 28, respectively. Since KBPS transmits the same data three times in succession to increase the durability against errors, BUF1 and EBUF1, BUF2 and EBUF2, BUF3 and EBUF3 of the buffer unit 28 operate in pairs, respectively, and transmit the data and the error for each time The corrected result is stored sequentially. For this purpose, the buffer selection signal BUF_SEL is provided.

FIG. 4 is a memory map showing a data storage state of the data storage unit shown in FIG.

The comparison unit 30 compares the statuses of the error flags for each address shown in the memory map as shown in FIG. EBUF1-EB

If more than one error flag is set to 0 by checking the error flags stored at the same address of UF3, the contents of the buffer in which the normal data without error occurred are stored among the data stored in the same addresses of BUF1 to BUF3. . If nothing is set to zero or none at all, nothing is printed. This operation is repeated from address 0 to address 31 to output 32 four-bit data to the data storage unit 32.

The data storage unit 32 stores only the data determined to be normal through the comparison unit 30. The data stored in the data storage unit 32 is referred to by other programs and used to provide information on network operations or information on broadcast programs.

As described above, the text broadcasting decoder according to the present invention has the effect of providing a decoder suitable for a system for transmitting the same data transmitted consecutively two or more times.

In addition, the character broadcast decoder according to the present invention stores data transmitted from a system that transmits the same data two or more times in a buffer and compares the data each time in order to increase the durability against errors. By storing the data only when the data is repeated, it has the effect of providing a decoder which enhances the error correction effect.

In the disclosed embodiment of the present specification, a character broadcasting decoder suitable for a character broadcasting system that transmits the same data several times in succession has been described. However, the description of the present specification is not necessarily limited to the character broadcasting decoder. It should be noted that the present invention can also be applied to a decoder corresponding to a transmitting encoder.

Claims (5)

An apparatus for decoding data transmitted from a system for continuously transmitting the same data at least two times in preparation for an error in a transmission line, the apparatus being provided corresponding to the number of consecutive transmissions, each latching data each time Buffers; And comparing means for checking whether or not the data latched in the buffers are identical, and outputting only data for which a majority or more is verified. 2. The apparatus of claim 1, wherein the buffers comprise signal bits indicating that an error in uncorrectability has occurred in the data stored therein; And the comparing means compares the contents of the signal bits to determine whether data is identical. An apparatus for decoding the data from a signal transmitted from a system for transmitting a data block including data and an error correcting code for the data at least two times in succession with a block synchronization signal, wherein the level of the transmission signal is predetermined. A data slicer for outputting a shaped signal in comparison with a reference level; A data extracting unit extracting the data block using the block synchronization signal included in the transmission signal as a division signal; An error correction unit for correcting and outputting data included in the block data extracted through the data extraction unit according to an error correction code, and outputting an error flag when an uncorrectable error occurs on the data; A buffer unit corresponding to the number of consecutive transmissions, the buffer unit including a plurality of buffers for latching data and error flags provided by the error correction unit each time; A comparison unit which checks whether or not the data latched in the buffer unit is identical and outputs only the data of which the majority or more is verified; And a data storage unit for storing data output through the comparison unit. 4. The character broadcasting decoder of claim 3, further comprising jitter compensating means for removing the variation in time axis included in the transmission signal provided by the data slicer and providing the data extracting unit to the data extracting unit. The character broadcasting decoder of claim 3, wherein the comparison unit compares the contents of the error flags stored in the buffers to determine whether data is identical.