KR0131047Y1 - Pll converting apparatus during cdg mode/super impose mode - Google Patents

Abstract

The present invention relates to a PLL switching device in the CDG / superimpose mode, the function setting unit 20 for performing a function setting for mode switching to the CDG mode or superimpose mode, and the CDG mode or A microcomputer 22 for controlling a PLL input signal and a selective supply state for the PLL function according to the superimpose mode, generating a color carrier carrier frequency (Fsc) and a CDG horizontal synchronization signal of 3.58 MHz according to the still image data; In addition, the CDG decoder 24, which is synchronized by a source clock (Xin) applied according to the PLL function and performs a decoding function, encodes the RGB signal and the composite synchronous signal decoded by the CDG decoder 24, and itself. An RGB encoder 26 generating a 3.58 MHz master clock generated by the oscillation operation, a synchronization separator 27 separating the horizontal synchronization signal from the external video signal, and a CDG mode under the control of the microcomputer 22; Prize A switching unit which allows a colored unit carrier frequency (Fsc) and the master clock to pass as a PLL input signal, and is switched to pass the CDG horizontal synchronous signal and the external horizontal synchronous signal as a PLL input signal according to a superimpose mode. (28) and a PLL circuit 30 for generating a source clock by performing a PLL function by selectively receiving a PLL input signal according to the CDG mode or the superimpose mode passing through the switching unit 28. Characterized in that provided.

Description

PLL Switching Device in CDG / Superimpose Mode

1 is a block diagram showing a PLL switching device in accordance with the mode switching of a conventional CDG disc reproducing system.

2 is a block diagram showing a PLL switching device in the CDG / superimpose mode according to the present invention.

* Explanation of symbols for main parts of the drawings

2: Servo controller 4: Spindle motor

6: optical pickup 8: RF amplifier

10: DSP 20: Function setting part

22: micom 24: CDG decoder

26: RGB encoder 27: synchronization separator

28: switch part 30: PLL circuit

The present invention relates to a PLL switching device in a CDG / superimpose mode, and more particularly, a PLL (Phase Locked Loop) for supplying a source clock for clock synchronization in a CDG mode or a superimpose mode in a CDG disc playback system. The present invention relates to a PLL switching device in a CDG / superimpose mode, which enables to distinguish and apply a PLL input signal applied to a circuit according to a mode switching state.

In general, an analog audio signal is sampled at a sampling frequency of 44.1 KHz, and then analog / digital transformed into a digital signal combined with 1s and 0s. Finally, the laser cutting technology is used to form a projection shaped as a pit. Compact discs (CDs) that record audio signals have been developed. These compact discs are designed to optically detect and reproduce the shape of the projections, so in theory, they always provide uniform hi-fi playback characteristics regardless of the number of times the disc is played. Will have

In the above compact disc, the pit group of the track wound in a spiral has a specific pit array at regular intervals, and the regular pit array has a sync signal and blocks from this sync signal to the next sync. Is called a frame. Each frame has a subcode containing control information and various service information, starting with a synchronization signal (frame synchronization signal) indicating the head of the frame, and an audio signal and an error correction signal.

There are eight channels of P / Q / R / S / T / U / V / W in the above subcode, and in current CD, song number, index number, playback time of song, The cumulative time from the beginning of the program and the presence / absence of the audio signal are displayed.

In addition, recently, a compact disc graphics (CDG) using the above CD format as it is and recording still picture data (graphic data) using R-W channels of subcodes has been developed. The CDG disc playback system has been developed to provide excellent high-fidelity audio such as CD, and to display graphic wallpaper and subtitle screens through the display device, satisfying the needs of consumers for the combination of audio and video. .

On the other hand, in such a CDG disc reproducing system, only the still picture data recorded on the CDG disc can be reproduced by signal processing according to the mode switching to the CDG mode, and the television broadcast signal or the video tape is changed according to the mode switching to the superimpose mode. The moving picture data from an external video signal source such as a recorded video signal is used as a background screen, and the still picture data recorded on the CDG disc can be superimposed and reproduced on the background screen. A PLL switching device according to the mode switching is employed for clock synchronization between external image data for clock synchronization or superimpose mode and still image data of a CDG disc.

According to the PLL switching device according to the mode switching of the CDG disc playback system, as shown in FIG. 1, the servo controller 2 controls the constant rotation of the CDG disc D and the read state of the recorded information under the control of the control means (2). ) And the spindle motor 4 for rotating the CDG disc D at constant speed under servo control of the servo control unit 2, and irradiating the laser light to the recording feet of the CDG disc D and receiving the reflected light. An optical pickup 6 having read the recorded information signal, an RF amplifier 8 for RF amplifying the read information signal, a DSP 10 for digital signal processing the amplified information signal, and the digital signal CDG decoder 12 which decodes the processed still image data to generate the RGB signal and the composite synchronous signal, and RGB encoder which generates the RGB signal and the composite synchronous signal according to the decoding result and generates the image signal as a still image that can be reproduced on the screen. The synchronization unit 16 for separating an external vertical synchronization signal and an external horizontal synchronization signal from a video signal such as a television broadcast signal or a video signal recorded on a video tape, and the CDG according to a mode switching to the CDG mode. In addition to receiving the 3.58 MHz color subcarrier signal (Fsc) and the CDG horizontal synchronization signal from the decoder (12), the source clock (Xin) is supplied to the CDG decoder (12), and at the time of mode switching in the superimpose mode. A PLL circuit 18 is configured to generate an external clock by receiving an external horizontal synchronization signal and a CDG horizontal synchronization signal.

In the PLL switching apparatus according to the mode switching of the CDG disc playback system having such components, the information of the still picture data recorded on the CDG disc D is read by the optical pickup 6, and the RF amplifier 8 reads the RF information. After the amplification, the digital signal is processed by the DSP 10 and decoded by the CDG decoder 12. As a result, the RGB signal and the composite synchronous signal are encoded by the RGB encoder 26 and the CDG mode is reproduced. In this case, the PLL circuit 18 receives a 3.58 MHz color subcarrier signal Fsc from the CDG decoder 12 and a CDG horizontal synchronization signal corresponding to the still picture data of the CDG disc D. By supplying the 14.318 MHz source clock Xin generated through the voltage controlled oscillation operation to the CDG decoder 12, the CDG decoder 12 performs the decoding operation synchronously with the input source clock Xin. Done.

On the other hand, in the case of the mode switching to the superimpose mode, in the PLL circuit 18, from the synchronization separating unit 16, the external horizontal synchronization signal for the external video signal and the CDG decoder 12 The CDG decoder 12 generates a source clock (Xin) of 14.318 MHz through phase comparison and voltage controlled oscillation operation and applies the CDG decoder (12) to the CDG decoder (12). A synchronous decoding operation of the still picture data read from the CDG disc D is performed synchronously, so that the still picture data is superimposed on a background screen on which an external video signal is reproduced and reproduced.

However, in the PLL circuit 18, regardless of the mode switching state of the PLL switching device according to the mode switching of the CDG disc reproducing system, the PLL circuit 18 receives the color carrier frequency (Fsc) from the CDG decoder 12. ) And the CDG horizontal synchronization signal and the external horizontal synchronization signal according to the external video signal from the synchronization separation unit 16 at the same time, the color carrier frequency or the CDG horizontal synchronization signal in the CDG mode In the superimposed mode or vice versa, the CDG horizontal synchronization signal or the external horizontal synchronization signal may be interfered with by the color carrier frequency, causing the source clock to be disturbed.

In addition, in the CDG mode, a color clock frequency is generated by voltage-controlled oscillation operation by comparing the color carrier frequency Fsc from the CDG decoder 12 with the CDG horizontal synchronization signal. If the phase of Fsc is changed and is not normal, the phase of the CDG horizontal synchronization signal is not normal. As a result, the still image reproduced on the screen is shaken or unstable.

Therefore, the present invention has been made in view of the above-mentioned circumstances. In the CDG disc playback system, the switching switching is performed so that the color carrier carrier frequency from the CDG disc and the oscillation frequency from the RGB encoder are supplied to the PLL circuit in the CDG mode. It is an object of the present invention to provide a PLL switching device in a CDG / superimpose mode that switches switching so that a horizontal synchronization signal from a CDG disc and a horizontal synchronization signal from an external video signal can be supplied to a PLL circuit in a pause mode. .

According to the PLL switching device in the CDG / superimpose mode according to the present invention in order to achieve the above object, after reading the information signal of the still picture recorded on the CDG disk in the optical pickup and RF amplified through the RF amplifier, A CDG disc reproducing system for processing a digital signal through a DSP so as to process a picture to be reproduced as a still picture, and to process a signal so that an external video signal is reproduced as a moving picture; A function setting section for performing a function setting for mode switching to a CDG mode or a superimpose mode, and controlling a selective supply state of a PLL input signal for a PLL function according to the function-set CDG mode or superimpose mode; The microcomputer generates a 3.58 MHz color subcarrier frequency and CDG horizontal synchronous signal according to the still picture data, and a CDG decoder and a CDG decoder which are synchronized to an authorized source clock according to a PLL function to perform a decoding function. The RGB signal and the composite synchronous signal, and an RGB encoder for generating a 3.58 MHz master clock generated by self-oscillation operation, a synchronization separator for separating a horizontal synchronous signal from the external video signal, and controlling the microcomputer. Under the CDG mode, the color carrier frequency of the CDG decoder and the master clock of the RGB encoder are passed as the PLL input signal. In addition to the lock, the switching unit is switched so that the CDG horizontal synchronization signal of the CDG decoder and the external horizontal synchronization signal of the synchronization separation unit are passed as the PLL input signal according to the superimpose mode, and the CDG mode or super which has passed through the switching unit. Provided is a PLL switching device in a CDG / superimpose mode that includes a PLL circuit that selectively receives a PLL input signal according to an impose mode and performs a PLL function to generate a source clock.

According to the present invention made as described above, the color encoder carrier frequency and RGB encoder of 3.58 MHz from the CDG decoder in the CDG mode for screen playback of the still picture data contained in the CDG disc in the CDG disc playback system for playing the CDG disc By switching the 3.58 MHz master clock generated by self oscillation from the PLL circuit to be applied to the PLL circuit, a source clock according to the CDG mode is generated and supplied to the CDG decoder by the PLL function of the PLL circuit. In the case where the still image data of the CDG disc is superimposed on the background image by the external video signal by the mode switching to the superimpose mode, the external image is separated from the CDG horizontal sync signal from the CDG decoder and the external video signal. The shoe generated by the PLL function of the PLL circuit by switching the horizontal synchronization signal to be selectively applied to the PLL circuit. A source clock in accordance with the superimposed mode is to be supplied to a CDG decoder.

Hereinafter, the present invention configured as described above will be described in detail with reference to the accompanying drawings.

2 is a block diagram showing the PLL switching device in the CDG / superimpose mode according to the present invention, in which the CDG disc (D), the servo control unit (2), the spindle motor (4), and the optical The components of the pickup 6, the RF amplifier 8, and the DSP 10 are given the same reference numerals as the components shown in FIG. 1, and detailed description thereof will be omitted.

In the present invention according to the drawings, the reference 20 is made of a matrix button unit installed in a predetermined portion of the front of the main body of the CDG disc playback system or a remote control for remote control, and as a function setting unit for setting function commands for the overall functional operation of the system. Function for mode switching to superimpose mode in which a still image data is superimposed on a CDG mode for playing back only the still image data recorded on the CDG disc (D) or a background image by an external video signal. The setup will be performed.

Further, reference numeral 22 denotes a microcomputer which is in charge of execution control of the overall functional operation of the CDG disc playback system, and corresponds to mode switching to the CDG mode or the superimpose mode by the function setting of the function setting unit 20. The switching switching of the switching unit 28 to be described later is controlled so that the PLL input signal is selectively supplied to the PLL circuit 30 to be described later according to each mode.

Further, reference numeral 24 decodes the still image data digitally processed by the DSP 10 to generate an RGB signal and a composite synchronous signal, and a 3.58 MHz color carrier frequency (Fsc) according to the still image data. A CDG decoder which generates a CDG horizontal synchronization signal separated from the synchronous signal, and receives a source clock (Xin) generated from the PLL circuit 30 to be described later and performs a decoding function synchronously in a CDG mode or a superimpose mode. 26 denotes an RGB encoder which generates a 3.58 MHz master clock by using an oscillation frequency signal obtained from a crystal oscillator, while encoding the display signal by receiving the RGB signal and the composite synchronous signal generated by the decoding function. Indicates.

Reference numeral 27 denotes a synchronization separator for separating the horizontal synchronization signal from an external video signal such as a television broadcast signal or a video signal recorded on a video tape.

Further, reference numeral 28 is controlled by the microcomputer 22 to control the color carrier frequency (Fsc) of 3.58 MHz from the CDG decoder 24 and 3.58 MHz from the RGB encoder 26 according to the CDG mode. The master clock is switched to be selectively supplied as a PLL input signal to the RLL circuit, which will be described later, and the CDG horizontal synchronization signal from the CDG decoder 24 and the synchronization separator according to the mode switching of the superimpose mode ( 27 shows a switch section for switching an external horizontal synchronization signal from 27) to be selectively supplied as a PLL input signal to the PLL circuit 30 side described later.

Reference numeral 30 denotes a PLL input signal (color carrier frequency Fsc and master clock) according to the CDG mode selectively passing through the switch unit 28 or a PLL input signal (CDG horizontal synchronization signal) according to the superimpose mode. And an external horizontal synchronization signal) to generate a 14.318 MHz source clock (Xin) for clock synchronization through phase comparison and voltage controlled oscillation operation.

Next, the present invention made as described above will be described in detail with reference to FIG.

First, in a state in which an external video signal such as a television broadcast signal or a video signal recorded on a video tape can be reproduced on a screen, the CDG disc in which the spindle motor 4 contains predetermined still picture data under servo control of the servo control unit 2 ( When rotating D) at constant speed, the optical pickup 6 reads the recording information of the CDG disc D, and the read information signal is amplified by the RF amplifier 8 by the DSP 10. While the digital signal is processed, the digital image processed still picture data is decoded by the CDG decoder 24 to generate an RGB signal and a composite video signal, and is encoded in synchronization with a 3.58 MHz master clock by the RGB encoder 26. Next, the screen is reproduced as a still picture.

In this state, when the function setting unit 20 key-sets the mode switching function command to the CDG mode, the microcomputer 22 switches the switch unit 28 by recognizing the function command according to the keyed CDG mode. By controlling the PLL, the switching unit 28 has a color clock carrier frequency (Fsc) of 3.58 MHz from the CDG decoder 24 and a 3.58 MHz master clock generated by self-oscillation operation in the RGB encoder 26. It is switched to be selectively supplied to the circuit 30 side.

Accordingly, the PLL circuit 30 receives a color clock carrier frequency (Fsc) and a master clock which has passed through the switch unit 28 according to the CDG mode, and performs a source clock of 14.318 MHz through phase comparison and voltage controlled oscillation operations. Xin) is generated and supplied to the CDG decoder 24.

Therefore, as the CDG decoder 24 is synchronized by the source clock Xin to perform a decoding function, the still picture signal which has been encoded by the RGB encoder 26 can be stably reproduced as a still picture only.

On the other hand, when the function setting unit 20 switches the switch unit 28 according to the superimpose mode in the microcomputer 22 by keying the superimpose mode, the switch unit 28 is used. In order to selectively supply the PLL circuit 30 with the CDG horizontal synchronization signal separated from the CDG decoder 24 and the external horizontal synchronization signal separated by the synchronization separator 27 from the external image signal. do.

Accordingly, the PLL arc path 30 receives the CDG horizontal synchronization signal and the external horizontal synchronization signal passing through the switch unit 28 according to the superimpose mode, and performs phase comparison and voltage controlled oscillation to perform a source clock of 14.318 MHz. Will generate (Xin).

Accordingly, the CDG decoder 24 is synchronously decoded by receiving the source clock (Xin), thereby stably superimposing a still picture signal passing through the RGB encoder 26 on a background screen in which an external video signal is formed. Pose and play the screen.

According to the present invention made as described above, in the CDG disc reproducing system, the PLL input signal supplied to the PLL circuit for clock synchronization in the CDG mode or the superimpose mode is selectively switched according to the switching state of the corresponding mode. Therefore, not only the still image in the CDG mode can be stable in the screen playback state, but also that the superimposed still image on the background image in the superimpose mode can be stable without shaking or instability of the screen. You have an advantage.

Claims (1)

The information signal of the still picture recorded on the CDG disc D is read by the optical pickup 6, FR amplified by the RF amplifier 8, and then digitally processed by the DSP 10 to reproduce the picture as a still picture. A function setting unit for performing a function setting for mode switching to a CDG mode or a superimpose mode in a CDG disc reproducing system which performs signal processing so as to enable signal processing so that an external video signal is reproduced on a moving picture. 20), a microcomputer 22 for controlling a selective supply state of a PL input signal for a PLL function according to the function-set CDG mode or superimpose mode, and a color carrier frequency of 3.58 MHz according to the still picture data (Fsc). And a CDG decoder 24, which generates a CDG horizontal synchronization signal and is synchronized by a source clock (Xin) applied according to a PLL function, and performs a decoding function, and an RGB signal decoded by the CDG decoder 24. complex In addition to encoding a synchronizing signal, an RGB encoder 26 generating a 3.58 MHz master clock generated by a self-oscillating operation, a sync separating unit 27 for separating a horizontal synchronizing signal from the external video signal, and the microcomputer ( Under the control of 22), the color carrier frequency (Fsc) of the CDG decoder (24) and the master clock of the RGB encoder (26) are passed as a PLL input signal in accordance with the CDG mode, and The switch unit 28 which is switched so that the CDG horizontal synchronizing signal of the CDG decoder 24 and the external horizontal synchronizing signal of the synchronizing separator 27 pass as a PLL input signal, and the CDG mode passing through the switching unit 28. Or a PLL circuit 30 configured to selectively receive a PLL input signal according to a superimpose mode and perform a PLL function to generate a source clock (Xin). Switching device.