JPWO2017073524A1 - Solid-state image sensor - Google Patents

Abstract

Good quality image data is acquired while suppressing the occurrence of charge transfer defects. The solid-state imaging device (1) has a charge (100) for one row of the light receiving element (photodiode 11) only when the amount of charge (100) for one row of the light receiving element (photodiode 11) is smaller than the threshold. Is transferred to the charge multiplication processing section (14).

Description

  The present invention relates to a solid-state image sensor, and more particularly, to a charge multiplication type solid-state image sensor that can perform good photographing even in a dark place.

  In recent years, solid-state imaging devices represented by CCD (Charge Coupled Device) image sensors and the like have been actively developed. For example, Patent Document 1 discloses a charge multiplier CCD cell capable of charge multiplication. Patent Document 2 discloses a CCD imager including a multiplication register to which signal charges from an output register are transferred. Patent Document 3 discloses a horizontal transfer unit that can switch the transfer direction of the signal charge detected by the photoelectric conversion unit to either the first direction or the second direction according to a driving waveform applied from the outside. A solid-state imaging device is disclosed.

  Furthermore, as a typical configuration of a conventional solid-state imaging device, for example, a solid-state imaging device 5 as shown in FIG. 13 can be cited. As shown in FIG. 13, the solid-state imaging device 5 generates charges by photoelectrically converting incident light by a plurality of photodiodes 51 arranged two-dimensionally in a plan view. The generated charges are transferred in the vertical direction toward the horizontal transfer CCD 53 by the vertical transfer CCD 52, and the horizontal transfer CCD 53 reads out the charges for each line in the vertical direction of the photodiode 51 and transfers them to the output circuit 55. To do. Further, a charge multiplication charge transfer section 54 is provided between the horizontal transfer CCD 53 and the output circuit 55. The charge multiplication charge transfer section 54 performs charge multiplication processing of several to several thousand stages on the charge transferred from the horizontal transfer CCD 53 when a high voltage is applied, and is generated by the processing. The multiplied charge is transferred to the output circuit 55.

Japanese Patent Publication “JP 07-176721 A (published on July 14, 1995)” Japanese Patent Publication “Japanese Patent Laid-Open No. 10-304256 (published on November 13, 1998)” Japanese Patent Publication “Japanese Patent Laid-Open No. 03-123278 (published May 27, 1991)”

  However, the charge multiplier CCD cell disclosed in Patent Document 1 and the CCD imager disclosed in Patent Document 2 are divided into cases where charge multiplication processing is performed and cases where charge multiplication processing is not performed depending on the amount of charge (signal charge). It is not configured. Therefore, for example, even when shooting a bright place, the above-described charge multiplication device CCD cell or the like performs charge multiplication processing, so that at least a part of the captured image obtained in this case is in a state of being whitened out. There was a point.

  The solid-state imaging device disclosed in Patent Document 3 is intended to obtain an erect image and a mirror image video signal, and obtains high-quality image data regardless of the brightness of a place to be photographed. It is not intended to be. Further, the above-described solid-state image device is not configured to be able to perform charge multiplication processing on signal charges. Therefore, there is a problem that the image quality of the image data is deteriorated particularly when a dark place is photographed.

  Further, in the conventional solid-state imaging device 5, the charge transferred from the horizontal transfer CCD 53 passes through the charge multiplication processing unit 54 to the output circuit 55 regardless of whether or not the charge multiplication processing is performed. Transferred. When performing charge multiplication processing, in order to provide a high electric field difference between the electrodes, the voltage applied to the gate electrode (not shown) of the charge multiplication processing section 54 is about -4.5 V at low time, and at high time. It becomes a very high voltage of about 22.0V. On the other hand, in the case of normal transfer in which charge multiplication processing is not performed, the applied voltage is about 0 V when low and about 3.0 V when high, which is a considerably lower voltage than the applied voltage when performing charge multiplication processing. .

  Here, in the charge multiplication processing unit 54, an N-type impurity layer serving as a transfer unit body and a P-type impurity layer (both not shown) for directing charge transfer are formed under the gate electrode. ing. The optimum conditions for setting these impurity layers differ depending on the voltage applied to the gate electrode, the charge capacity required for the charge multiplication processing unit 54, and the transfer efficiency. Therefore, in the charge multiplication processing unit 54, the impurity layer setting when the voltage applied to the gate electrode is about −4.5V to 22.0V, and the impurity layer setting when the voltage is about 0V to 3.0V, It has been very difficult to achieve compatibility without causing transfer defects such as charge remaining.

  The present invention has been made to solve each of the above-mentioned problems, and the purpose thereof is to acquire high-quality image data regardless of the brightness of a place to be photographed, and when a low voltage is applied. An object of the present invention is to provide a solid-state imaging device in which occurrence of charge transfer defects is suppressed.

  In order to solve the above problems, a solid-state imaging device according to one embodiment of the present invention includes a plurality of two-dimensionally arranged light receiving elements that photoelectrically convert incident light to generate charges, and the plurality of light receiving elements. A vertical transfer unit that reads the charge from the device and transfers the charge in the vertical direction; a horizontal transfer unit that transfers the charge transferred from the vertical transfer unit in the horizontal direction for each row of light receiving elements; and Charge multiplication processing is performed on the charge for one row of the light receiving elements transferred from the horizontal transfer unit to generate multiplied charge, and the light reception transferred from the horizontal transfer unit. A signal output unit that converts the charge for one row of elements and the multiplied charge transferred from the charge multiplication processing unit into an electrical signal and outputs the electrical signal, and the horizontal transfer unit includes the light receiving element 1 Only if the amount of charge for a row is less than the threshold, The serial receiving element one row of charge transferred to the charge multiplication processing section.

  According to one embodiment of the present invention, by changing the transfer destination from the horizontal transfer unit according to the amount of charge, high-quality image data can be acquired regardless of the brightness of the location to be imaged, and low It is possible to suppress the occurrence of charge transfer failure when a voltage is applied.

It is the schematic which shows the principal part of the solid-state image sensor which concerns on Embodiment 1 of this invention. (A) is sectional drawing which shows the principal part of horizontal transfer CCD. (B) And (c) is a graph which shows the state of a pulse voltage and potential in the case of transferring the electric charge for 1 row of photodiodes to R11 direction. (D) and (e) are graphs showing pulse voltage and potential states in the case where charges for one row of photodiodes are transferred in the R12 direction. (A) is a graph which shows the relationship between the light quantity of the incident light which injects into a photodiode, and the output value of the electrical signal output from an output circuit in the said solid-state image sensor. (B) is a figure which shows the setting method of the threshold value of the electric charge amount for 1 row of photodiodes using the said graph. It is sectional drawing which shows an example of the principal part of a charge multiplication process part, and a graph which shows an example of the state of a pulse voltage and a potential in the case of producing | generating a multiplication charge. It is sectional drawing which shows the other example of the principal part of a charge multiplication process part, and the graph which shows the other example of the state of a pulse voltage and a potential in the case of producing | generating a multiplication charge. It is a table | surface which shows an example of the pulse voltage applied to each gate electrode of a charge multiplication process part. (A) is a cross-sectional view showing the configuration near the connection point between the pre-scan unit and the charge multiplication processing unit, and when transferring one row of photodiodes from the pre-scan unit to the charge multiplication processing unit. It is a graph which shows the state of pulse voltage and potential. (B) is a table | surface which shows an example of the pulse voltage applied to each gate electrode of a prescan part and a charge multiplication process part. It is the schematic which shows an example of the principal part of the solid-state image sensor which concerns on Embodiment 2 of this invention. It is the schematic which shows the other example of the principal part of the solid-state image sensor which concerns on Embodiment 2 of this invention. (A) is a figure which shows the relationship between 1 packet and a required gate electrode in horizontal transfer CCD. (B) is a figure which shows the relationship between 1 packet and a required gate electrode in a charge multiplication process part. (A)-(e) is the schematic which shows a series of flows from the reading of the electric charge from vertical transfer CCD to the transfer of the multiplication electric charge to a 2nd output circuit. It is the schematic which shows the relationship between the image data based on the electrical signal output from the 1st output circuit, and the image data based on the electrical signal output from the 2nd output circuit. It is the schematic which shows the principal part of the conventional solid-state image sensor. (A) is sectional drawing which shows an example of the principal part of the conventional horizontal transfer part for normal transfers. (B) And (c) is a graph which shows the state of a pulse voltage and potential in the case of transferring the electric charge for 1 row of photodiodes to R51 direction. It is sectional drawing which shows the other example of the principal part of the conventional horizontal transfer part for normal transfers. (A) is sectional drawing which shows the structure of the principal part of the transfer part for the conventional charge multiplication. (B)-(d) is a graph which shows the state of a pulse voltage and a potential in the case of transferring a multiplication charge to R52 direction.

Embodiment 1
Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS.

<Configuration of solid-state image sensor>
First, the main configuration of the solid-state imaging device 1 will be described. FIG. 1 is a schematic diagram showing the main part of the solid-state imaging device 1. The solid-state imaging device 1 photoelectrically converts incident light to generate an electric charge 100 (see FIG. 2 and the like), and outputs an electric signal constituting data of a two-dimensional image based on the generated electric charge 100. As shown in FIG. 1, a solid-state imaging device 1 includes a photodiode (light receiving element) 11, a vertical transfer CCD (vertical transfer unit) 12, a horizontal transfer CCD (horizontal transfer unit) 13, a charge multiplication processing unit 14, and an output circuit. (Signal output unit) 15, bend transfer unit 16, prescan units 17 and 18 are provided.

  The solid-state imaging device 1 can be applied to various electronic devices such as a smartphone, a mobile phone with a camera, a digital video camera, a door phone, and a scanner.

  The photodiode 11 photoelectrically converts incident light to generate an electric charge 100. In a plan view, a total of m × n photodiodes (a plurality of light receiving elements) 11 of m rows × n columns are arranged in a two-dimensional matrix. Arranged in a shape. The number and arrangement of the photodiodes 11 are not particularly limited as long as they are two-dimensionally arranged, but FIG. 1 illustrates an arrangement of 4 rows × 5 columns for the sake of simplicity.

  The vertical transfer CCD 12 reads the charges 100 generated by the photodiodes 11 and transfers them in the vertical direction, and is provided corresponding to each photodiode 11.

  The horizontal transfer CCD 13 transfers the charge 100 transferred from the vertical transfer CCD 12 in the horizontal direction for each charge 100 of the row of the photodiodes 11 (one row of the light receiving elements). Further, as shown in FIG. 1, the horizontal transfer CCD 13 transfers the charges 100 for the rows of the photodiodes 11 in both the R11 direction (leftward toward the paper surface) and the R12 direction (rightward toward the paper surface). Can do. Furthermore, since the horizontal transfer CCD 13 is a transfer unit for normal transfer that does not perform charge multiplication processing, it is designed for application of a low voltage. The main configuration of the horizontal transfer CCD 13 and the transfer direction switching method will be described later.

  The charge multiplication processing unit 14 performs charge multiplication processing on the charge 100 for the row of the photodiodes 11 transferred from the horizontal transfer CCD 13 to generate a multiplication charge 110 (see FIG. 4 and the like). The generated multiplication charge 110 is transferred to the output circuit 15. In addition, the charge multiplication processing unit 14 is designed to be applied to a high voltage in order to cope with the charge multiplication processing. The main configuration of the charge multiplication processing unit 14 and the method of generating / transferring the multiplied charge 110 will be described later.

  The output circuit 15 converts the charges 100 for the rows of the photodiodes 11 directly transferred from the horizontal transfer CCD 13 and the multiplied charges 110 transferred from the charge multiplication processing unit 14 into electric signals and outputs them.

  The curved transfer unit 16 and the prescan units 17 and 18 serve as an empty transfer unit that simply transfers the charge 100 and the multiplied charge 110. Specifically, the curved transfer unit 16 transfers charges 100 for the rows of the photodiodes 11, and the prescan unit 17 transfers charges 100 or multiplied charges 110 for the rows of the photodiodes 11. Further, the prescan unit 18 transfers the charge 100 and the multiplication charge 110 for the row of the photodiodes 11 to the output circuit 15. The curved transfer unit 16 and the prescan units 17 and 18 have substantially the same configuration as the horizontal transfer CCD 13, and perform a function of normally transferring the charge 100 for the row of the photodiodes 11 together with the horizontal transfer CCD 13.

<Horizontal transfer CCD>
Next, the main configuration of the horizontal transfer CCD 13 and the transfer direction switching method will be described with reference to FIGS. 2, 3, 14, and 15. FIG. 2A is a cross-sectional view showing the main part of the horizontal transfer CCD 13. 2B and 2C are graphs showing the state of the pulse voltage and the potential when the charge 100 for the row of the photodiode 11 is transferred in the R11 direction. 2D and 2E are graphs showing the state of the pulse voltage and the potential when the charge 100 for the row of the photodiodes 11 is transferred in the R12 direction.

  FIG. 3A is a graph showing the relationship between the amount of incident light incident on the photodiode 11 and the output value of the electrical signal output from the output circuit 15 in the solid-state imaging device 1. FIG. 3B is a diagram illustrating a threshold value setting method for the amount of charge 100 for the row of the photodiodes 11 using the graph.

  Further, FIG. 14A is a cross-sectional view showing a main part of the horizontal transfer CCD 53, which is an example of a conventional normal transfer horizontal transfer unit. 14B and 14C are graphs showing the state of the pulse voltage and the potential when the charge 100 for the row of the photodiodes 11 is transferred in the R51 direction (see FIG. 13). FIG. 15 is a cross-sectional view showing the main part of a horizontal transfer CCD 53 ', which is another example of a conventional horizontal transfer unit for normal transfer.

  Since the conventional horizontal transfer unit for normal transfer performs transfer for each charge of one row of photodiodes, it is necessary to perform transfer corresponding to the number of rows of photodiodes in one frame. Therefore, since high-speed transfer is required as compared with the normal transfer vertical transfer unit, the conventional normal transfer horizontal transfer unit generally employs two-phase drive transfer. Note that “one frame” refers to the time required to read one two-dimensional image data from a plurality of two-dimensionally arranged photodiodes.

  Here, the main configuration of the conventional normal transfer horizontal transfer unit and the two-layer drive transfer method will be described by taking the horizontal transfer CCD 53 provided in the solid-state imaging device 5 (see FIG. 13) as an example.

  As shown in FIG. 14A, the horizontal transfer CCD 53 has a configuration in which an impurity layer 74 and a plurality of gate electrodes 71 for applying an electric field to the impurity layer 74 are stacked in this order from the vertically lower side. It has become. The impurity layer 74 has a configuration in which N-type impurity layers 72 for potential formation and N-type + P-type impurity layers 73 for directing charge transfer and forming charge storage regions are alternately arranged. . In addition, after the two gate electrodes 71 are combined into one set, pulse voltages are alternately inverted and applied to φH1 and φH2 that are sets of adjacent gate electrodes 71.

  As shown in FIG. 14B, when the pulse voltage applied to φH1 is a low voltage and the pulse voltage applied to φH2 is a high voltage, the charge 500 transferred based on the stepped potential is Accumulated in the region of the N-type impurity layer 72 in φH2. Next, as shown in FIG. 14C, when the pulse voltage is inverted so that the pulse voltage applied to φH1 is a high voltage and the pulse voltage applied to φH2 is a low voltage, the potential has a stepped shape. The transferred electric charge 500 is accumulated in the region of the N-type impurity layer 72 at φH1.

  As described above, in the two-layer drive transfer, the charge 500 moves under the one set of gate electrodes 71 due to the inversion of the pulse voltage once, so that it is suitable for high-speed transfer, but the charge 500 can be accumulated. The region is only the N-type impurity layer 72. Therefore, the two-layer drive transfer is a transfer method that is disadvantageous from the viewpoint of charge capacity, and is particularly unsuitable for a normal transfer vertical transfer unit or the like that cannot have a large area due to its structure. In the two-layer drive transfer, the charge 500 can be transferred only in one direction, and the transfer direction of the charge 500 cannot be switched as appropriate.

  The horizontal transfer CCD 53 is configured such that the gate electrode 71 facing the N-type impurity layer 72 and the gate electrode 71 facing the N-type + P-type impurity layer 73 are electrically connected by wiring. Therefore, a normal transfer horizontal transfer unit adopting a configuration substantially the same as this configuration may be used. For example, as shown in FIG. 15, a horizontal transfer CCD 53 ′ having a gate electrode 71 ′ opposed to a pair of N-type impurity layer 72 and N-type + P-type impurity layer 73 instead of the gate electrode 71 is normally transferred. It may be used as a horizontal transfer unit.

  Here, the horizontal transfer CCD 53 includes a pair of an N-type impurity layer 72 and an N-type + P-type impurity layer 73 on the right side of the N-type impurity layer 72 as viewed in the drawing, and a charge 500 on the left side of the drawing. (See FIG. 14). Therefore, if the combination of the two gate electrodes 71 is such that the N-type impurity layer 72 and the N-type + P-type impurity layer 73 on the left side of the sheet with respect to the N-type impurity layer 72 form one set, the horizontal The transfer CCD 53 can transfer the electric charge 500 to the right side as viewed in the drawing.

  That is, the horizontal transfer CCD 13 incorporates the idea of switching the combination of the two gate electrodes 71 as described above. Specifically, as shown in FIG. 2, the two gate electrodes 13a facing the N-type impurity layer 13b are φH1 and φH2, respectively, and the two gate electrodes 13a facing the N-type + P-type impurity layer 13c are φHA, respectively. , ΦHB. Then, these four gate electrodes (four electrodes) 13a arranged in series in the horizontal direction are set as one packet to correspond to the transfer of charges 100 read from one photodiode (per one light receiving element) 11.

  When transferring the charge 100 for the row of the photodiodes 11 in the R11 direction, the horizontal transfer CCD 13 sets φH1 and φHA, and φH2 and φHB, respectively, as shown in FIGS. 2B and 2C. The same pulse voltage (low voltage: 0 V, high voltage: +3.0 V, see FIG. 7B) is applied to each set. The charges 100 for the row of the photodiodes 11 transferred in the R11 direction are directly input to the output circuit 15 (see FIG. 1). On the other hand, when transferring in the R12 direction, the horizontal transfer CCD 13, as shown in FIGS. 2D and 2E, sets φH1 and φHB, φH2 and φHA, and sets the same pulse in each set. A voltage is applied. The charge 100 corresponding to the row of the photodiodes 11 transferred in the R12 direction is subjected to charge multiplication processing in the charge multiplication processing unit 14 and then input to the output circuit 15 (see FIG. 1).

  In other words, the horizontal transfer CCD 13 is connected to the gate electrode 13a (φH1, φH2) and the N-type + P-type impurity layer 13c facing the N-type impurity layer 13b according to the transfer direction of the charge 100 corresponding to the row of the photodiodes 11. The combination with the opposing gate electrode 13a (φHA, φHB) is switched.

  Here, switching of the transfer direction of the charge 100 for the row of the photodiode 11 by the horizontal transfer CCD 13 determines whether or not the amount of the charge 100 for the row of the photodiode 11 read from the vertical transfer CCD 12 is smaller than the threshold value. Is done. Specifically, the horizontal transfer CCD 13 detects the output value of the electrical signal output from the output circuit 15 (that is, the amount of electric charge 100), and the detected output value of the electrical signal is smaller than a lower limit threshold described later. It is determined that the place to be photographed is dark. In this case, the horizontal transfer CCD 13 is a set of gate electrodes 13a to which the same pulse voltage is applied in order to transfer the charges 100 for the rows of the photodiodes 11 toward the charge multiplication processing unit 14 (R12 direction). , ΦH1 and φHB, and φH2 and φHA, respectively.

  On the other hand, when the output value of the detected electrical signal is equal to or higher than an upper limit threshold described later, the horizontal transfer CCD 13 determines that the place to be photographed is bright. In this case, the horizontal transfer CCD 13 uses φH1 as a set of gate electrodes 13a to which the same pulse voltage is applied in order to transfer the charges 100 of the rows of the photodiodes 11 toward the output circuit 15 (R11 direction). φHA, φH2 and φHB are set as one set. In other words, the horizontal transfer CCD 13 transfers the charge 100 for the row of the photodiode 11 to the charge multiplication processing unit 14 only when the amount of charge 100 for the row of the photodiode 11 is smaller than the threshold value.

  Here, the setting method of each said threshold value is demonstrated using FIG. First, by using the solid-state imaging device 1 (which may be a prototype or the like), the incident light incident on the photodiode 11 and the output value of the electric signal output from the output circuit 15 are compared with each other in normal transfer and multiplication transfer. Measure for each case. Then, based on the measurement result, a graph showing the relationship between the amount of incident light and the output value of the electrical signal as shown in FIG. As shown in FIG. 3A, the transfer of the multiplication charge 110 by the charge multiplication processing unit 14 is limited by, for example, the charge capacity of the prescan unit 17 or the like. When the value exceeds the value, the output value of the electric signal in the multiplication transfer becomes constant and becomes saturated.

  Therefore, using the above graph, as shown in FIG. 3B, it corresponds to a light amount (hereinafter referred to as “reference light amount”) slightly smaller than the light amount at which the output value is saturated in the case of multiplication transfer. Set the output value as the upper threshold. As a result, when an output value equal to or higher than the output value (upper limit threshold) slightly before the output signal is saturated during multiplication transfer, normal transfer is performed from the next frame. On the other hand, the output value corresponding to the reference light amount in the case of normal transfer is set as the lower limit threshold value. As a result, when an output value lower than the lower limit threshold is output, the transfer is switched from the next frame to the multiplication transfer. By setting the upper limit threshold and the lower limit threshold in this way, the transfer direction of the charge 100 can be switched without saturating the output value of the electric signal from the output circuit 15 during multiplication transfer.

  The threshold value serving as a determination criterion for switching the transfer direction is, for example, a storage unit (not shown) provided inside or outside the solid-state image sensor 1 when an electronic device or the like equipped with the solid-state image sensor 1 is manufactured. ) May be stored in advance. Further, for example, the user may arbitrarily set by performing a user operation from an operation input unit (not shown) such as an electronic device in which the solid-state imaging device 1 is mounted.

<Charge multiplication processing unit>
Next, the main configuration of the charge multiplication processing unit 14 and the method of generating the multiplied charge 110 will be described with reference to FIGS. 4 to 6 and FIG. FIG. 4 is a cross-sectional view showing an example of a main part of the charge multiplication processing unit 14, and a graph showing an example of the state of the pulse voltage and potential when the multiplication charge 110 is generated. FIG. 5 is a cross-sectional view showing another example of the main part of the charge multiplication processing unit 14 and a graph showing another example of the state of the pulse voltage and potential when the multiplication charge 110 is generated. FIG. 6 is a table showing an example of a pulse voltage applied to each gate electrode of the charge multiplication processing unit 14.

  FIG. 16A is a cross-sectional view showing a configuration of a main part of a conventional charge multiplication transfer unit 54. (B) to (d) of FIG. 16 are graphs showing pulse voltage and potential states when the multiplication charge 510 is transferred in the R52 direction.

  First, the main configuration of the conventional multiplying charge processing unit and the method of generating / transferring the multiplying charge will be described by taking the charge multiplying processing unit 54 provided in the solid-state imaging device 5 (see FIG. 13) as an example. . As shown in FIG. 16A, the charge multiplication processing unit 54 has the same configuration as a conventional normal transfer horizontal transfer unit in which charge multiplication processing is not performed (horizontal transfer CCD 53, FIG. 14 (a)).

  Here, as shown in FIGS. 16B to 16D, the transfer method of the multiplication charge 510 in the charge multiplication processing unit 54 is the same as the conventional two-phase drive transfer method of the normal transfer horizontal transfer unit. (See (b) and (c) of FIG. 14). Further, the high voltage of the pulse voltage applied to each gate electrode 71 of the charge multiplication processing unit 54 is set to a voltage value of +20.0 V or more at which a charge multiplication reaction occurs. In such a method of generating / transferring the multiplying charge 510, as shown in FIG. 16C, there occurs a point where the potential difference becomes small in the middle of inversion of the pulse voltage applied to each gate electrode 71. The charge multiplication reaction may not occur sufficiently.

  In that respect, as shown in the cross-sectional view of FIG. 4, the charge multiplication processing unit 14 includes a first gate electrode (first electrode) 14 a and a third gate electrode (third electrode) in order from the side closer to the output circuit 15. 14c and the second gate electrode (second electrode) 14b are arranged in series in the horizontal direction. These three electrodes (three electrodes) all have the same shape, and an N-type impurity layer 14d is provided on the left side of the drawing on the left side of the drawing, and an N-type + P-type impurity is provided on the left side of the drawing. Each layer 14e is disposed.

  As shown in FIG. 6, the first gate electrode 14a is applied with a first pulse voltage having a low voltage of −4.5V and a high voltage of + 22.0V as the charge multiplication gate φEM2. The second gate electrode 14b is applied with a second pulse voltage as a transfer / accumulation gate φEM1 with a low voltage of −4.5V and a high voltage of + 3.0V. A constant voltage of −3.0 V is applied to the third gate electrode 14 c as a fixed potential gate EMH.

  In other words, the first pulse voltage is applied to the first gate electrode 14a disposed on the side closest to the output circuit 15, and the second gate electrode 14b disposed on the side farthest from the output circuit 15 includes A second pulse voltage having a high voltage lower than the high voltage of the first pulse voltage is applied. The third gate electrode 14c disposed between the first gate electrode 14a and the second gate electrode 14b is lower than the high voltage of the first pulse voltage and lower than the low voltage of the second pulse voltage. A high constant voltage is applied.

  Specifically, as shown in the upper graph of FIG. 4, the charge 100 is accumulated in the N-type impurity layer 14d under the gate φEM1 in the state where the high voltage (+3.0 V) is applied to the gate φEM1. The Here, a high voltage (+22.0 V) is applied to the gate φEM2 so that the potential formed in the gate φEM2 is on standby.

  Next, when a low voltage (−4.5 V) is applied to the gate φEM1 as shown in the center graph of FIG. 4, the charge 100 accumulated under the gate φEM1 is the potential formed in the gate EMH. Then, the movement starts rapidly toward the potential formed in the gate EM2. Then, the charge 100 is transferred to the potential formed in the gate EM2, whereby a charge multiplication reaction occurs in the charge 100, and the multiplied charge 110 is generated. The generated multiplied charge 110 is accumulated in the N-type impurity layer 14d under the gate φEM2.

  Next, as shown in the lower graph of FIG. 4, the multiplication charge 110 accumulated in the N-type impurity layer 14d under the gate φEM2 applies a low voltage (−4.5 V) to the gate φEM2. By applying a high voltage (+3.0 V) to the gate φEM1, the gate φEM2 is transferred to the gate φEM1. Then, it is accumulated again in the N-type impurity layer 14d under the gate φEM1.

  Note that the charge multiplication processing unit 14 includes an N-type impurity layer 14d and an N-type + P-type impurity layer 14e vertically below each of the three electrodes (first gate electrode 14a to third gate electrode 14c). Although the arrangement is arranged, it is not necessary to limit to such a configuration. For example, the fixed potential gate EMH (third gate electrode 14c) is changed from the transfer / storage gate φEM1 (second gate electrode 14b) to the charge multiplication gate φEM2 (first gate) so that the charge multiplication reaction is sufficiently caused. It serves to temporarily stop the movement of charges to the gate electrode 14a). Therefore, the gate length, which is the length of the horizontal electrode in the gate EMH, can be shortened to such an extent that a short channel does not occur. Further, it is not always necessary to dispose the N-type impurity layer 14d vertically below the gate EMH.

  From the above, as shown in FIG. 5A, the gate length of the gate EMH is shortened so that only the N-type + P-type impurity layer 14e is disposed vertically below the gate ENH. A configuration such as the charge multiplication processing unit 14 ′ in which the gate lengths of the gate φEM1 and the gate φEM2 are increased by the amount corresponding to the shortening of the gate φEM1 may be employed. With such a configuration, the charge multiplication effect similar to that of the charge multiplication processing unit 14 is obtained ((b) to (d) in FIG. 16), and the charge capacity of the charge multiplication processing unit is increased. can do.

  Note that a conventional charge multiplication processing unit such as the charge multiplication processing unit 54 may be employed as the charge multiplication processing unit provided in the solid-state imaging device 1.

<Connection between prescan unit and charge multiplication processing unit>
Next, the connection between the prescan unit 17 and the charge multiplication processing unit 14 will be described with reference to FIG. FIG. 7A is a cross-sectional view showing a configuration near the connection point between the prescan unit 17 and the charge multiplication processing unit 14, and charge multiplication for the row of the photodiodes 11 from the prescan unit 17. It is a graph which shows the state of a pulse voltage and a potential in the case of transferring to the processing unit 14. FIG. 7B is a table showing an example of a pulse voltage applied to each gate electrode of the prescan unit 17 and the charge multiplication processing unit 14.

  The high voltage of the transfer / accumulation gate φEM1 (second gate electrode 14b) of the charge multiplication processing unit 14 is fixed potential gate EMH (third gate electrode 14c) as long as the charge 100 is only transferred / accumulated. It should be higher than the constant voltage. Therefore, for example, even if the high voltage of the gate φEM1 is set to about 0V, there is no problem in the transfer / accumulation of the charge 100 itself.

  However, as shown in FIG. 7A, the prescan unit 17 connected to the charge multiplication processing unit 14 has the same configuration as the horizontal transfer CCD 13. Further, as shown in FIG. 7B, each gate electrode 13 a arranged in the prescan unit 17 has a pulse voltage (low voltage: 0 V, high voltage: +3.0 V) applied to the horizontal transfer CCD 13. The same pulse voltage is applied. Therefore, the charge 100 can be transferred from the prescan unit 17 to the charge multiplication processing unit 14 unless the high voltage of the gate φEM1 is set to +3.0 V, which is the same as the high voltage of the pulse voltage applied to the prescan unit 17. It will disappear.

  Therefore, as shown in FIG. 7B, the gate φEM1 of the charge multiplication processing unit 14 is applied with a second pulse voltage at which the high voltage becomes + 3.0V. Then, as shown in the graph of FIG. 7A, when a low voltage (0V) is applied to the final gate (a set of φH1 and φHA) of the prescan unit 17, the start gate of the charge multiplication processing unit 14 A high voltage (+3.0 V) is applied to (φEM1). In this way, the charge 100 for the row of the photodiodes 11 can be transferred from the prescan unit 17 to the charge multiplication processing unit 14.

[Embodiment 2]
The following will describe another embodiment of the present invention with reference to FIGS. For convenience of explanation, members having the same functions as those described in the embodiment are given the same reference numerals, and descriptions thereof are omitted. The same applies to Embodiment 3 to be described later.

  As an embodiment of the solid-state imaging device according to the present invention, not only the above-described solid-state imaging device 1 but also various variations are assumed.

  First, as shown in FIG. 8, the solid-state imaging device according to the present invention includes a first output circuit (first signal output unit) 25 to which charges 100 for a row of the photodiodes 11 are transferred, and a multiplication charge 110. The solid-state image sensor 2 provided with the 2nd output circuit (2nd signal output part) transferred is included as embodiment. The first output circuit 25 converts the electric charges 100 for the rows of the photodiodes 11 transferred from the horizontal transfer CCD into electric signals and outputs them. The second output circuit 26 converts the multiplied charge 110 transferred from the charge multiplication processing unit 54 into an electric signal and outputs the electric signal. Further, the solid-state imaging device 2 includes prescan units 28 and 29 instead of the prescan units 17 and 18.

  Thus, by separating the normal transfer output circuit and the charge multiplication output circuit, the horizontal transfer CCD 13 is designed to be suitable for low voltage application, and the charge multiplication processing unit 14 is for high voltage application. It becomes easier to make a design suitable for.

  Next, as shown in FIG. 9, the solid-state imaging device according to the present invention includes, as an embodiment, a solid-state imaging device 3 provided with two stages of charge multiplication processing units 14. The solid-state image sensor 3 includes a first output circuit 25, a second output circuit 26, and pre-scan units 28 and 29, similarly to the solid-state image sensor 2 described above. Unlike the solid-state imaging devices 1 and 2, the solid-state imaging device 3 further includes a pre-scan unit 37 and a curved transfer unit 36.

  In the charge multiplication processing of the one-stage charge multiplication processing unit 14, the multiplication charge 110 is generated only at a multiplication factor of about 1%. Therefore, in the configurations of the solid-state imaging devices 1 and 2, a desired multiplication factor is set. You may not be able to get it. Therefore, as shown in FIG. 9, by adding a curve transfer unit 36 on the multiplication charge output side of the first stage charge multiplication processing unit 14 and adding the second stage charge multiplication processing unit 14, The multiplication factor of the charge multiplication processing unit 14 as a whole can be increased.

  Note that the number of multiplication stages of the charge multiplication processing unit 14 in the solid-state image sensor according to the present invention is not limited to two stages as in the solid-state image sensor 3. The number of multiplication stages of the charge multiplication processing unit 14 may be increased to the extent that a multiplication factor desired by the user is obtained.

[Embodiment 3]
The following will describe another embodiment of the present invention with reference to FIGS. FIG. 10A is a diagram showing the relationship between one packet and a necessary gate electrode in the horizontal transfer CCD 13. FIG. 10B is a diagram illustrating a relationship between one packet and a necessary gate electrode in the charge multiplication processing unit 14. FIG. 11 is a schematic diagram showing a series of flows from the reading of the charge 100 from the vertical transfer CCD 12 to the transfer of the multiplied charge 110 to the second output circuit 26. FIG. 12 is a schematic diagram showing the relationship between image data based on the electrical signal output from the first output circuit 25 and image data based on the electrical signal output from the second output circuit 26.

<Relationship between the total number of packets in the horizontal transfer CCD and the charge multiplication processing unit and the installation of the empty transfer unit>
In the above-described solid-state imaging devices 1 to 3, as shown in FIG. 10A, for the horizontal transfer CCD 13, the four gate electrodes 13a of φH1, φH2, φHA, and φHB form one packet. As shown in FIG. 10B, the charge multiplication processing unit 14 includes a charge multiplication gate φEM2 (first gate electrode 14a), a transfer / storage gate φEM1 (second gate electrode 14b), The fixed potential gate EMH (third gate electrode 14c) is one packet.

  Therefore, the total number of gate electrodes 13a arranged in the horizontal transfer CCD 13 needs to be at least four times the number of one row of photodiodes. In other words, the total number of four gate electrodes 13a of φH1, φH2, φHA, and φHB (the total number of four electrodes) needs to be four times or more the number of one row of photodiodes.

  On the other hand, in the charge multiplication processing unit 14, the total number of the three electrodes of the gate φEM2, the gate φEM1, and the gate EMH does not necessarily need to be three times the number of one row of photodiodes. However, when the total number of the three electrodes arranged in the charge multiplication processing unit 14 is three times the number of multiplication stages, each charge multiplication processing executed by the one-stage charge multiplication processing unit 14 is performed. It is preferable because the charge multiplication reaction can be generated with high accuracy.

  Here, as shown in FIGS. 11A and 11B, the horizontal transfer CCD 13 reads from the vertical transfer CCD 12 every charge 100 of the row of the photodiodes 11 and transfers it in the horizontal direction. Then, as shown in FIG. 11C, when all of the charges 100 in the first row of the photodiode 11 are transferred, the horizontal transfer CCD 13 reads the charges 100 in the second row from the vertical transfer CCD 12. The same applies to the reading of the charge 100 in the third row ((d) and (e) in FIG. 11). Therefore, when the total number of packets of the charge multiplication processing unit 14 is the same as the total number of packets of the horizontal transfer CCD 13 (corresponding to the number of rows of the photodiodes 11), the process from the reading of the charges 100 to the output of the electric signal is smoother. Can be done.

  That is, the number of multiplication stages of the charge multiplication processing unit 14 is not limited, but when the total number of packets of the charge multiplication processing unit 14 is less than the number of rows of the photodiodes 11, It is preferable to compensate by an empty transfer unit (not shown) that performs only 110 transfers. In other words, when the total number of packets of the charge multiplication processing unit 14 is less than the number of rows of the photodiodes 11, the charge multiplication processing unit 14 sets the empty transfer unit that performs only the transfer of the multiplied charge 110 to the photo transfer unit. It is preferable that the number of diodes 11 is equal to the number obtained by subtracting the number of multiplication stages from the number of rows of diodes 11 (the number of rows of light receiving elements). One packet of the empty transfer unit has the same configuration as one packet of the horizontal transfer CCD 13.

  For example, when the number of rows of the photodiodes 11 is 500, the total number of gate electrodes 13a of the horizontal transfer CCD 13 is at least 2000. When 300 stages of the charge multiplication processing units 14 are provided, the total number of the three electrodes of the gate φEM2, the gate φEM1, and the gate EMH in the charge multiplication processing unit 14 is 900, that is, the packet of the charge multiplication processing unit 14 The total number is preferably 300 packets. In this case, since the total number of packets in the charge multiplication processing unit 14 is 200 packets short of the total number of packets in the horizontal transfer CCD 13, the empty transfer unit (the total number of gate electrodes 13 a is 800 for the shortage). It is preferable to install a sheet.

<Processing of mirror-inverted image>
As described above, the solid-state imaging device according to the present invention performs horizontal transfer in the R11 direction when performing normal transfer, and in the R12 direction opposite to the R11 direction when performing charge multiplication processing. The data is transferred by the CCD 13 (see FIG. 1). Therefore, for example, when the configuration of the solid-state imaging device 2 including the first output circuit 25 and the second output circuit 26 is adopted, as shown in FIG. 12, the image data obtained from the first output circuit 25 (in the drawing, In contrast to “B”), the image data obtained from the second output circuit is an image obtained by inverting the left and right mirrors.

  Therefore, in the solid-state image pickup device according to the present invention, the image data obtained from each of the output circuits is temporarily stored in a storage unit (not shown) provided outside the solid-state image pickup device, and the left-right mirror is inverted. A process of inverting the left and right is performed on the image data corresponding to. This process may be performed for each row of the photodiodes 11 or may be performed collectively for the entire image data.

[Summary]
The solid-state imaging device (1, 2, 3) according to aspect 1 of the present invention has a plurality of two-dimensionally arranged light receiving elements (photodiodes 11) that generate charges (100) by photoelectrically converting incident light. The vertical transfer unit (vertical transfer CCD 12) that reads out the charges from the plurality of light receiving elements and transfers them in the vertical direction, and the charges transferred from the vertical transfer unit for each row of light receiving elements. By applying a charge multiplication process to the horizontal transfer unit (horizontal transfer CCD 13) for transferring in the horizontal direction and the charge for one row of the light receiving elements transferred from the horizontal transfer unit, the multiplied charge (110) is obtained. The charge multiplication processing unit (14, 14 ') to be generated, the charge for one row of the light receiving elements transferred from the horizontal transfer unit, and the multiplication charge transferred from the charge multiplication processing unit are electrically Signal output unit that converts the signal to output (The output circuit 15, the first output circuit 25, the second output circuit 26), and the horizontal transfer unit is configured to receive the light receiving element only when the amount of charge for one row of the light receiving elements is smaller than a threshold value. The charge for one row is transferred to the charge multiplication processing unit.

  According to the above configuration, the horizontal transfer unit transfers the charge for one row of light receiving elements to the charge multiplication processing unit only when the amount of charge for one row of light receiving elements transferred from the vertical transfer unit is smaller than the threshold value. Forward to. Therefore, when the amount of charge for one row of light receiving elements transferred from the vertical transfer unit is equal to or greater than the threshold value, the horizontal transfer unit transfers the charge for one row of light receiving elements to the signal output unit.

  Here, since the brightness of the light incident on the light receiving element is proportional to the amount of charge generated by the light receiving element, the horizontal transfer unit receives light that is darker than the predetermined light brightness on the light receiving element. In this case, the charge for one row of the light receiving elements is transferred to the charge multiplication processing unit. Then, the charge multiplication processing unit generates the multiplied charge and transfers the multiplied charge to the signal output unit. In addition, the horizontal transfer unit transfers the charge for one row of the light receiving elements to the signal output unit when bright light having a predetermined brightness or more is incident on the light receiving elements. Therefore, the signal output unit can output an electrical signal corresponding to the brightness of light from which good quality image data can be obtained regardless of the brightness of the light incident on the light receiving element.

  For this reason, the solid-state imaging device according to the present invention performs charge multiplication processing in the charge multiplication processing unit when photographing a dark place, and charges one row of light receiving elements when photographing a bright place. By directly transferring from the horizontal transfer unit to the signal output unit, it is possible to acquire high-quality image data regardless of the brightness of the place to be imaged.

  The solid-state imaging device according to the present invention includes a horizontal transfer unit that performs normal charge transfer and a charge multiplication processing unit that performs charge multiplication processing. Optimization design with voltage can be performed, and optimization design with high voltage can be performed for the charge multiplication processing unit. Therefore, it is possible to prevent the occurrence of transfer defects such as charge remaining when a low voltage is applied.

  The solid-state imaging device (2, 3) according to aspect 2 of the present invention is the above-described aspect 1, wherein the signal output unit includes a first signal output unit (first output circuit 25) and a second signal output unit (second output). The first signal output unit converts the electric charge for one row of the light receiving elements transferred from the horizontal transfer unit into the electric signal and outputs the electric signal, and the second signal output unit Preferably, the multiplied charge transferred from the charge multiplication processing unit is converted into the electric signal and output.

  The number of charges of the multiplied charge subjected to the charge multiplication process is considerably larger than the number of charges normally transferred from the horizontal transfer unit. Therefore, when the multiplied charge and the normally transferred charge are input to the same signal output unit, if the signal output unit is designed for normal transfer, the multiplied charge cannot be completely converted into an electric signal. There is a possibility of disappearing.

  In this respect, according to the above configuration, the charge for one row of the light receiving elements is directly transferred from the horizontal transfer unit to the first signal output unit, and the multiplied charge is transferred to the second signal output unit. Therefore, the first signal output unit can be designed to be suitable for normal transfer, and the second signal output unit can be designed to be suitable for charge multiplication processing. Therefore, the solid-state imaging device according to the present invention can reliably convert each of the normally transferred charge and multiplication charge into an electric signal.

  In the solid-state imaging device (1, 2, 3) according to aspect 3 of the present invention, in the aspect 1 or 2, the horizontal transfer unit includes four electrodes (gate electrodes 13a) per light receiving element. The four electrodes are arranged in series in the direction, and each of the four electrodes is paired with one of two adjacent electrodes, and the same pulse voltage is applied thereto. It is preferable to switch the combination of the two electrodes constituting the one set according to whether or not the amount of charge for one row of elements is smaller than a threshold value.

  According to the above configuration, each of the four electrodes arranged in series in the horizontal direction forms a set with any one of the two adjacent electrodes and is applied with the same pulse voltage. Further, the horizontal transfer unit can switch the combination of the two electrodes constituting the one set according to whether or not the amount of charge for one row of the light receiving elements is smaller than the threshold value.

  Therefore, when light that is darker than the predetermined light intensity is incident on the light receiving element, the horizontal transfer unit applies the same pulse voltage as one set, and the electrode closer to the charge multiplication processing unit is connected to the N-type impurity layer. And the farther electrode is the electrode corresponding to the N-type + P-type impurity layer, the charge for one row of the light receiving elements can be transferred to the charge multiplication processing section. In addition, in the case where bright light exceeding the brightness of predetermined light is incident on the light receiving element, the electrode closer to the signal output unit corresponds to the N-type impurity layer as one set to which the same pulse voltage is applied. By using the far electrode as the electrode corresponding to the N-type + P-type impurity layer, the charge for one row of the light receiving elements can be transferred to the signal output unit.

  Therefore, in the solid-state imaging device according to the present invention, the light incident on the light receiving element is appropriately switched by appropriately switching the combination of two electrodes that apply the same pulse voltage according to the brightness of the light incident on the light receiving element. Regardless of the brightness, high-quality image data can be acquired.

  In the solid-state imaging device according to Aspect 4 of the present invention, in any one of Aspects 1 to 3, the charge multiplication processing unit includes three electrodes arranged in series in the horizontal direction per light receiving element. The first pulse voltage is applied to the first electrode (first gate electrode 14a) disposed on the side closest to the signal output unit among the three electrodes, and is the farthest from the signal output unit. A second pulse voltage having a high voltage lower than the high voltage of the first pulse voltage is applied to the second electrode (second gate electrode 14b) disposed on the side, and the first electrode and the first electrode A constant voltage lower than the high voltage of the first pulse voltage and higher than the low voltage of the second pulse voltage is applied to the third electrode (third gate electrode 14c) disposed between the two electrodes. Preferably it is applied.

  According to the above configuration, among the three electrodes arranged in series in the horizontal direction in the charge multiplication processing unit, the first pulse voltage is applied to the first electrode, and the second pulse voltage is applied to the second electrode. Applied. Accordingly, by setting the high voltage of the first pulse voltage to be considerably higher than the high voltage of the second pulse voltage, and applying the low voltage to the second electrode at the same time as applying the high voltage to the first electrode, the charge is increased. It is possible to create a potential difference that causes a double reaction. In addition, the multiplied charge generated by the charge multiplication process can be transferred to the signal output unit.

  In general, when there is no constant voltage application electrode in the transfer section for charge multiplication, there is a point in time when the potential difference becomes small during the inversion of the pulse voltage applied to each electrode. The reaction may not occur sufficiently. In that respect, according to the above configuration, since a constant voltage is applied to the third electrode, there is no point in time when the potential difference becomes small. Therefore, it is possible to realize a solid-state imaging device that performs charge multiplication processing with high accuracy.

  The solid-state imaging device according to aspect 5 of the present invention is the solid-state imaging device according to aspect 4, in which the gate length that is the length of the horizontal electrode in the third electrode is the gate length of the first electrode and the second electrode. It is preferable that the gate length is shorter than the above.

  According to the above configuration, the gate length of the third electrode is shorter than the gate length of the first electrode and the gate length of the second electrode. Therefore, for example, the gate length of the third electrode is shortened so that only the N-type + P-type impurity layer is disposed vertically below the third electrode, and the first electrode and the second electrode are shortened by the shortened gate length. By increasing the gate length of the electrode, it is possible to increase the charge capacity of the charge multiplication processing unit while obtaining a sufficient charge multiplication effect.

  In the solid-state imaging device according to aspect 6 of the present invention, in the aspect 3, it is preferable that the total number of the four electrodes is four times or more the number corresponding to one row of the light receiving elements.

  According to the above configuration, the total number of the four electrodes arranged in the horizontal transfer unit is at least four times the number of light receiving elements for one row. Therefore, four electrodes can be reliably assigned to each light receiving element constituting the row of light receiving elements. Therefore, the horizontal transfer unit can appropriately switch the transfer direction of all the charges for one row of the light receiving elements transferred from the vertical transfer unit according to the brightness of the light incident on the light receiving elements. It is possible to prevent charge from being left behind.

  In the solid-state imaging device according to aspect 7 of the present invention, in the above aspect 4 or 5, the total number of the three electrodes is preferably three times the number of multiplication stages that is the number of the charge multiplication processing units. .

  According to the above configuration, the total number of the three electrodes disposed in the charge multiplication processing unit is three times the number of multiplication stages. Therefore, the solid-state imaging device according to the present invention can cause a charge multiplication reaction with high accuracy for each charge multiplication process executed in one stage of charge multiplication processing unit. Therefore, it is possible to realize a solid-state imaging device that performs charge multiplication processing with higher accuracy.

  The solid-state imaging device according to aspect 8 of the present invention is the solid-state imaging device according to aspect 7, wherein the charge multiplication processing unit replaces the empty transfer unit that performs only transfer of the multiplied charge from the number of light receiving elements in one row. It is preferable to provide only the number obtained by subtracting the number of stages.

  In general, the total number of packets in the horizontal transfer unit for normal transfer is the same as the number of light receiving elements for one row. Here, if the total number of packets in the transfer unit for charge multiplication is less than the total number of packets in the horizontal transfer unit for normal transfer, that is, the number for one row of the light receiving elements, the charge increase with respect to the charge for one row of the light receiving elements. While double processing is being performed, reading from the final stage of the vertical transfer unit to the horizontal transfer unit for normal transfer is performed. In this case, the induction signal enters the electric signal, and unnecessary image data corresponding to the induction signal appears.

  Therefore, in order to smoothly perform the process from the reading of electric charges to the output of electric signals, it is desirable that the reading of electric charges is performed after the charge multiplication process for the electric charges for one row of the light receiving elements is completed. In other words, it is desirable that the number of light receiving elements for one row (the total number of packets in the horizontal transfer unit for normal transfer) and the total number of packets in the transfer unit for charge multiplication are the same. Here, in each transfer unit, a plurality of electrodes assigned to one charge accumulation and charge transfer are set as one packet.

  In that respect, according to the above configuration, the charge multiplication processing unit includes the empty transfer units corresponding to the number obtained by subtracting the number of multiplication stages from the number of light receiving elements for one row. Here, since the number of multiplication stages is the same as the total number of packets of the charge multiplication processing unit, the charge multiplication processing unit is provided with empty transfer units corresponding to the shortage of the total number of packets of the charge multiplication processing unit. become. Therefore, after all the multiplied charges are output from the charge multiplication processing unit, the charges for one row of the light receiving elements are read by the horizontal transfer unit.

  Therefore, the solid-state imaging device according to the present invention can suppress the generation of the induction signal even when the total number of packets of the charge multiplication processing unit is less than the number of one row of the light receiving elements. The signal can be output smoothly.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention. Furthermore, a new technical feature can be formed by combining the technical means disclosed in each embodiment.

1, 2, 3 Solid-state imaging device 11 Photodiode (light receiving device)
12 Vertical transfer CCD (vertical transfer unit)
13 Horizontal transfer CCD (horizontal transfer unit)
13a Gate electrode (electrode)
14, 14 'Charge multiplication processing unit 14a First gate electrode (first electrode)
14b Second gate electrode (second electrode)
14c Third gate electrode (third electrode)
15 Output circuit (signal output unit)
25 1st output circuit (1st signal output part)
26 Second output circuit (second signal output unit)

The present invention has been made to solve each of the above-mentioned problems, and its purpose is to provide high-quality image data regardless of the brightness of the location to be photographed and the brightness of the light incident on the light receiving element. It is to to so that can get. Another object of the present invention is to provide a solid-state imaging device in which the occurrence of charge transfer defects when a constant voltage is applied is suppressed.

In order to solve the above problems, a solid-state imaging device according to one embodiment of the present invention includes a plurality of two-dimensionally arranged light receiving elements that photoelectrically convert incident light to generate charges, and the plurality of light receiving elements. The vertical transfer unit that reads out the charge from the vertical direction and transfers it in the vertical direction, and four electrodes per light receiving element are arranged in series in the horizontal direction, and the charge transferred from the vertical transfer unit is a horizontal transfer section for transferring to the horizontal direction for each charge of the light-receiving element 1 row by performing charge multiplication process on the transferred the light receiving element 1 row of charge from the horizontal transfer unit, increasing Charge multiplication processing unit for generating double charge, charge for one row of the light receiving elements transferred from the horizontal transfer unit, and the multiplication charge transferred from the charge multiplication processing unit are converted into electric signals It comprises a signal output which is output, the upper Each of the four electrodes are same pulse voltage becomes either a set of two electrodes adjacent applied, the horizontal transfer unit, than the amount of charges of one row above the light receiving element is the threshold Depending on whether it is small or not, the combination of the two electrodes constituting the one set is switched, and only when the amount of charge for one row of the light receiving elements is less than a threshold, the charge for one row of the light receiving elements Is transferred to the charge multiplication processing section.

According to an embodiment of the present invention, a combination of two electrode sets to which the same pulse voltage is applied according to the amount of charge is switched, and the transfer destination from the horizontal transfer unit is changed, so that an image is taken. brightness of the surroundings, and regardless of the brightness of the light incident on the light receiving element Ru can get a high-quality image data. In addition , occurrence of charge transfer failure when a low voltage is applied is suppressed.

The solid-state imaging device (1, 2, 3) according to the first aspect of the present invention has a plurality of two-dimensionally arranged light receiving elements (photodiodes 11) that photoelectrically convert incident light to generate charges (100). A vertical transfer unit (water book transfer CCD 12) that reads out the charges from the plurality of light receiving elements and transfers them in the vertical direction and four electrodes (gate electrodes 13a) per light receiving element are serially connected in the horizontal direction. together are arranged in the transfer, the has been the charge transferred from the vertical transfer portions, horizontal transfer section for transferring to the horizontal direction for each charge of the light-receiving element one row (horizontal transfer CCD 13), from the horizontal transfer unit The charge multiplication processing unit (14, 14 ') that generates the multiplication charge (110) by performing charge multiplication processing on the electricity for one row of the received light receiving elements, and transfer from the horizontal transfer unit For one row of the light receiving elements A signal output unit (output circuit 15, first output circuit 25, second output circuit 26) that converts the charge and the multiplied charge transferred from the charge multiplication processing unit into an electrical signal and outputs the electrical signal; Each of the four electrodes is paired with one of two adjacent electrodes and is applied with the same pulse voltage, and the horizontal transfer unit has a charge amount of one row of the light receiving elements. Depending on whether or not it is less than the threshold value, the combination of the two electrodes constituting the one set is switched, and only when the amount of charge for one row of the light receiving element is less than the threshold value, the one row of the light receiving elements. Is transferred to the charge multiplication processing unit.

According to the above configuration, the horizontal transfer unit transfers the charge for one row of light receiving elements to the charge multiplication processing unit only when the amount of charge for one row of light receiving elements transferred from the vertical transfer unit is smaller than the threshold value. Forward to. Therefore, when the amount of charge for one row of light receiving elements transferred from the vertical transfer unit is equal to or greater than the threshold value, the horizontal transfer unit transfers the charge for one row of light receiving elements to the signal output unit. Moreover, according to the said structure, each of the four electrodes arrange | positioned in series in a horizontal direction makes one set with either one of two adjacent electrodes, and the same pulse voltage is applied. Further, the horizontal transfer unit can switch the combination of the two electrodes constituting the one set according to whether or not the amount of charge for one row of the light receiving elements is smaller than the threshold value.

Here, since the brightness of the light incident on the light receiving element is proportional to the amount of charge generated by the light receiving element, the horizontal transfer unit receives light that is darker than the predetermined light brightness on the light receiving element. In this case, the charge for one row of the light receiving elements is transferred to the charge multiplication processing unit. Then, the charge multiplication processing unit generates the multiplied charge and transfers the multiplied charge to the signal output unit. In addition, the horizontal transfer unit transfers the charge for one row of the light receiving elements to the signal output unit when bright light having a predetermined brightness or more is incident on the light receiving elements. Therefore, the signal output unit can output an electrical signal corresponding to the brightness of light from which good quality image data can be obtained regardless of the brightness of the light incident on the light receiving element. Further, when light that is darker than the predetermined light intensity is incident on the light receiving element, the horizontal transfer unit applies the same pulse voltage as one set, and the electrode closer to the charge multiplication processing unit is connected to the N-type impurity layer. And the farther electrode is the electrode corresponding to the N-type + P-type impurity layer, the charge for one row of the light receiving elements can be transferred to the charge multiplication processing section. In addition, in the case where bright light exceeding the brightness of predetermined light is incident on the light receiving element, the electrode closer to the signal output unit corresponds to the N-type impurity layer as one set to which the same pulse voltage is applied. By using the far electrode as the electrode corresponding to the N-type + P-type impurity layer, the charge for one row of the light receiving elements can be transferred to the signal output unit.

For this reason, the solid-state imaging device according to the present invention performs charge multiplication processing in the charge multiplication processing unit when photographing a dark place, and charges one row of light receiving elements when photographing a bright place. By directly transferring from the horizontal transfer unit to the signal output unit, it is possible to acquire high-quality image data regardless of the brightness of the place to be imaged. In addition, the solid-state imaging device according to the present invention appropriately switches the combination of two electrodes to which the same pulse voltage is applied according to the brightness of the light incident on the light receiving device. Regardless of the brightness, high-quality image data can be acquired.

Claims (5)

A plurality of two-dimensionally arranged light receiving elements that photoelectrically convert incident light to generate charges;
A vertical transfer unit that reads the charges from the plurality of light receiving elements and transfers them in the vertical direction;
A horizontal transfer unit that transfers the charge transferred from the vertical transfer unit in the horizontal direction for each row of light receiving elements;
A charge multiplication processing unit for generating a multiplied charge by performing a charge multiplication process on the charge for one row of the light receiving elements transferred from the horizontal transfer unit;
A signal output unit that converts the charge for one row of the light receiving elements transferred from the horizontal transfer unit and the multiplied charge transferred from the charge multiplication processing unit into an electrical signal and outputs the electrical signal;
The horizontal transfer unit transfers the charge for one row of light receiving elements to the charge multiplication processing unit only when the amount of charge for one row of light receiving elements is smaller than a threshold value. element. The signal output unit includes a first signal output unit and a second signal output unit,
The first signal output unit converts the electric charge for one row of the light receiving elements transferred from the horizontal transfer unit into the electric signal and outputs the electric signal, and the second signal output unit includes the charge multiplication processing unit. The solid-state imaging device according to claim 1, wherein the multiplied charge transferred from the device is converted into the electrical signal and output. In the horizontal transfer unit, four electrodes per light receiving element are arranged in series in the horizontal direction, and each of the four electrodes is paired with one of two adjacent electrodes. And the same pulse voltage is applied,
The horizontal transfer section switches a combination of two electrodes constituting the one set according to whether or not the amount of charge for one row of the light receiving elements is smaller than a threshold value. 2. A solid-state imaging device according to 2. In the charge multiplication processing unit, three electrodes per light receiving element are arranged in series in the horizontal direction,
Of the three electrodes, the first pulse voltage is applied to the first electrode disposed on the side closest to the signal output unit, and the second electrode disposed on the side farthest from the signal output unit is applied to the second electrode disposed on the side farthest from the signal output unit. A second pulse voltage that is a high voltage lower than the high voltage of the first pulse voltage is applied;
The third electrode arranged between the first electrode and the second electrode has a constant voltage lower than the high voltage of the first pulse voltage and higher than the low voltage of the second pulse voltage. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is applied.   The gate length, which is the length of the horizontal electrode in the third electrode, is shorter than the gate length of the first electrode and the gate length of the second electrode. Solid-state image sensor.

Images