JPS6474736A - Formation of element isolating region - Google Patents
Formation of element isolating regionInfo
- Publication number
- JPS6474736A JPS6474736A JP23301087A JP23301087A JPS6474736A JP S6474736 A JPS6474736 A JP S6474736A JP 23301087 A JP23301087 A JP 23301087A JP 23301087 A JP23301087 A JP 23301087A JP S6474736 A JPS6474736 A JP S6474736A
- Authority
- JP
- Japan
- Prior art keywords
- element isolating
- layer
- isolating groove
- spacer layer
- expose
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Element Separation (AREA)
Abstract
PURPOSE:To prevent the filler materials inside an element isolating groove from being removed excessively by a method wherein a spacer layer is specified thickness is formed between a semiconductor layer and polished materials formed on overall surface. CONSTITUTION:A spacer layer 11 in thickness larger than the excessive polishing amount is formed on a semiconductor substrate 1. After making a window 11a in the spacer layer 11, an element isolating groove 6 is formed using the window 11a. A thin oxide film 7, a silicon oxide layer 8 by CVD process and a polysilicon layer 9 are successively formed on the inner walt of the element isolating groove 6 by oxidation process. The surface polysilicon layer 9 is removed by polishing process using ammonia base slurry containing colloidal silica to expose the silicon oxide layer 8. Next, the surface is polished using fluorine base slurry mixed with e.g. alumina to expose the spacer layer 11. Through these procedures, the filler materials inside element isolating groove can be prevented from being removed excessively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23301087A JPS6474736A (en) | 1987-09-17 | 1987-09-17 | Formation of element isolating region |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23301087A JPS6474736A (en) | 1987-09-17 | 1987-09-17 | Formation of element isolating region |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6474736A true JPS6474736A (en) | 1989-03-20 |
Family
ID=16948401
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23301087A Pending JPS6474736A (en) | 1987-09-17 | 1987-09-17 | Formation of element isolating region |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6474736A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06196551A (en) * | 1992-09-04 | 1994-07-15 | Internatl Business Mach Corp <Ibm> | Flattening of recessed part surface of semiconductor structure |
| JP2002076113A (en) * | 2000-08-31 | 2002-03-15 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
| JP2008212007A (en) * | 2007-02-28 | 2008-09-18 | Iseki & Co Ltd | Combine harvester |
| JP2011049603A (en) * | 2010-12-06 | 2011-03-10 | Panasonic Corp | Semiconductor device, and method of manufacturing the same |
-
1987
- 1987-09-17 JP JP23301087A patent/JPS6474736A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06196551A (en) * | 1992-09-04 | 1994-07-15 | Internatl Business Mach Corp <Ibm> | Flattening of recessed part surface of semiconductor structure |
| JP2002076113A (en) * | 2000-08-31 | 2002-03-15 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
| JP2008212007A (en) * | 2007-02-28 | 2008-09-18 | Iseki & Co Ltd | Combine harvester |
| JP2011049603A (en) * | 2010-12-06 | 2011-03-10 | Panasonic Corp | Semiconductor device, and method of manufacturing the same |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3922705A (en) | Dielectrically isolated integral silicon diaphram or other semiconductor product | |
| US3909332A (en) | Bonding process for dielectric isolation of single crystal semiconductor structures | |
| JPS5587444A (en) | Method of forming insulating film on semiconductor surface | |
| TW334580B (en) | Method of manufacture semiconductor device | |
| JPS56161646A (en) | Manufacture of semiconductor device | |
| EP0368584A3 (en) | Method of manufacturing a semiconductor wafer | |
| JPS6474736A (en) | Formation of element isolating region | |
| DE3565910D1 (en) | Method of manufacturing a semiconductor device comprising a silicon body, in which a sunken oxide layer is locally provided | |
| Mizuno et al. | Oxidation rate reduction in the submicrometer LOCOS process | |
| GB1418231A (en) | Method for fabricating a semiconductor device | |
| JPH05283351A (en) | Susceptor | |
| JPS6442823A (en) | Flattening of semiconductor device surface | |
| US5773354A (en) | Method of forming SOI substrate | |
| JPS54103684A (en) | Production of semiconductor pressure transducing element | |
| TW374947B (en) | Shallow trench isolation structure and the manufacturing method | |
| JPS57128943A (en) | Insulation isolated semiconductor integrated device and manufacture thereof | |
| JPS5350979A (en) | Method of treatment of thin oxide layer on silicon substrate | |
| JPH02237066A (en) | Manufacture of semiconductor device | |
| JPS56146254A (en) | Manufacture of semiconductor device | |
| EP0220108A3 (en) | Side-wall doping for trench isolation | |
| AU585646B2 (en) | Method of forming polycrystalline silicon layer on semiconductor wafer | |
| JPS57196585A (en) | Manufacture of high-speed mesa type semiconductor device | |
| EP0067738A3 (en) | Method of reducing encroachment in a semiconductor device | |
| JPS6141136B2 (en) | ||
| JPS57184217A (en) | Manufacture of semiconductor device |