JPS6473423A - Instruction look-ahead controller - Google Patents
Instruction look-ahead controllerInfo
- Publication number
- JPS6473423A JPS6473423A JP23011787A JP23011787A JPS6473423A JP S6473423 A JPS6473423 A JP S6473423A JP 23011787 A JP23011787 A JP 23011787A JP 23011787 A JP23011787 A JP 23011787A JP S6473423 A JPS6473423 A JP S6473423A
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- buffer
- branching
- stored
- branch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To prevent the deterioration of performance due to branching by the aid of a simple constituting element by using dynamically a part of a usual instruction buffer. CONSTITUTION:When branching instruction is decoded while the instruction buffer of 0-1-2-3 system is being used, the instruction of branch destination is stored in a buffer 0', and in such a state, the decision of a branching condition is waited, and when the branch is realized, the instruction stored in the buffer 0' is used, and the instruction after the subsequent instruction is looked ahead by using the buffer 1-2-3. At that time, the buffer 0 is made vacant in order to provide for the next branching instruction. When the branch is not realized, the instruction stored in the buffer of 0-1-2-3 system is used as it is, and the instruction stored in the buffer 0' is canceled, and the buffer 0' is made vacant for the next branching instruction. Thus, the deterioration of the performance due to the processing of the branching instruction can be prevented.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23011787A JPS6473423A (en) | 1987-09-14 | 1987-09-14 | Instruction look-ahead controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23011787A JPS6473423A (en) | 1987-09-14 | 1987-09-14 | Instruction look-ahead controller |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6473423A true JPS6473423A (en) | 1989-03-17 |
Family
ID=16902839
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23011787A Pending JPS6473423A (en) | 1987-09-14 | 1987-09-14 | Instruction look-ahead controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6473423A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02301833A (en) * | 1989-05-17 | 1990-12-13 | Sony Tektronix Corp | Pipeline processing method |
| EP0471888A2 (en) * | 1989-08-28 | 1992-02-26 | Nec Corporation | Microprocessor for enhancing initiation of data processing after execution of conditional branch instruction |
-
1987
- 1987-09-14 JP JP23011787A patent/JPS6473423A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02301833A (en) * | 1989-05-17 | 1990-12-13 | Sony Tektronix Corp | Pipeline processing method |
| EP0471888A2 (en) * | 1989-08-28 | 1992-02-26 | Nec Corporation | Microprocessor for enhancing initiation of data processing after execution of conditional branch instruction |
| US5381532A (en) * | 1989-08-28 | 1995-01-10 | Nec Corporation | Microprocessor having branch aligner between branch buffer and instruction decoder unit for enhancing initiation of data processing after execution of conditional branch instruction |
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