JPS6467036A - Demodulation circuit - Google Patents

Abstract

PURPOSE:To constitute a demodulation circuit with high reliability without using a clock of a high frequency by demodulating by using a clock of a period equal to a data transferring period. CONSTITUTION:The titled circuit is equipped with circuits 3-6 to collate an output that a digital modulating signal is successively latched by first and second clocks which have the period equal to the data transferring period and are in an inverse relation to each other with an output that the digital modulating signal is latched by the second clock in parallel with this and to obtain a signal output which is inverted by data '1'. The titled circuit is equipped with a clock extracting circuits 11 and a clock selecting circuit 12 to detect a special pattern in the digital modulating signal, from this and the phase relation of the two clocks, to select a regular clock and an inverse clock and to make them the first and second clocks. Thus, an identification and a demodulation can be executed at the same clock period as the transferring speed of digital data which is effective especially when the clock needs a high speed.