JPS6454489A - Bit map display circuit - Google Patents
Bit map display circuitInfo
- Publication number
- JPS6454489A JPS6454489A JP62210643A JP21064387A JPS6454489A JP S6454489 A JPS6454489 A JP S6454489A JP 62210643 A JP62210643 A JP 62210643A JP 21064387 A JP21064387 A JP 21064387A JP S6454489 A JPS6454489 A JP S6454489A
- Authority
- JP
- Japan
- Prior art keywords
- bits
- read out
- case
- vertical
- original data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000013507 mapping Methods 0.000 abstract 2
Landscapes
- Image Processing (AREA)
- Controls And Circuits For Display Device (AREA)
Abstract
PURPOSE: To speed up enlarging and reducing processing time by converting a transfer source address by a mapping RAM in the case of vertical enlargement/reduction, and in the case of horizontal enlargement/reduction, changing the frequency of a dot clock. CONSTITUTION: The vertical reading of original data is executed through a picture processing control part 1, a display control part 5 and the mapping RAM 8. When the horizontal bits of bit image data to be displayed to a CRT monitor in which the number of vertical display rasters is Mv lines is Nh bits and the vertical bits are Nv bits, suitable original data for (Mv-Nv) lines are overlappedly read out in the case of Mv>Nv, and in the case of Mv<Nv, suitable original data for (Nv-Mv) lines are read out in a thinned state to read out bit image data consisting of Mv bits. The horizontal reading of the original data is executed by a display control part 5 and the frequency of a dot clock for generating a video signal from bit image data read out from a bit map memory(BMM) 2 and outputting the data to the CRT monitor 7 is variably set up correspondingly to the value of Nh.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62210643A JPS6454489A (en) | 1987-08-25 | 1987-08-25 | Bit map display circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62210643A JPS6454489A (en) | 1987-08-25 | 1987-08-25 | Bit map display circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6454489A true JPS6454489A (en) | 1989-03-01 |
Family
ID=16592705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62210643A Pending JPS6454489A (en) | 1987-08-25 | 1987-08-25 | Bit map display circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6454489A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002091408A (en) * | 2000-06-12 | 2002-03-27 | Genesis Microchip Inc | Device and method for scanning image within narrow horizontal frequency range irrespective of frequency at which image is received |
| CN105719240A (en) * | 2016-01-21 | 2016-06-29 | 腾讯科技（深圳）有限公司 | Method and apparatus for picture processing |
-
1987
- 1987-08-25 JP JP62210643A patent/JPS6454489A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002091408A (en) * | 2000-06-12 | 2002-03-27 | Genesis Microchip Inc | Device and method for scanning image within narrow horizontal frequency range irrespective of frequency at which image is received |
| CN105719240A (en) * | 2016-01-21 | 2016-06-29 | 腾讯科技（深圳）有限公司 | Method and apparatus for picture processing |
| CN105719240B (en) * | 2016-01-21 | 2019-01-08 | 腾讯科技（深圳）有限公司 | The method and apparatus of picture processing |
| US10593018B2 (en) | 2016-01-21 | 2020-03-17 | Tencent Technology (Shenzhen) Company Limited | Picture processing method and apparatus, and storage medium |
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