JPS6454153U - - Google Patents
Info
- Publication number
- JPS6454153U JPS6454153U JP14984687U JP14984687U JPS6454153U JP S6454153 U JPS6454153 U JP S6454153U JP 14984687 U JP14984687 U JP 14984687U JP 14984687 U JP14984687 U JP 14984687U JP S6454153 U JPS6454153 U JP S6454153U
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- watchdog timer
- fixed time
- counter
- count
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005856 abnormality Effects 0.000 claims description 4
- 238000001514 detection method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 3
Description
第１図は本考案の一実施例に係る異常検出回路
の回路図、第２図は変形例の異常検出回路の回路
図、第３図は従来の異常検出回路の回路図である
。
なお図面に用いた符号において、１０…ＣＰＵ
、１１…ウオツチドツグタイマ、１２…ＯＲゲー
ト、１３…カウンタ、１４…スイツチ、である。
FIG. 1 is a circuit diagram of an abnormality detection circuit according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a modified abnormality detection circuit, and FIG. 3 is a circuit diagram of a conventional abnormality detection circuit. In addition, in the symbols used in the drawings, 10...CPU
, 11...watchdog timer, 12...OR gate, 13...counter, 14...switch.
Claims (1)
どうかをウオツチドツグタイマによつて検出する
とともに、一定の時間内に前記所定の信号が得ら
れない場合にＣＰＵをリセツトするようにした回
路において、前記ウオツチドツグタイマのリセツ
ト信号の回数をカウントするカウンタを設け、該
カウンタのカウント値が所定の値を越えたら前記
ＣＰＵに対するリセツト信号を連続的に発信する
か前記ＣＰＵの動作を停止させるようにしたこと
を特徴とするコンピユータの異常検出回路。 A circuit that uses a watchdog timer to detect whether or not a CPU generates a predetermined signal at fixed time intervals, and resets the CPU if the predetermined signal is not obtained within a fixed time. A counter is provided to count the number of reset signals of the watchdog timer, and when the count value of the counter exceeds a predetermined value, a reset signal is continuously transmitted to the CPU or the operation of the CPU is stopped. An abnormality detection circuit for a computer, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14984687U JPS6454153U (en) | 1987-09-29 | 1987-09-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14984687U JPS6454153U (en) | 1987-09-29 | 1987-09-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6454153U true JPS6454153U (en) | 1989-04-04 |
Family
ID=31422449
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14984687U Pending JPS6454153U (en) | 1987-09-29 | 1987-09-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6454153U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0991171A (en) * | 1995-09-20 | 1997-04-04 | Sharp Corp | Runaway detection and recovery system |
-
1987
- 1987-09-29 JP JP14984687U patent/JPS6454153U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0991171A (en) * | 1995-09-20 | 1997-04-04 | Sharp Corp | Runaway detection and recovery system |