JPS6442758A - Input and output control system - Google Patents
Input and output control systemInfo
- Publication number
- JPS6442758A JPS6442758A JP20021487A JP20021487A JPS6442758A JP S6442758 A JPS6442758 A JP S6442758A JP 20021487 A JP20021487 A JP 20021487A JP 20021487 A JP20021487 A JP 20021487A JP S6442758 A JPS6442758 A JP S6442758A
- Authority
- JP
- Japan
- Prior art keywords
- sub
- control device
- discriminating
- numbers
- low order
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To prevent an overlapping from being generated for the discriminating number of a sub-control device by giving a number, which is obtained by executing a prescribed operation to the set discriminating number, to the sub-control device of the next low order as the next discriminating number and by successively allocating the respective discriminating numbers to the respective sub-control devices. CONSTITUTION:The discriminating number of a sub-control device 3a, which is connected to the highest order of a data flow on a data bus 2, is set by an initial value from a main control device 1 and the discriminating number of a sub-control device 3b, which is connected to the low order of the data flow, is set by the number obtained by the operation in the sub-control device 3a. Further, the discriminating number of a sub-control device 3c, which is connected to the low order, is set by the number obtained by the operation in the sub-control device 3b. Thus, the discriminating numbers of the sub-control devices 3a, 3b and 3c are respectively set and the main control device 1 can respectively designate the respective sub-control devices 3a, 3b and 3c by sending the respective discriminating numbers. Then, the input and output control of the designated sub-control device and data is executed. Thus, the overlapping of the discriminating number of the sub-control device can be prevented from being generated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20021487A JPS6442758A (en) | 1987-08-11 | 1987-08-11 | Input and output control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20021487A JPS6442758A (en) | 1987-08-11 | 1987-08-11 | Input and output control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6442758A true JPS6442758A (en) | 1989-02-15 |
Family
ID=16420711
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20021487A Pending JPS6442758A (en) | 1987-08-11 | 1987-08-11 | Input and output control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6442758A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6042763A (en) * | 1996-09-20 | 2000-03-28 | Kumaoka; Shun`Ichi | Method of preparing porous ceramics provided with amorphous pore surfaces |
-
1987
- 1987-08-11 JP JP20021487A patent/JPS6442758A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6042763A (en) * | 1996-09-20 | 2000-03-28 | Kumaoka; Shun`Ichi | Method of preparing porous ceramics provided with amorphous pore surfaces |
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