JPS6424298A - Driving of image memory - Google Patents

Driving of image memory

Info

Publication number
JPS6424298A
JPS6424298A JP62181332A JP18133287A JPS6424298A JP S6424298 A JPS6424298 A JP S6424298A JP 62181332 A JP62181332 A JP 62181332A JP 18133287 A JP18133287 A JP 18133287A JP S6424298 A JPS6424298 A JP S6424298A
Authority
JP
Japan
Prior art keywords
image
image signal
data
memory
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62181332A
Other languages
Japanese (ja)
Inventor
Yoichi Wakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP62181332A priority Critical patent/JPS6424298A/en
Priority to EP88304161A priority patent/EP0291252A3/en
Priority to US07/193,448 priority patent/US4908710A/en
Publication of JPS6424298A publication Critical patent/JPS6424298A/en
Pending legal-status Critical Current

Links

Landscapes

  • Image Input (AREA)
  • Memory System (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

PURPOSE: To simplify a circuit by writing image data to an image memory with a signal dividing an image signal period and reading the data out with a signal dividing one cycle of a composite image signal which consists of an image signal period and a non-image-signal period. CONSTITUTION: The image data are written to either of two memories L1 and L2 in a line memory 103, and image data read out of the line memory 103 are supplied to a column-side driving circuit 105 through a switch 104. To write the image signal data to the image memory 103, the image signal period Tv is divided into N periods and sampling is performed at intervals of a time Tv/N. To read the image signal data out, image signal data of one image signal period Tv are read out of the image memory 103 at intervals of a time Tc/M in one cycle Tc of the composite image signal. Here, M>=N (M and N are positive integers) and Tc/M>Tv/N. Consequently, the circuit can be simplified.
JP62181332A 1987-05-12 1987-07-21 Driving of image memory Pending JPS6424298A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP62181332A JPS6424298A (en) 1987-07-21 1987-07-21 Driving of image memory
EP88304161A EP0291252A3 (en) 1987-05-12 1988-05-09 Method of video display and video display device therefor
US07/193,448 US4908710A (en) 1987-05-12 1988-05-12 Method for driving a liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62181332A JPS6424298A (en) 1987-07-21 1987-07-21 Driving of image memory

Publications (1)

Publication Number Publication Date
JPS6424298A true JPS6424298A (en) 1989-01-26

Family

ID=16098845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62181332A Pending JPS6424298A (en) 1987-05-12 1987-07-21 Driving of image memory

Country Status (1)

Country Link
JP (1) JPS6424298A (en)

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