JPS639298A - Path selection circuit - Google Patents

Abstract

PURPOSE:To use only one multi-input gate independently of the increase in number of input signal lines by providing a 2-input AND gate to a signal branch circuit and ANDing an output signal of the multi-input gate and each input signal at the 2-input AND gate. CONSTITUTION:In selecting one input signal among input signals S1-Sn by an input signal selection switch 1, the input signal is fed to a corresponding 2-input AND gate and the multi-input gate. In selecting, e.g., a signal line 14a. the output of the gate 11 is the inverse of the input signal to a gate 12a and inputted to gates 12a-12n. Thus, the input signal S1 and the inverting signal are inputted to the gate 12a, where they are ANDed and an L signal is outputted. Since an H signal and the inverse of the signal S1 are inputted to the other gates 12b-12n, each output signal is all the inverse of the signal S1. Then the signal is inverted by output buffers 13a-13n and sent and only one gate 11 constitutes a path selection circuit.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a method for transmitting a signal transmitted from a certain point to each point other than one's own in a network constituted by a plurality of telephones, data terminals, other communication devices, etc. The present invention relates to a route selection circuit that selects, branches, and sends out signals.

[Conventional technology]

Fig. 4 is a block diagram showing the configuration of the route selection circuit of Jubei. , and the above switches are configured so that they are not turned on at the same time. 2 is a signal branching circuit that determines the route of the signal selected by the input signal selection switch 1; 3a, 3b;
,3c,.

..., 3y, 3z are buffers 4a, 4b, 4c, . . . which send out the output signals of the signal branch circuit 2.
..., 4y, 4z are multi-input gates forming the signal branch circuit 2, S, l 82. S3j”
',''l,,5n-1,,sn are input signals.

　　□.

Next, the operation will be explained. Input signal SllS29 S31 transmitted from each point of a network composed of multiple telephones, data terminals, other communication devices, etc.
"""l When one input signal is selected from s, -, , so by the input signal selection switch 1, this selected input signal is sent to the multi-input gate, 4b, 4C2...t
4n-1, 14n. Further, the remaining input signals become "H" and the multi-input gate 4a.

4,b,4c,...l 4n-114n. For example, in Fig. 4, the top input signal S□
Suppose that is selected. Other input signals 521S31...
....

Since So-□ and So are all 1'H''', the signal branching circuit 2 connects the multi-input gates 4b to the multi-input gates 4b other than the multi-input gate 4a.

An inverted signal of the input signal S selected by the input signal selection switch 1 appears at the outputs of 4c, . . . I 4o-1, 4n. And multi-input gates 4a, 4b,
Each output signal of 4c,...l 4n-114n is sent to the output buffer 3a, 3b, 3c, -,
3o-, 3o to each location.

Note that each input signal line corresponds to the multi-input gate 4a H4b H4e such that the input signal S is connected to the multi-input gate 4a and the input signal S2 is connected to the multi-input gate 4b.
r """ + 4n-1r The reason why it is not connected to 4n is that the point where it is sent out via the output buffer 3a on its extension line is actually the input signal S,, S2° selected by the input signal selection switch 1. S3...l 5n
Since this is the point where -11sn was transmitted, this is to avoid the duplication of sending known information back to oneself via the route selection circuit, and to save on the route selection circuit.

[Problem that the invention seeks to solve]

Since the conventional route selection circuit is configured as described above, if the number of input signal lines increases by one, the multi-input gates 4a, 4
bl 4 Q+ """+ 4n-sr One 4n must be added, and this multi-input gate 48 g
4 b g 4 Q g ”””+ 4n-1r 4
n Circuits in which any one of them performs equivalent operations are multi-input gates 4a, 4b, 4c,...'l
The more inputs to 4n-114n, the more
There are problems in that the assembly is complicated and the number of gates and stages increases in proportion to the number of inputs.

This invention was made to solve the above-mentioned problems, and aims to provide a route selection circuit that can reduce the number of multi-input gates to one, regardless of the increase in the number of input signal lines. .

[Means for solving problems]

The route selection circuit according to the present invention selects one input signal from among a large number of input signals transmitted from each point using an input signal selection switch, and sends the input signal from the input signal selection switch via an input signal line. The output signal of this multi-input gate and each input signal of the input signal line are ANDed by a two-input AND gate, and the output thereof is supplied to an output buffer. This is what I did.

[Effect]

The route selection circuit according to the present invention extracts only one input signal using the input signal selection switch, sends it to the multi-input gate via the input signal line, and the multi-input gate 4 sends the input signal to each two-input AND gate. Send out the inversion,
Each two-input AN'D gate sends a signal to a necessary point, but gates are applied to prevent signals from being sent to unnecessary points.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, the same components as those in FIG. 4 are given the same reference numerals and their explanations will be omitted. In FIG. 1, 10 is a signal branching circuit that determines the route of the signal selected by the input signal selection switch 1, and this signal branching circuit 12 is connected to a large number of input signals S.
Engineering l S2t S31...l 5o-1, sn
A multi-input gate 11 that extracts only the input signal selected by the input signal selection switch 1, and two-input AND gates 12a, 12b, 1 that do not output signals to other than the necessary points.
2c, --.

12o-1, 12;. 13a, 13
b , 13 c , ・=-,' 13. -1.13
6 is a two-input AND gate 12a, 12b, 12c, -,
12n-,.

an output buffer 14a for sending the output of 12o to each point;
, 14b, 14c, --, 14n-, , 14° are input signal lines.

Next, the operation will be explained based on FIGS. 2 and 3.

Input signals S, , S2 ., transmitted from each point of a network constituted by communication devices, etc. S3゜・・・・・・l
When one input signal from 5n-1*s is selected by the input signal selection switch, the selected input signal is supplied to the corresponding two-input AND gate and the multi-input gate 11. For example, assume that the input signal line 14a connected to the AND gate 12a is selected. Therefore, other input signal lines 14b, 14c, -, 14o
-1, 14n becomes "H", and the output of the multi-input gate 11 becomes the inversion of the input signal S of the two-input AND gate 12a. A timing chart of the signals in this area is shown in FIG. The output of this multi-input gate 11 is
D gates 12a, 12b, 12'c.

・・・・・・It is input to 12n-□, 12o, so
The input signal s1 and its inverted signal are input to the 2-input AND gate 12a, and the AND's are taken to output the IIL'' signal.The other 2-input AND gates 12b, 1
2c, -, 12n-□, 12. Since the "H" signal and the inverted version of the input signal S are input to the input signal S, each output signal is the inverted version of the input signal S1 selected by the signal selection switch 1. These signals are sent to each output buffer 13a.

By inverting and transmitting signals 13b, 13c, -, 13o-, , 1, and 3n, the entire circuit operates as a route selection circuit.

〔Effect of the invention〕

As described above, according to the present invention, the route selection circuit is composed of an input signal selection switch, one multi-input gate, and a simpler two-input AND gate, so the circuit can be simplified. This has the advantage that the device can be made at low cost and still operate in the same way as conventional devices.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a route selection circuit according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of the operation of the route selection circuit, and FIG. 3 is a timing diagram for explaining an embodiment of the present invention. FIG. 4 is a block diagram of a route selection circuit according to the prior art. S1. S, Hs3f ”””g S (1-1g Sn
is an input signal, 1 is an input signal selection switch, 10 is a signal branch circuit, 11 is a multi-input gate, 12a, 12b, 12c
. -==, 12. ,,12. is a 2-input AND gate, 1
3a, 13b, 13c, -...+ 13n-x+
13n is an output buffer. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Patent Applicant Mitsubishi Electric Co., Ltd. Agent Patent Attorney 1) Hiroshi Sawa (2 others) ' -8- Figure 1

Claims (1)

[Claims] an input signal selection switch that selects one from a large number of input signals transmitted from each point; a signal branching circuit that distributes the input signal selected by the input signal selection switch to the required points; and the signal branching circuit. In a route selection circuit consisting of an output buffer that sends an output signal to each point, the signal branching circuit is connected to one multi-input gate into which a large number of signals from the input signal selection switch are input, and from this multi-input gate. A route selection circuit comprising a two-input AND gate which inputs an output signal from the input signal selection stitch into one of the two, and inputs a large number of signals from the input signal selection stitch into the other of the two.