JPS6380374A - Polygon painting-out device - Google Patents

Abstract

PURPOSE:To considerably simplify the constitution by supplying contents of a register, where contents of the first storage device where an initial value or an accumulated value is stored are held, to a line describing part in case of line interpolation of two sides selected on the basis of coordinate data. CONSTITUTION:Initial value data or accumulated value data is read out from a multiport register file 1 and a register file 2, and increment value data is read out, and data is outputted from a pipeline register 3 to a line describing part 7, and addition is performed by an adding circuit 5. The addition result is stored in the register file 1 successively with delay of one operation time for each coordinate data. All data are simultaneously obtained as the whole in this manner, and obtained data are successively supplied to the line describing part 7 to perform the line interpolating operation and interpolated data transmission in a time approximating the conventional operation time, and the constitution is considerably simplified.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a polygon coloring device, and more specifically, a device for linearly interpolating two sides selected based on coordinate data supplied from a host computer. The present invention relates to a polygon filling device having a linear interpolation unit that generates linear drawing data based on linearly interpolated data.

<Prior Art> A polygon coloring function has traditionally been essential in graphic display devices, and as shown in FIG.
A polygon filling device was incorporated, which included a linear interpolation section composed of a large number of division circuits and addition circuits, and a straight line drawing section for drawing a straight line based on data obtained by the linear interpolation section.

To explain in more detail, the linear interpolation section has a total of 8 division circuits and a total of 8 division circuits in order to perform interpolation in the X direction, y direction, 2 directions, and ■ direction for each of the two sides. and an adder circuit which inputs the output data of
Directional linear interpolation is performed at the same time.

Further, the linear drawing section has three division circuits that input the data obtained by the linear interpolation section, and an addition circuit that inputs the output data from each division circuit,
A large number of pixel data corresponding to the line segment to be drawn is generated based on the interpolated data for each side obtained by the linear interpolation section, and is supplied to the drawing memory.

Therefore, a linear interpolation operation for two sides can be performed at high speed, and then a large number of pixel data corresponding to a line segment to be drawn can be generated based on the interpolation data.

Note that to achieve the texture mapping function, it is sufficient to add a linear interpolation section and a linear drawing section corresponding to the texture plane, and to achieve the sectioning function, it is sufficient to add a linear interpolation section and a linear drawing section corresponding to the texture plane. All you need to do is add a surface boundary value interpolator.

<Problems to be Solved by the Invention> In the polygon coloring device having the above configuration, there is a problem that the linear interpolation section is composed of a large number of division circuits and addition circuits, which makes the configuration complicated. However, there is a problem in that the frequency of use of the linear interpolation section, which has become complicated as described above, is significantly lower than the frequency of use of the linear drawing section.

To explain in more detail, for example, one polygon is
Assuming that it is a 20-pixel square, the calculations required to process one polygon are an average of 25 addition operations and 1 to 2 division operations in the linear capture section. On the other hand, the linear drawing section performs 400 addition operations and an average of 25 division operations, which means that the frequency of use of the linear interpolation section is significantly lower than that of the linear drawing section. Even though the frequency of use is low as described above, the required number of divider circuits and adder circuits in the linear interpolation section increases, and the operating efficiency of the divider circuits and adder circuits is extremely low.

In addition, in the linear interpolation section, after the addition operation is performed by the addition circuit based on the data output from the division circuit, the obtained interpolated data is transmitted to the linear drawing section. , the transmission operation of the obtained interpolated data is carried out sequentially and serially, as shown in FIG.

That is, after the initial full-stage addition is performed (see time TO),
The interpolated data of x, y, z, and I for the two sides are transmitted sequentially (see time T1 to T8), and finally the division start instruction data is transmitted (see time T9), so that the addition in the linear interpolation section One operating cycle of the circuit is completed.

Therefore, for example, if the total time of the addition operation and the transmission operation of the addition result is set to 1 μsec, the time required for the addition operation is 50 n5ec, and the time required to output the addition result is 100 n5ec. 8 on the pier
During the period of 50 n5ec, the adder circuit is not operating at all. In other words, even if the interpolated data of x, y, z, and 1 for two sides are obtained almost simultaneously, as mentioned above, there will be a considerable amount of time during which the adder circuit does not operate at all, so the overall processing time will be It won't be shortened too much. Therefore, even if it is possible to obtain all the interpolated data almost simultaneously by using a large number of adder circuits, the configuration will simply become complicated and no significant improvement in processing speed can be expected.

It is also conceivable to transmit the obtained interpolated data in parallel, but this poses the problem of significantly increasing the number of mounted components. Even if parallel transmission is possible, the denominator in the division circuit of the straight line drawing section is the division number obtained based on the starting and ending points of x and y.
Since this number of divisions is used to obtain the linear drawing data of z and I, a switching gate is required to supply the number of divisions and to supply interpolation data from the linear interpolation section. Therefore, even if all the interpolated data is transmitted in parallel, the processing time will not be reduced much, and the number of components to be mounted will increase significantly, which will be more inconvenient.

The above problem becomes particularly noticeable when not only a polygon filling operation is performed, but also texture mapping processing and sectioning processing are performed.

<Object of the invention> This invention was made in view of the above problems,
It is an object of the present invention to provide a polygon filling device whose configuration can be greatly simplified without substantially increasing the time required for linear interpolation.

Means for Solving the Problems To achieve the above object, the polygon filling device of the present invention linearly interpolates two sides selected based on coordinate data supplied from a host computer. The linear interpolation unit temporarily retains the contents of the first storage means for storing the initial value or the cumulative addition value, the second storage means for storing the incremental value, and the first and second storage means. the first and second registers, an addition means for adding the contents of the first and second registers, and a third register for temporarily holding the addition result output from the addition means. The contents of the first register are supplied to the line drawing section.

Function> The polygon coloring device with the above configuration linearly interpolates the two sides selected based on the coordinate data supplied from the host computer, and generates linear drawing data based on the linearly interpolated data. When filling a polygon by generating a polygon, initially the initial value of the first linear interpolation data is stored in the first storage means, and the increment value of the first linear interpolation data is stored in the second storage means. Store.

Thereafter, the contents of the first and second storage means are temporarily stored in the first and second registers, the contents of the first register are supplied to the line drawing section, and the contents of both registers are added to the adding means. and temporarily store it in the third register,
The contents of the first storage means are updated based on the contents of the third register.

Further, while performing the above operation, after the data is supplied from the first and second storage means to the first and second registers, the first and second storage means no longer store the data. Since there is no need to hold it, the initial value and incremental value of the second linear interpolation data can be stored.

Furthermore, after the data obtained by the adding means is supplied to the third register, the adding means can perform the next addition operation, so that the initial value and the increment value of the second linear interpolation data are During this time, the initial value and increment value of the third linear interpolation data are written to the first and second storage means, and the addition operation is written to the first and second registers. supply, and then
A write operation of the above addition result can be performed.

That is, the readout process, addition operation, output process, and writing process of the addition results of the linear interpolation data of each rank can be performed sequentially, and furthermore, the processing of each rank can be performed sequentially with a one-step delay.

<Example> Hereinafter, embodiments will be described in detail with reference to the accompanying drawings showing examples.

FIG. 1 is a block diagram showing an embodiment of the polygon coloring device of the present invention.

In the figure, the linear interpolation unit temporarily stores the contents of the multi-port register file (1) that stores the initial value or cumulative addition value, the register file (2) that stores the incremental value, and the multi-port register file (1). a first pipeline register (3) that temporarily holds the contents of the register file (2), a second pipeline register (4) that temporarily holds the contents of the register file (2), and the first and second pipeline registers. (3) It is composed of an addition circuit (5) that performs an addition operation using the contents of (4) as input, and a third pipeline register (6) that temporarily stores the addition result. The contents of the pipeline register (6) are supplied to the first multiport register file (1), and the contents of the first pipeline register (3) are supplied to the straight line drawing unit (7). Then, the multiport register file (1) and the register file (2) are provided with coordinate data, etc. (coordinate data of the end point of the side on which linear interpolation is to be performed, and the length of the side) from the general-purpose processor (8). (incremental value data calculated based on)
is supplied.

Note that (9) is 11 for importing drawing command data, etc.
0 interface and Oo) is memory. Also, a straight line drawing unit that generates pixel data forming a line segment based on linear interpolation data is x.

A division circuit (11) for y data and an addition circuit (12)
], a division circuit (13) for 2 data, an addition circuit (14), and a division circuit (15) for data (1), and an addition circuit (16).

The operation of the polygon coloring device having the above configuration is as follows.

By supplying the polygon filling command data to the general-purpose processor (8) through the I10 interface (9), division is performed based on the coordinates of the end points of the sides forming the polygon to obtain increment value data.

and (1) stores the coordinate data of the end point in the multiport register file (1), and stores the increment value data in the register file (2).

■ Next, select X in the multiport register file (1).
Coordinate data is supplied to the first pipeline register (3), and incremental value data of the register file (a) is supplied to the second pipeline register (4), if necessary (for example, when performing sectioning processing). ), the contents of the first pipeline register (3) are supplied to the line drawing section.

■ After that, both pipeline registers [3] (4
), the adder circuit (5) adds the coordinate data and the incremental value data.

(2) The addition result obtained in the addition circuit (S) is supplied to the third pipeline register (6).

(2) Finally, the contents of the third pipeline register (6) are stored in the multiport register file (1).

That is, by performing the above series of operations, linear interpolation can be performed by sequentially adding incremental value data to the coordinate data of the end points. However, since the above linear interpolation operation needs to be performed on the X coordinate, the X coordinate, the 2nd coordinate, and the X coordinate of each side, it is necessary to sequentially perform the above series of operations on each coordinate.

In this case, after the above processing for the X coordinate is completed, the earliest pipeline register (31[4]
Since there is no need to store data related to the X coordinate, store the data related to the X coordinate in the multiport register file (1) and register file (2).
The above stored data is stored in both pipeline registers [3] (4
).

Furthermore, when the above processing for the X coordinate is completed, the addition operation is performed by the addition circuit (S) based on the data regarding the X coordinate stored in both pipeline registers (3) and (4). When the addition circuit (5) is in a state where the addition operation is performed, the data regarding the two coordinates is output from the multiport register file (1) and the register file [21], and the stored data is transferred to both pipeline registers [21]. 3] (4).Then, the operation (2) above can be performed.

To summarize the above, as shown in FIGS. 2 and 3, the reading of initial value data or accumulated value data from the multiport register file (1) and register file (2), and the increment value data read operation,
Data output from the first pipeline register (3) to the straight line drawing unit, addition operation by the addition circuit (5), and storage operation of the addition result to the multiport register file (1) are performed once for each coordinate data. The operations are performed sequentially with different operating times. Therefore, overall,
The linear interpolation operation and the transmission of the interpolated data can be performed in approximately the same time as in the conventional example in which all data are obtained simultaneously and then the obtained data are sequentially supplied to the linear drawing section.

In addition, in the above embodiment, the general-purpose processor (8)
However, since the number of times of division is very small when linear interpolation is performed, there is no problem in that the processing time becomes particularly long.

FIG. 4 is a block diagram showing another embodiment, and the difference from the above embodiment is that a division circuit (17 ) (18), addition circuits (19) (20), mapping memory (21) that stores the addition results output from the addition circuits (19) (20).
), and a multiplication circuit (22) for performing shading processing and the like.

Therefore, in this example, X, y.

In addition to the z and I coordinate data, the U and V coordinate data are also sequentially interpolated by the linear interpolation unit to obtain linear interpolation data, and the sequential division circuit (11) (13) (15) (17) (
1g), the desired figure data on the texture plane expressed by U, V coordinates is input to X*Y+
It is possible to perform a so-called texture mapping process in which the image is projected onto a desired area on the display plane expressed by Z + engineering coordinates.

Note that the present invention is not limited to the above-mentioned embodiments; for example, a multiport memory may be used in place of the multiport register file (1), or a memory may be used in place of the register file (2). In this case, the memory is divided into three or more areas, and the second area stores data for the left line segment and data for the right line segment, and the other 1 area stores data for the left line segment and right line segment, respectively. Data for line segments to be drawn is stored in one area, and the remaining area is used as a control area that includes judgment functions for sectioning, etc. (For example, stores flags for x, y, z, u, v, etc.) zl-, z for sectioning.
By storing the flags 2-,...zn-), it is possible to perform time division control not only for the left and right line segments but also for the line segments to be drawn, as well as division operations for linear interpolation. can be performed by a dedicated division circuit, and can also be applied to so-called sectioning processing to display a cross-sectional view, and various other modifications can be made without changing the gist of the present invention. It is possible to make design changes.

<Effects of the Invention> As described above, in the present invention, since it is possible to use only one adder circuit for linear interpolation operation, the configuration can be simplified, and the first and second This method has the unique advantage of being able to easily expand the number of dimensions determined by the capacity of the storage means, and achieving a linear interpolation processing speed comparable to that of the conventional method.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the polygon filling device of the present invention; FIGS. 2 and 3 are operation explanatory diagrams schematically explaining linear interpolation operations; FIG. 4 is a block diagram showing another embodiment, FIG. 5 is a block diagram showing a conventional example, and FIG. 6 is an operation explanatory diagram schematically explaining conventional linear interpolation operation and data transmission operation. (1)...Multi-port register file, (2J・
...Register file, (3) (4) [6]...Pipeline register,
(5)...addition circuit, (sword...straight line drawing section

Claims (1)

[Claims] 1. The seat provided by the host computer The two edges selected based on the standard data are A linear interpolation part that performs linear interpolation, and Generates straight line drawing data based on the collected data. Polygonal coloring with a straight line drawing part In the crushing device, the linear interpolation section Stores a predetermined number of initial values or cumulative addition values a first storage means for storing the increment value; a second storage means for storing the first and second storage means; a first for temporarily retaining the contents of the storage means; a second register, the first register, and the second register; Addition means for adding the contents of register 2 and the addition result output from the addition means. It has a third register that holds it temporarily. and the contents of the first register above are It is characterized by being supplied to the straight line drawing section. Polygon coloring device.