JPS6337694A - Manufacture of circuit board - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method of manufacturing a circuit board, particularly a multi-T circuit board.

[Background technology] Multilayer circuit boards are being used as circuit boards to meet the demands for higher integration of semiconductor devices, higher functionality, smaller size, and lower cost F of electronic devices. Various studies have been conducted on devices using such inorganic plates as substrates because they have excellent properties in terms of thermal strength and mechanical strength. When manufacturing a multilayer circuit board using such an inorganic substrate, circuit formation has conventionally been carried out by the up-pace Y method or the electroless plating method.

The paste method is performed in the steps shown in Figure W&4 (showing the multilayer method). First, a circuit is applied by screen printing a conductive paste 10 of copper, silver, gold, etc. in a pattern shape on the surface of an inorganic substrate 1 such as an alumina substrate.
This is heat treated (Fig. 4(c)), and an insulating paste 11 such as a lath 7 lift is applied by screen printing to the surface of the inorganic substrate 1 to form an insulating base (11) and a conductive base (11).
0 (FIG. 4(d)), at this time, a predetermined portion of the circuit of the conductive paste 10 is exposed through the pie hole 12 provided in the insulating paste 11 (as shown in FIG. 4(d)). After screen printing 11, heat treatment is performed (FIG. 14(e)), and further, conductive paste 10 is screen printed in a pattern shape on the surface of the insulating paste 11 to form a second circuit (FIG. 4(f)). The conductive paste 10 provided as the second circuit is heat-treated (see FIG. 4), and the conductive paste 10 provided as the second circuit is connected to the conductive paste 10 provided as the first circuit through the pipe hole 12. A two-layer circuit can be formed in this state. Thereafter, a multilayer circuit board can be obtained by forming further multilayer circuits by the same process.

Further, the electroless plating method is performed in the steps shown in FIG. 5 (showing a single layer). First, the surface of the inorganic substrate 1 such as alumina is treated with molten alkali or hot phosphoric acid to roughen the surface (Figs. 5(a) and (b)), and then the inorganic substrate 1 is treated with P dCi.
Nucleation is performed to attach catalyst nuclei 13 such as Pd nuclei to the surface of the inorganic substrate 1 by immersing it in a T solution or the like (Fig. 5(e)).
), a copper conductor layer 14 is formed by electroless plating on the surface of the inorganic substrate 1 with this core attached (FIG. 5(d)). At this time, electroplating is also used in order to thicken the conductor layer 14. Next, a negative eratin fL/i) resist 15 is provided on the surface of the conductor layer 14, and a pattern mask 16 is set (FIG. 5(e)), and exposed and developed to form an etching resist. The unnecessary portions of the conductor layer 15 are removed (FIG. 5(f)), and the portions of the conductive layer 14 that are not covered with the etching resist 15 are removed by etching (FIG. 5(g)).
(FIG. 5(h)). In this way, a circuit can be formed using the conductor layer 14 by electroless plating to obtain a circuit board.

However, since the paste method forms circuits by screen printing conductive paste 10 and insulating paste 11, there is a limit to miniaturization of patterning, and it is difficult to form circuits with a line width of 100 μm or less. It is difficult to do so, and there is a problem in that it is necessary to respond to the increasing integration of semiconductor devices. In addition, the electroless plating method requires many processing steps such as surface roughening and catalyst nucleation, and requires control of the temperature, pH, ion concentration, etc. of the plating solution, making the equipment larger, and the cost of the plating solution is high. There is a problem with manufacturing costs, and there is also a 4-Pdc
Ionic impurities such as No. 12 may cause problems in properties such as insulation and moisture resistance.

[Object of the Invention] The present invention has been made in view of the above points, and it is possible to form a circuit with a fine pattern without using a paste method or an electroless plating method, and to reduce manufacturing costs. It is an object of the present invention to provide a method for manufacturing a circuit board, which can reduce the amount of heat generated by the circuit board, and also has excellent insulation and connection reliability between circuits in each layer when circuits are formed in multiple layers.

[Disclosure of the Invention] According to the method for manufacturing a circuit board according to the present invention, a conductor layer 2 is formed on the surface of an inorganic substrate 1 such as a ceramic plate or a metal plate by a physical plating method such as vapor deposition, sputtering, or ion plating. After the conductor layer 2 is etched to form the circuit 3, a photosensitive resin 4 is applied to the surface of the inorganic substrate 1 to cover the circuit 3. The present invention will be described in detail below.

The inorganic substrate 1 is formed of a ceramic or metal plate, and examples of the ceramic include alumina and steatite (M
gO-8io 2) etc. can be used, and when a metal plate such as an aluminum plate or a steel plate is used as the inorganic substrate 1, the surface needs to be insulated with a resin insulating layer or the like. First, a conductor layer 2 is formed on the surface of the inorganic substrate 1 (FIGS. 1(a) and (b)).The conductor layer 2 is formed by a physical plating method (P, V, D; physical
This is done by metalizing with vapor deposit. Therefore, processing steps such as surface roughening and catalyst nucleation, which are required when performing electroless plating, are not required. Here, the conductor layer 2 formed by physical plating has better adhesion to the inorganic substrate 1 such as ceramic than the conductor layer formed by conductor paste or electroless plating. In some cases, it is possible to further increase the adhesion force, and in the case of sputtering, it is preferable to perform high-speed sputtering to further increase the adhesion force. When forming a circuit by etching, it is possible to form a fine circuit by reducing thinning and thickening of the fine lines constituting the circuit. In addition, when forming the conductor layer 2 thickly, electroplating can be used in combination.

After forming the conductor layer 2 on the surface of the inorganic substrate 1 as described above, an etching resist 18 is formed on the surface of the conductor layer 2, and a pattern mask 19 is further set on the surface of the etching resist 18 (see FIG. 1). (e)) As the etching resist 18, any material used as an etching resist, such as a liquid resist or a dry film, can be used. In addition, the pattern mask 19 has a light-transmitting portion formed with a circuit pattern, and by exposure and development, the etching resist 18 is removed in the portion covered by the pattern mask 19 and not exposed (see FIG. 1(c)). By performing the etching process, the exposed portion of the conductor layer 2 that is not covered with the etching resist 18 is removed (FIG. 1(e)), and the surface of the inorganic substrate 1 is removed by removing one more part of the etching resist 18. The result is to obtain a circuit board provided with a circuit 3 formed of the conductor layer 2 (FIG. 1(f)). In this way, the circuit 3 can be formed by etching the conductor layer 2,
Circuit 3 compared to screen printing conductive paste
The pattern can be miniaturized and formed.

The line width can be formed in about 20 layers, and the line spacing can be further reduced so that the ratio of the line spacing to the line width of the circuit 3 is about 1.2 to 1.5. It becomes possible.

Furthermore, when manufacturing a circuit board as a multilayer circuit board, photosensitive resin 4 is applied from above the circuit 3 to the surface of the inorganic substrate 1.
At the same time, a pattern mask 20 is set on the surface of the photosensitive resin 4 (see FIG. 1(g) and FIG. 2(a)).
)) The photosensitive resin 4 is used to form an insulating layer between the eyebrows, and the circuit 3 is completely covered with the photosensitive resin 4.

As the photosensitive resin 4, photosensitive polyimide, photosensitive epoxy resin, etc. can be used. Then, by exposing and developing, the photosensitive resin 4 is removed in the portion covered by the pattern mask 20 and not exposed, and the removed portion is used as a pie hole 5 to expose a predetermined portion of the circuit 3 (FIG. 1(h) and Figure 2(b)), then photosensitive tree 1
A second conductor layer 6 is formed on the surface of 1'ff4 by physical plating (FIG. 1(i)).

At this time, a part of the conductor layer 6 has entered the pie hole S, and the surface of the conductor layer 6, which is integrally connected to the circuit 3 in the pie hole 5, is etched with liquid resist, dry film, etc. A pattern mask 22 is set on the surface of the etching resist 21 (FIG. 1 (j)), and then exposed and developed to form an etching mask in the areas covered by the pattern mask 22 and not exposed. 21 (FIG. 1(k))), and by performing an etching process, the exposed portions of the conductor layer 6 not covered with the etching resist 21 are removed (FIG. 1(i)), and the etching resist 21 is removed. By removing 21, a second circuit 7 formed with a second conductive layer 6 on the surface of the photosensitive resin 4 is formed.
can be provided.

The second circuit 7 is insulated from the first circuit 3 by using the photosensitive resin 4 as an insulating layer between the eyebrows, and the first circuit 3 and the second circuit 7 are connected by the pie hole 5. In this way, a multilayer circuit board with a two-layer circuit structure can be obtained (see Fig. 1(w) and Fig. 2(e)).
)) Here, the photosensitive resin 4 can be subjected to precise optical processing using photolithography technology, and the reliability of the glabella connection between the circuits 3 and 7 can be ensured by the precisely formed pie holes 5. It is. And Figure 1 (
By repeating the steps from g) to Figure 1 (theory), it is possible to obtain a multilayer circuit board with an even more multilayer circuit configuration. For example, it is possible to manufacture a multilayer circuit board with a structure as shown in Figure 3. can. In Figure #43, a is a circuit that serves as a power supply layer or a ground layer, and b to f are signal circuits in the first to 15th layers.

Next, the present invention will be further explained by examples.

Alumina substrate with 96% purity (manufactured by Kyocera, size 75+a)
A conductor layer 2 is formed on the surface of the inorganic substrate 1 by sputtering copper.
was formed (Fig. 1(a)(b)).Here, the copper sputtering was performed using Nichiden Anelpa S! D.

C magnetron type high speed sputtering equipment (spF-2
108) at a vacuum level of 6×10-'To
rrSAr pressure 3×10-T orr, output 600V
, 0.8 A, inorganic substrate temperature of 200° C., and time of 20 minutes to form a conductive layer 2 with a copper thickness of 8 μm. Next, as an etching resist 18, a bottom-type dry film manufactured by Beckist Co., Ltd. (Ozate 9R225) was used. ) to expose and develop the etching lens 18 #JJ1 Figure (e) (
d)), and the conductor layer 2 was further etched to form a circuit 3 (FIG. 1(e)).Here, the exposure was carried out at 200° C. using a 7 Otregis F light source device (ORCHMN-6N) as an exposure machine. The development was carried out under the conditions described in Paper J/C Paper 2, and the developing machine was an etching machine manufactured by Yoshitani Sho Co., Ltd.
CE83) and 1% NaOH as a developer under the conditions of spray coating at 20° C. for 60 seconds. Furthermore, etching was carried out using an etching machine (YCE83) manufactured by Yoshitani Sho Co., Ltd. and a copper chloride aqueous solution as an etching solution under the conditions of spray coating at 20° C. for 5 minutes. After performing etching in this manner, the etching resist 18 on the circuit 3 is etched by 77 tons.
was removed (FIG. 1(f)), and the first layer circuit was formed as described above.

Next, using photosensitive polyimide (DN-6) manufactured by Asahi Kasei Kogyo Co., Ltd. as the photosensitive resin 4, apply the W & machine board 1 from above the circuit 3.
The surface of the photosensitive resin 4 was coated by spin coating at 3000 rpm for 30 seconds to a film thickness of 20 μm, and dried in a clean oven at 70°C for 2 hours (Fig. 1 (g)). After exposure, it was baked, developed, and then heated at 140°C for 1 hour and 400°C in a VN2 atmosphere for 1 hour.
The photosensitive resin 4 was cured and formed as an interlayer insulating layer by heating for each time, and a part of the circuit 3 was exposed through the pie hole 5 formed in the photosensitive resin 4 (FIG. 1 (h)). Here, exposure was performed using a 250W ultra-high pressure mercury lamp under the conditions of 200*J/cs+2.25 seconds, and baking was performed in a clean oven at 70°C for 10
It was conducted under the following conditions. Furthermore, development is carried out using a special developer <A-
135) for 100 seconds, and a dedicated rinse (C-200) for 60 seconds.

After this, copper sputtering is performed in the same manner as above,
The circuit is formed by repeating the steps of exposure, development, and etching using a dry film.
1)) A circuit board having a two-layer circuit structure having circuits 3.7 as shown in FIG. 1 (theory) was obtained.

and 1. Using an alumina substrate similar to that in Example 1 as the inorganic substrate 1, a copper layer with a thickness of 0.5 μm was formed on the surface of the inorganic substrate 1 by sputtering in the same manner as in Example 1. The surface of the copper layer was electroplated to form a conductor layer 2 having a final thickness of 8 μm. Here, the electroplating was performed using copper sulfate (70 to 120 g/j) as a metal solution, at a temperature of 25°C, a current density of 2 A/am, and a time of 15
It was conducted under the following conditions. A circuit board having a two-layer circuit configuration was obtained in the same manner as in Example 1, except that the conductor layer 2 was formed using a combination of sputtering and electroplating.

! EJLLL A photosensitive epoxy resin was used as the photosensitive resin 4, and the curing conditions were set to 100°C for 1 hour and 150°C for 1 hour.
A circuit board having a two-layer circuit configuration was obtained in the same manner as in Example 1.

11 As the inorganic substrate 1, a 75 x 75 - 1 x 1 - ring aluminum plate with an epoxy resin insulating layer of 50μ thick on the surface was used, and the rest was carried out in the same manner as in Example 1 to form a two-layer insulating layer. A circuit board with a circuit configuration was obtained.

An alumina substrate similar to that in Example 1 was used as the inorganic substrate 1, and a conductor layer 2 was formed by depositing aluminum to a thickness of 8 μm using a vacuum evaporation method.

Here, the vacuum evaporation uses a resistance heating type evaporation device, and the degree of vacuum is 2.
X 10-'Torr, temperature of inorganic substrate 1 200°
The coating was carried out under the condition that the temperature of the C1 boat was 1200°C, the warming-up time was set to 5 minutes, and the main coating time was set to 10 minutes. A circuit board having a two-layer circuit structure was obtained in the same manner as in Example 1, except that the etching was carried out by spray coating for 8 minutes at 20° C. using an aqueous phosphoric acid solution as the etching solution.

Inu J "Salmon J- As the inorganic substrate 1, a steatite substrate with a lower dielectric constant than alumina (manufactured by Kyocera Corporation, 50 theory X50- theory X0.63
A circuit board having a two-layer circuit configuration was obtained in the same manner as in Example 1.

In each of the above embodiments, the circuit has a line width of 20 to 1
It was possible to form a fine pattern with a line spacing of 25 to 150 μm.

[Effects of the Invention] As described above, in the present invention, a conductor layer can be formed on the surface of an inorganic substrate such as a ceramic or metal plate by a physical plating method such as vapor deposition, sputtering, or ion plating. Therefore, there are no problems such as the number of man-hours required when forming a conductor layer using electroless plating, and the circuit can be formed with high accuracy by etching the conductor layer, and screen printing is not possible with the paste method. It is possible to form a circuit more finely than when forming a circuit. In addition, after etching this conductor layer to form a circuit, a photosensitive resin was applied to the surface of the *m board to cover the circuit, so when forming a multilayer circuit, the photosensitive resin As an insulating layer between the eyebrows, it is possible to ensure the insulation of the circuit in each layer, and
Via holes can be precisely formed by exposing and developing a photosensitive resin using photolithography technology, and the via holes can connect circuits in each layer with high reliability.

[Brief explanation of the drawing]

FIGS. 1(a) to (-) are horizontal sectional views showing each process part of an embodiment of the present invention, and FIGS. 2(a), (b), and (c) are horizontal sectional views showing some process parts of the same 3 is a horizontal sectional view of the multilayer circuit board obtained by the same method as above, FIG. 4 (g) to (g), and FIG. It is a sectional view showing each process part. 1 is an inorganic substrate, 2 is a conductor layer, 3 is a circuit, 4 is a photosensitive resin, 5 is a pie hole, 6 is a conductor layer, and 7 is a circuit.

Claims (1)

[Claims] (1) A conductor layer is formed on the surface of an inorganic substrate such as a ceramic plate or a metal plate using a physical plating method such as vapor deposition, sputtering, or ion plating, and then this conductor layer is etched to form a circuit. A method of manufacturing a circuit board, characterized in that a photosensitive resin is later applied to the surface of the inorganic board to cover the circuit.