JPS6336573B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital filter device that has a variable cutoff frequency and filters an input signal according to a predetermined transfer function.

Conventionally, it has been considered to use digital filters to configure filters such as low-pass filters, high-pass filters, and band-pass filters.

For example, as a method of configuring a Butterworth-type low-pass filter as shown in FIG. 1, there is a bilinear Z-transform. For example, if we focus on a second-order analog Butterworth filter, the poles of this second-order Butterworth type filter have a conjugate root as shown in Figure 2, as is well known, and the analog transfer function H ₁ of the reference low-pass filter is (S) can be written as H ₁ (S)=1/(S ² +√2S+1)...Equation (1). Therefore, the transfer function of a low-pass filter with cutoff frequency c is expressed as S/S/
By converting to W _C , H(S)=W _C ² /(S ² +√2SW _C +W _C ² )
...It is determined as in equation (2). However, W _c =2πc. This transfer function is subjected to bilinear transformation. That is, S=2/T _S (1-Z ^-1 /1+Z ^-1 ...When the transfer function H(z) is determined by equation (3), H(z)=K(1+Z ^-1 ) ² /1+b ₁ Z ^-1 +b ₂ Z ^-2 ……
Equation (4) is obtained.

However, each coefficient is W _C = 2/T _S tanW _D T _S /2 ...Equation (5), A=tanW _D・T _S /2 ...Equation (6) B=1+√2A+A ² ... When formula (7) is used, b ₁ = 2 (A ² -1)/B ...Formula (8) b ₂ = (1-√2A+A ² )/B ...Formula (9) K=A ² /B ...Equation (10) is obtained. Note that T _S is the sampling time, taking into account frequency distortion during conversion.

Fig. 3 is a block diagram of a digital filter device expressed by equation (4) when the cutoff frequency c is made variable.The adder 1 is supplied with an input signal, and the output of this adder 1 is supplied. It has an adder 2 and multipliers 4 and 5 to which the output of the adder 1 is applied via a unit time T _S delay element 3. This multiplier 4 is further supplied with data b ₁ selected according to the cutoff frequency data c applied to the ROM 6 , and the input signal is multiplied by b ₁ and applied to the adder 1 . Note that this input signal instructs the adder 1 to perform subtraction. Furthermore, the multiplier 5 simply has the function of doubling the input signal, and its output is given to the adder 2. Furthermore, the output of the delay element 3 passes through the unit time T _S delay element 7,
Further, the signal is applied to the adder 1 via the multiplier 8, and the output of the delay element 7 is directly applied to the adder 2. The multiplier 8 receives data b ₂ selected by the cutoff frequency c given to the ROM 6.
is further supplied, the input signal is multiplied by b ₂ and sent to adder 1
given to. Note that this input signal instructs the adder 1 to perform subtraction. The output of the adder 1, the output of the multiplier 5 and the output of the delay element 7 are supplied to an adder 2 which adds them together.
The output of is applied to a multiplier 9 supplied with the output K of the ROM 6 selected by the cutoff frequency c, and multiplied by K to become an output signal.

However, in the above-mentioned digital filter device, the capacity of the ROM 6 addressed by the cutoff frequency c must be increased as the type of cutoff frequency c selected becomes larger. It had to be equipped with a large capacity ROM.

This invention was made in view of the above circumstances,
A digital filter device with a variable cut-off frequency is capable of reducing the memory capacity for storing coefficients by approximating at least one of the coefficients of a transfer function to a straight line, a broken line, or a curve. The purpose is to provide.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

That is, in the Butterworth type low-pass filter as described above, when each coefficient data K, b ₁ , b ₂ is numerically calculated, the result is as shown in FIG. 4. In Figure 4,
The sampling frequency s (=1/T _S ) is 32KHz, and A = tan (3.14159×c/32000)...A is determined by formula (11), and from this data A, formula (7) is used to calculate formula The coefficient K is determined by (10), the coefficient b ₁ is determined by formula (8), and the coefficient b 1 is determined by formula (9).
Find the coefficient b ₂ by Then, the cutoff frequency c is changed every 500Hz.

It is clear that if the data obtained as shown in FIG. 4 is drawn in a graph, it will look like FIG. 5.
Therefore, when focusing on the coefficient b ₁ in FIG. 5, when this change is approximated by a straight line, b ₁ ≈-2+8/32+c =-2+c×2 ^{-2 .} . . Equation (12) is obtained.

Figure 6 shows a configuration diagram of a digital filter when calculating the coefficient b ₁ based on equation (12). For the sake of simplifying the explanation, the same parts as in Figure 3 are given the same reference numerals. The explanation will be omitted. Code 1 in Figure 6
0 is a logic circuit as shown in FIG. That is, the cutoff frequency c is 14-bit data, of which 4 bits are above the decimal point, 10 bits are below the decimal point, and the unit is KHz. Therefore, the maximum cut-off frequency is 16 KHz, and the minimum range of cut-off frequency c is 2 ^-10 KHz.
=0.9765625Hz. Furthermore, if a finer range is required, it goes without saying that the number of bits below the decimal point may be increased.

Therefore, to calculate the above equation (12), it is sufficient to shift the 14-bit data to the right by 2 bits and add "-2". In the case of two's complement representation, as shown in FIG.
Of the data input to the latch 11, the most significant bit MSB may be inverted by the inverter 12. Note that the signal φ _R is the read clock for the latch 11. Therefore, in the output of the latch 11, the most significant bit MSB becomes the sign bit, and the bit above the decimal point is
bit, 12 bits after the decimal point. Therefore, the coefficient b ₁ given to the multiplier 4 is simply the coefficient b 1 given to the multiplier 4.
Supply data of cutoff frequency c for 0,
The resulting output should be data b ₁ ,
Further, the ROM 6' only needs to store data of the coefficients b ₂ and K.

FIGS. 8 and 9 show the cutoff frequency errors obtained by linear approximation based on the above equation (12) (FIG. 9 is a graph up to a frequency of 8 KHz). ). That is, when the cutoff frequency error is Δ, it can be written as in the following equation using the coefficient b ₁ obtained from equation (8) (using A in equation (11)).

Δ=c'-c (b ₁ + 2) x 32000/8-c...Equation (13) In this case, if the frequency error is within 10% and within the allowable error range, use the linear approximation formula to Equation (12). It is sufficient to use as is, and to further narrow the error range,
A distortion is applied to the cutoff frequency c in advance,
Equation (12) may be used.

In this way, in the above embodiment, the sampling rate is set to 2 ^-n (where n is a natural number), that is, the sampling frequency s is set to 32 KHz = ²⁵ KHz, and therefore the sampling period T _S =2 ^-5 msec. It has become possible to greatly simplify the configuration of the logic circuit 10.

In the above embodiment, the case where a Butterworth-type low-pass filter is constructed has been described, but it goes without saying that the present invention can be applied to other types of low-pass filters or filters having other characteristics.

In addition, in the above embodiment, only the coefficient b ₁ is calculated by linear approximation as shown by the dotted line in FIG.
Although we tried to reduce the capacity of the ROM 6', it is also possible to calculate it by other approximate calculations. That is,
As is clear from FIG. 5, the coefficient b ₁ can be regarded as a part of a cubic curve, the coefficient b ₂ can be regarded as a part of a quadratic curve, and the coefficient K can be regarded as a part of a cubic curve. Therefore, the coefficient b ₁
is approximated by a cubic curve as shown in Fig. 10, the coefficient b ₂ is approximated by a quadratic curve as shown in Fig. 10, and the coefficient K is approximated by a cubic curve as shown in Fig. 10. It can also be approximated. In addition to this kind of curve approximation, the capacity of the coefficient storage memory can be similarly reduced by considering a curve as a combination of a plurality of straight lines and calculating coefficients by broken line approximation, as shown in FIG. 10. becomes possible.

As described in detail above, the present invention provides a digital filter device that filters an input signal according to a predetermined transfer function with a variable cut-off frequency.
Since the coefficients are calculated by polygonal line or curve approximation, the capacity of the memory for storing coefficients can be significantly reduced, which is very effective in integrating digital filter devices.

[Brief explanation of the drawing]

Figure 1 is a diagram showing the amplitude characteristics of a Butterworth type low-pass filter, Figure 2 is a diagram showing the poles of a second-order Busworth type filter, Figure 3 is a diagram showing the configuration of a conventional Butterworth type filter, and Figure 4 is a diagram showing the amplitude characteristics of a Butterworth type low-pass filter. is a diagram showing each coefficient in FIG. 3, FIG. 5 is a graph showing changes in each coefficient in FIG. 4, FIG. 6 is a block diagram showing a Butterworth filter according to an embodiment of the present invention, and FIG. Figure 6 is a detailed view of the main parts, Figure 8 is a diagram showing the frequency error when coefficient b ₁ is linearly approximated, Figure 9 is a graph showing changes in the data in Figure 8, Figure 10 is each coefficient It is a graph explaining approximate calculation of. 1, 2... Adder, 3, 7... Delay element, 4, 5,
8, 9... Multiplier, 6'... ROM, 10... Logic circuit, 11... Latch, 12... Inverter.

Claims (1)

[Scope of Claims] 1. In a digital filter device that filters an input signal according to a predetermined transfer function with a variable cutoff frequency, at least one of the plurality of coefficients of the transfer function is provided.
A digital filter device comprising an arithmetic logic means for calculating the coefficients by linear, broken line, or curve approximation using a cutoff frequency as a parameter, and an output of the arithmetic logic means is used as a coefficient of the transfer function.