JPS63316956A - Distributed fault recovery controller for ring network communication equipment - Google Patents

Abstract

PURPOSE:To automatically and rapidly recover a transmission path individually by each communication operating means, by attaching its own discrimination information on a frame to be transmitted in each communication operating means, and deciding whether or not the re-reception of the information and the detection of a synchronizing signal from an adjacent communication operating means are executed. CONSTITUTION:When plural communication operating means 1(terminal or station etc.) perform data communication in a ring network connected in a ring shape by duplicated ring transmission paths 2 and 3, each communication operating means decides whether or not the ring transmission path whether or not a fault is generated is disconnected by attaching discrimination information representing the passage of the frame on a prescribed area in a frame header to be transmitted in each communication operating means, and detecting whether or not its own discrimination information is attached on the frame to be received, and furthermore, by deciding whether or not the synchronizing signal inputted from the adjacent communication operating means is detected in addition to a decided result, the duplicated ring transmission paths are switched and connected in each communication operating means, and the transmission paths can be always connected in a loop shape by using two transmission paths even when the fault is generated in the transmission path on the middle way.

Description

[Detailed Description of the Invention] [Summary] When a plurality of communication operation means (terminals, stations, etc.) perform data communication through a ring network connected in a ring shape by a double circular transmission path, each communication operation By adding identification information indicating that the frame has passed to a predetermined area of the frame header to be transmitted in the means, and by having means for detecting whether each received frame has its own identification information added. , Whether or not the ring transmission line is broken in the middle (whether or not a failure has occurred)
By making it possible for each communication operation means to determine the following, and further determining whether or not a synchronization signal input from an adjacent communication operation means can be detected together with this determination result, a double ring transmission path can be realized. Automatic and quick recovery from faults is achieved by switching connections at each communication operation means and having means that can always connect the transmission lines in a loop using two transmission lines even if a transmission line failure occurs midway. 11 (failure recovery control device) in a ring network communication device that can be performed.

[Industrial application field]

The present invention relates to a distributed fault recovery control device in a ring network communication device, and in particular, determines whether a transmission line fault has occurred in each communication operation means (terminal, station, etc.) and automatically and quickly performs fault recovery. This paper relates to a distributed failure recovery control method.

[Traditional technique]

By interconnecting multiple communication operation devices (terminals, stations, or nodes accommodating terminals, etc., hereinafter referred to as nodes) via a ring-shaped transmission path (ring network), it is possible to LANs (Local Area Networks), which allow data exchange between computers, are widely used.

In a ring network such as the one described above, when a transmission path failure or a node failure occurs, the transmission path is reconfigured by operating a failure recovery function. FIG. 11 shows the overall configuration of the ring network communication device, in which a plurality of communication nodes N1-N3 and a monitoring node SV are
They are connected by a duplicated circular transmission line NET #0 and #1. Furthermore, frames transferred within this transmission path NET conventionally have a configuration as shown in FIG. 12, and are shared by all nodes. In FIG. 12, one frame includes a frame header part FH and a plurality of slots 5LO.
Consists of T. The transmission path is composed of a plurality of frames, and communication nodes N1 to N3 recognize slots by detecting frame headers and transmit and receive data. The monitoring node SV also has transmission path synchronization control, frame management, and network monitoring functions. When monitoring failures in such a system, the monitoring node Sv (Figure 11) checks the frame header FH (Figure 12) of the frame.
The status of the entire network is centrally managed by regularly collecting the transmission path and status of each node from communication nodes N1 to N3 using the communication area between nodes N1 to N3.

That is, each communication node N1 to N3 sends information regarding a transmission path failure to the monitoring node, so that the monitoring node S centrally manages the failure information of the network, and when a failure occurs, the monitoring node SV updates the status. The fault recovery is performed by controlling the switches (not specifically shown) of each communication node N1-N3 and reconnecting the transmission line.

[Problem that the invention seeks to solve]

However, according to the above conventional example, since the monitoring node centrally manages failure information, it is necessary to send and receive several types of commands and responses using the inter-node communication area, and an inter-node communication procedure based on handshake is required. Furthermore, inter-node communication requires one-to-one communication between the monitoring node and one communication node, and there is a problem that the failure recovery time increases as the number of nodes increases. Was. Additionally, there is a problem in that the load on the monitoring node becomes heavy due to centralized management.

In order to solve the above-mentioned problems, the present invention adds its own identification information to the frame transmitted by each communication operation means (communication node) and detects whether or not the frame can be re-received.
In addition, by determining whether or not a synchronization signal from an adjacent communication operation means can be detected, each communication operation means can automatically determine the status of a transmission path failure, and each communication operation means can adjust the transmission path accordingly. It is an object of the present invention to provide a distributed failure recovery control device in a ring network communication device that allows automatic and rapid reconfiguration.

[Means for solving problems]

The basic configuration of the present invention is shown in the block diagram of FIG. That is, in the communication operation means 1 connected to the first and second double ring transmission paths 2.3 and having the data transmitting/receiving means 11, the frame output to each transmission path is transmitted to the output side of each transmission path 2.3. Identification information adding means 4.5 for adding identification information indicating that each communication operation means is operating in a predetermined area
identification information detection means 6.7 for detecting individual identification information from frames input from each ring transmission path on each input side;
, and synchronization signal detection means 8.9 for detecting synchronization signals inputted from adjacent communication operation means. Furthermore, the identification information detection result 12.1 from the identification information detection means 6.7
3 and the synchronization signal detection result 14.15 from the synchronization 4g detection means 8.9.
．． The transmission path switching means 10 switches and connects the output of each individual of the data transmitting/receiving means 11 and the input/output of the data transmitting/receiving means 11.

In the above, the identification information adding means 4.5 can be realized, for example, by a logic circuit that adds a predetermined flag to each output using a byte area corresponding to the communication operation means 1 on the frame to be output. In addition, identification information detection means 6.7
12. counts the time from when the identification information is added to the output frame by the means until the frame is received again and its own identification information is detected, and the result 12. This can be realized by a logic circuit that detects 13. The synchronization signal detection means 8.9 can be realized by a logic circuit that detects the synchronization clock output on the transmission path. Furthermore, transmission path switching means 1
0 arbitrarily controls each input/output of the first and second circular transmission paths 2.3 and the input/output of the data transmitting/receiving means 11 using the identification information detection result 12.13 and the synchronization signal detection result 14.15 as control inputs. This can be realized by a matrix switch or the like that can be switched and connected.

[For production]

In the above means, for each of the first and second annular transmission lines,
The identification information in the frame output from the output side identification information adding means 4 or 5 is detected by the input side identification information detection means 6 or 7.
If it cannot be detected, it can be determined that a transmission line failure has occurred somewhere on the circular transmission line. Moreover, if the synchronization signal cannot be detected by the synchronization signal detection means 8 or 9 on the input side,
Immediately after that, it can be determined that a transmission line failure has occurred. Based on these determination results, even if a transmission path failure occurs during the process,
By controlling the transmission line switching means 10 using the first and second annular transmission lines 2.3 so that the transmission line is always in a loop shape, automatic and quick failure recovery can be achieved for each communication operation means. will be held.

For example, if identification information can be detected from at least one of the first or second annular transmission paths 2.3, that transmission path is connected to the data transmitting/receiving means 11 for communication. In addition, if a synchronization signal cannot be detected from one transmission path and only identification information cannot be detected from the other transmission path, the input of the latter transmission path is input to the data transmitting/receiving means 11, and the output of the same means is transmitted to the data transmitting/receiving means 11. Connect to the output of the transmission line and loop back the transmission line. By establishing such conditions,
Identification information ★ output result 12.13 and synchronization signal detection result 1
From 4.15 onwards, the transmission path can always be reconfigured optimally.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail.

First, the overall configuration diagram of the ring network communication device according to the present invention has the same configuration as that of FIG. 11, which has already been explained. Next, FIG. 2 shows communication nodes N1 to N3 in FIG.
, and a configuration diagram of a monitoring node SV. Note that in this embodiment, N1 to N3 all have the same configuration. In the figure, packets on transmission paths NET #0 and #l are input from receivers 16.17 to synchronization extraction circuits 20.21, where synchronization signals are detected. Thereafter, each frame is input to its own node flag detection circuit 22, 23, where it is detected whether or not a flag related to its own node is attached to the input frame. Each frame passing through is inputted to the matrix switch 3o, and selectively inputted to the shift registers 24 and 25, respectively, or inputted to the reception line 46 of the slot transmission/reception circuit 38. On the other hand, the packets output from the transmission cotton 47 are selectively input to the shift register 24 or 25. Each frame input to the shift register 24.25 is sent to its own node frame detection circuit 26.2.
7, the frame for its own node is detected, and each shift register 24.25 is detected in the selector 28.29.
A self-node flag is added to the frame header output from the self-node flag write signal lines 36 and 37. Each frame output from the selectors 28 and 29 is output from each driver 18 and 19 to each transmission path.

Next, in the slot transmitting/receiving circuit 38, while the frame input from the receiving line 46 passes through the delay buffer register 44, the selector 45 writes the data output from the slot assembly circuit 43 onto the slot as necessary ( ), selector 4
5 to the transmission line 47. On the other hand, when the self-destination slot detection circuit 39 detects a slot addressed to the own node, the data is extracted by the slot decomposition circuit 40 and transferred to each terminal (not particularly shown) via the reception buffer 41. On the other hand, the data sent from each terminal is
The signal is input to the transmission buffer 42, slotted by the slot assembly circuit 43, and output from the selector circuit 45 to the transmission line 47.

Subsequently, the synchronous clock generation circuit 48 outputs a synchronous clock to the transmission line output connected via the matrix switch 30 as necessary.

Next, FIG. 3 is a configuration diagram of a frame in the present invention. One frame consists of a frame header part FH and a plurality of slots 5LOT, and the structure of the frame header part FH is different. That is, FH is the synchronization pattern F1 frame number FN[L and the node flag N corresponding to each node.
It consists of an area that stores F. The synchronization button F is a bit string for synchronizing transmission and reception, and the frame number Fl'h is a number given to each frame of multiple frames transferred within the transmission path NET (see Figure 11). .

Next, the operation of the above embodiment will be explained. First, in the frame header section FH of each frame in FIG. 3, there is a storage area for a frame number FNa and a node flag NF. The node flag NF consists of a flag FB indicating that the output frame has passed through its own node and an output transmission line system instruction number FO (#0 or #l). The node flag may be stored, or may be divided into multiple frames and stored. In the latter case,
For example, for the frame with frame number FNa=1, the node flag NFI (FBI and FOl) of node N1 is set.
and node flag NF2 of N2 (FB2 and F02)
, Fllh=2, the node flag NF3 (FB3 and F03) of the node N3 is stored as follows.

In the present invention, each time such a packet passes through each node, the own node frame detection circuit 26.27 determines the frame number Fl1m, and when a frame containing the own node flag is input, the own node frame detection circuit 26.27 determines the frame number Fl1m. The own node flag is written into the node flag storage area via the own node flag write signal lines 36 and 37. If the transmission path NET shown in FIG. 11 is normal, the frame including the self-node flag outputted to each transmission path in this way goes around the network once and returns to the own node. Then, the own node flag detection circuits 22 and 23 detect the node flag regarding the own node.

At this time, the circuits 22 and 23 have internal timers (not particularly shown), and if the self-node flag can be detected within the specified time, it is determined that no transmission path failure has occurred. If a transmission path failure occurs on the way, the same circuit 22.2
3, the self-node flag cannot be detected, indicating that a failure has occurred somewhere on the transmission path.

Next, the synchronization extraction circuits 20 and 21 are circuits that extract synchronization clocks input from the transmission line NET, and if a synchronization clock cannot be extracted, it is determined that a transmission line failure has occurred immediately before. This is because the synchronous clock is output from the synchronous clock generation circuit 48 of the adjacent node.

Through the above operation, the own node flag detection circuit 22.23 and the synchronization extraction circuit 20.21 determine whether or not the own node flag and synchronization signal are detected from each transmission path #0 and #l on the control signal lines 32 to 35. The signal is transmitted to the switch control circuit 31 via. The operation of the circuit 21 and matrix switch 30 will be explained below.

First, FIG. 4 is a diagram showing the operation mode of the matrix switch 30. First, when operating the #0 system in FIG.
7 connections and short-circuit the input and output of #1 system. The same figure (b
When operating the #l system, conversely, short-circuit the input and output of the #O system, and connect the input and output of the #l system to the receiving line 46 and the transmitting vA4.
Connect to 7. Next, in the same figure (when selecting the loopback #0 system of CL).

Connect the #0 system input to the receiving line 46, and connect the transmitting line 47 to the #1
Connect to the output of the system and loop back the transmission line from system #0 to system #l. Conversely, in the same figure (when selecting the loopback #l system of dl, the input of the #l system is connected to the receiving line 46, the transmitting line 47 is connected to the output of the #0 system, and the transmission line is connected from the #l system to the #O system. Return to the system.

Next, the relationship between the detection results of the self-node flag and synchronization signal in the #0 system and the #l system, the operation mode of the matrix switch, and the operation of the entire network will be explained using FIGS. 5 to 10. All of the following operations are executed in the switch control circuit 31 shown in FIG. 2. First, if the own node flag is detected in both the #O system and the #1 system, since no transmission path failure has occurred in either system, all nodes are set to N1 by default according to the conditions shown in Figure 5a.
- Operate #0 system on N3 and SV (#1 system may also be used).

This is the state shown in FIG.

Note that the inside of the slot transmitting/receiving circuit 38 is shown schematically.゛Next, as shown in Figure 8, if a transmission path failure occurs in the PI between nodes N1 and N2 of the #O system, nodes N2 and N2
3. In the SV, the own node flag is not detected in the #O system, and the #
Since the own node flag is detected in the 1st system, the #1 system is operated under the conditions shown in FIG. 5d. Also, #0 at node N1
Since the bit clock (synchronized clock, hereinafter the same) cannot be extracted in the system and the own node flag is detected in the #1 system, the #1 system is operated under the conditions shown in FIG. 5g. In the end, all the nodes N1 to N3 and SV in FIG. 8 are operated in the #l system.

Next, as shown in FIG. 9, node N of #0 system and #l system
If a transmission path failure occurs in P2 and P3 between I and N2, the own node flag is not detected in both #0 and #1 systems in node N3 and SV, and based on the conditions in Figure 5g, #O system is not operated. becomes. Next, in the node N1, since the bit clock cannot be extracted in the #0 system and the own node flag cannot be extracted in the #1 system, the loop hack #l system is selected based on the conditions shown in the fifth diagram. Conversely, in node N2, the #l system cannot extract the bit clock and the #0 system cannot extract its own node flag, so the loopback #O system is selected based on the conditions shown in FIG. 5f. As a result, the ninth cap body avoids the faulty portions of P2 and P3 and connects to node Nl.

A loop that turns back at N2 is reconfigured.

Next, as shown in FIG. 10 (al), the #0 system node N1
If a transmission path failure occurs at P5 between N2 and 24 between node N3 and SV of the #l system, first
In this case, the bit clock of the #O system cannot be extracted and the own node address cannot be detected in the #1 system, so the loop is selected based on the conditions in the fifth diagram. At this time, at the same time, the node N2 is notified of the transmission path failure by not outputting the bit clock to the #1 system headed for the node N2 from the node Nl (condition k in FIG. 6). On the other hand, since the node S2 cannot extract the bit clock of the #l system and cannot detect its own node address in the #0 system, the loopback #0 system is selected based on the conditions shown in FIG. 5f.

Here again, the bit clock is not outputted to the #0 system going from node S to node N3, and node N3 is notified of the transmission path failure (condition m in FIG. 6).

As a result of the above, a loop is formed between nodes Nl and SV in the first step, but as a result, node Nl is unable to extract the bit clock in the #0 system and can detect its own node flag in the #l system. .

At this time, a #0 system heavy loop is output from node N1 to SV, so that the loop operates normally (condition j in FIG. 6). Similarly, in the node SV, the bit clock cannot be extracted in the #1 system, and the own node flag can be detected in the #0 system. At this time as well, the #1 series heavy bit crotter going from node SV to N1 is output (condition 1 in FIG. 6). Next, in the second step, at node N2, the output of the #1 system bit clock is stopped as described above, so it cannot be extracted (transmission path failure occurs at P6 in Figure 10 (b)). ), the #0 system's own node address cannot be detected. As a result, the loopback #0 system is selected based on the condition shown in FIG. 5f. On the other hand, at node N3, the output of the #0 system bit clock is stopped as described above, so it cannot be extracted (Fig. 10 (it is determined that a transmission path failure has occurred at P7 of bl), Unable to detect own node address of l system.

As a result, the loop bank #l system is selected based on the conditions shown in the fifth diagram. As a result, a loop is formed between nodes N2 and N3 and between nodes N1 and SV as shown in FIG. 10(b), and failure recovery is completed.

In the final case, if the bit clocks for both the #0 and #1 systems cannot be extracted, it is determined that the entire system is down, and the #0 system is monitored according to the condition i in Figure 5, waiting for recovery. .

Note that the nodes N1 and N2 in FIG. 9, or the nodes N1, SV, and N2, N in FIG.
3 etc., the output system Fo in the node flag NF in FIG.
b By determining FO2, etc., it is possible to determine that the own node address output to the #O system was detected by the #l system, and that the own node address output to the #l system was detected by the #O system, so the switch It can be determined that the operation was normal, and
In nodes N3, SV, etc. in FIG. 9, it can be recognized that the transmission path is operated in loopback by detecting a similar state.

〔Effect of the invention〕

According to the present invention, each communication operation means can automatically determine the status of a transmission path failure and can individually restore the transmission path automatically and quickly. As a result, the monitoring nodes are freed from centralized control, and even if the number of nodes increases, the recovery time does not increase.

Furthermore, since inter-node communication is not required, the load on the monitoring node is reduced. Furthermore, since the control procedure of the present invention can be directly implemented in hardware, it is possible to quickly perform failure recovery.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the present invention, Fig. 2 is a configuration diagram of a node according to the invention, Fig. 3 is a frame configuration diagram according to the invention, and Figs. Figure 5 is a diagram showing the relationship between the own node flag and bit clock detection conditions and the operation mode of the matrix switch, Figure 6 is a diagram showing the relationship between the output conditions of the pit cross, and Figure 7 is a diagram showing the relationship between the detection conditions of the own node flag and bit clock and the operation mode of the matrix switch. FIG. 8 is an explanatory diagram of an example of how each node operates in the first example of a transmission line failure; FIG. 9 is an explanatory diagram of an example of how each node operates in the second example of transmission line failure; Fig. 10(a), (bl is an explanatory diagram of an example of operation of each node in the third transmission path failure example, Fig. 11 is an overall configuration diagram of a ring network communication device, and Fig. 12 is a frame configuration diagram in a conventional example) 1... Communication operation means, 2... First circular transmission line, 3... Second circular transmission line, 4.5... Identification information adding means, 6.7... Identification information detection means, 8.9... Synchronization signal detection means, IO... Transmission path switching means, 11... Data transmission/reception means, 12.13... Identification information detection result, 14.15... Synchronous signal detection result. Patent applicant: Fujitsu Limited (G) (b) Matrix Mata I Sochi's "fF7('?=E-t theory,"
Silk Whistle 4 Figure 5 Gottkrog's Output Good Relationship Diagram 6 Figure 7 Figure 1 for g11 i Cod Diagram Figure 8 Supervision, Node SV if, fU & Figure 9 Tsukku Network J Su3thorn's image book area map 1st
Figure 1 $1 Falling Floor 11 10th Stage 2 (b) Diagram of each node that cools

Claims (1)

[Claims] 1) A first and second duplex system in which the communication operating means (1) having a data transmitting/receiving means (11) that transmits and receives data by applying a synchronization signal transmits data in opposite directions. Ring network communication in which a plurality of ring-shaped transmission paths (2, 3) are connected to each other and communication information is assigned to slots that circulate within each transmission path to perform communication between the respective communication operation means (1). In the device, identification information that adds identification information indicating that each communication operation means (1) is operating to a predetermined area of a frame header output to the first and second ring transmission paths (2, 3). providing means (4, 5); and the first and second annular transmission lines (
identification information detection means (6, 7) for detecting their respective identification information from the frame headers inputted from 2, 3); synchronization signal detection means (8, 9) for detecting a synchronization signal inputted from the operation means (1); synchronization signal detection results from the means and identification information detection from the identification information detection means (6, 7); transmission line switching means (10) that switches and connects each input/output of the first and second annular transmission lines (2, 3) and the input/output of the data transmitting/receiving means (11) based on the results (13, 14); ) A distributed failure recovery control device in a ring network communication device. 2) The transmission line switching means (10) sets the first condition to the respective identification signal of one of the first and second annular transmission lines (2, 3) or the If the synchronization signal cannot be detected and the respective identification information of the other ring transmission line can be detected, the input/output of the latter ring transmission line is connected to the input/output of the data transmitting/receiving means; When the synchronization signal of one of the ring transmission lines cannot be detected and the synchronization signal of the other ring transmission line can be detected, but the respective identification information cannot be detected, the input and output of the data transmission/reception means (11) are It is connected to the input of the latter ring transmission line and the output of the former ring transmission line, and similarly, as a third condition, when the synchronization signal can be detected from any transmission line but the identification signal of each one cannot be detected. Claim 1, characterized in that the device operates to connect the input/output of one of the ring-shaped transmission lines to the input/output of the data transmitting/receiving means and short-circuit the input and output of the other ring-shaped transmission line. A distributed failure recovery control device in the ring network communication device described above. 3) The transmission line switching means (10) does not output a synchronization signal to the output side of the circular transmission line connected to the input of the data transmitting/receiving means (11) in the case of the second condition. A distributed failure recovery control device in a ring network communication device according to claim 2. 4) The identification information adding means (4, 5) adds identification information to the frame header so that the frame is identified as the first
and the second annular transmission path (2, 3), and the identification information detecting means (6, 7) receives the output transmission path information when receiving the frame. Claim 1, characterized in that the current connection state of the transmission path is recognized by determining from the content whether or not the ring transmission path at the time of transmitting and receiving the frame matches. Distributed failure recovery control device in ring network communication equipment.