JPS63308770A - Digital signal recordor - Google Patents

Abstract

PURPOSE:To easily set a desired recording time by compressing inputted digital information in two-stage and recording the result. CONSTITUTION:A video signal given to an input terminal 1 is sampled by using a sampling signal having frequency being twice the maximum frequency by an A/D converter 2 to form a digital signal of 8-bit or the like. A block coding circuit 3 splits its data into a group at every 4X4 picture elements to reduce the transmission bit number per one picture element to, e.g., 1/2 by utilizing the correlativity of picture elements in each group. A low frame shot circuit 4 outputs only a 1st field in a picture data of one frame of an output data from the circuit 3 and does not output the data of a 2nd field. Thus, the output data in the circuit 4 is 1/4 of the output data of the A/D converter 2. Then the data outputted from the circuits 3, 4 is recorded by the twice and four-times modes and an operation section 5 is operated to apply recording with the designated mode.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital signal recording device, and particularly to a digital signal recording device that can change the recording time when recording digital signals on the same recording medium.

[Conventional technology]

Conventionally, in devices that record wideband analog signals, such as video signals, the well-known video tape recorder (
A method of changing the track pitch, such as that used in VTRs, is generally used. This is the S of the signal to be recorded.
The idea is to achieve long recording times at the cost of reducing the dynamic range of the HA ratio. This kind of VTR
, it was not very difficult to arbitrarily set the track pitch, and it was relatively easy to set the desired recording time. Therefore, it is technically easy to set various recording times.

On the other hand, recent advances in digital signal processing technology have made it possible to digitize wideband analog signals such as video signals.
A digital video tape recorder (D-VTR) that performs recording and reproduction using digital modulation has also been developed. In such a digital VTR, the S/N ratio of the reproduced signal does not depend on the quality of the reproduced information, but if the S/N ratio of the reproduced signal falls below a certain value, reproduction itself becomes impossible. Therefore, in this type of digital VTR, it is meaningless to change the recording time by changing the track pitch, since it is meaningless to record and reproduce images of the same quality at any l/rack pitch. Become. Therefore, digital VTR
, it is desirable to record and reproduce signals in advance with a track pitch that is fast enough to restore digital data, and it is not possible to change the recording time by increasing or decreasing this track pitch. It's hard to imagine.

Therefore, in this type of digital VTR, it has been considered to enable long-time recording by reducing the amount of data to be recorded. That is, it has been considered to change the recording time by changing the number of tracks formed per unit time.

Examples of methods for changing the amount of data recorded at this time include a method of changing the number of bits of each pixel of the video signal, a method of changing the sampling frequency, and the like.

[Problem to be solved by the invention] However, in the above-mentioned digital VTR, if the amount of data per unit time is to be changed variously, various different data compression methods are required. If an attempt is made to set this, (n-1) systems of digital signal processing systems for data compression will be required, which will complicate the configuration.

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a digital signal recording device that can easily set a desired recording time for the same recording medium.

[Means for solving problems]

For this purpose, the digital signal recording device of the present invention includes a first data compression means for reducing the amount of input digital information, and a first data compression means for reducing the amount of digital information inputted. a second data compression means for further reducing the amount; and digital information output from the first data compression means and digital information output from the second data compression means are selectively recorded on a recording medium as recording signals. The configuration includes a recording means for recording.

[Effect]

By configuring as described above, the amount of data per unit time of the signals output from each part of a single data processing system including the first data compression means and the second data compression means in series can be different. Therefore, it has become possible to set various desired recording times on the same recording medium simply by providing a single digital signal processing system.

〔Example〕

Examples of the present invention will be illustrated below.

FIG. 1 is a diagram showing a schematic configuration of a digital VTR as an embodiment of the present invention, and it is assumed that an interlace scan analog video signal consisting of two fields forming one frame is input to input terminal 1. .

The input video signal is analog-digital (A/D
') The signal is sampled by the converter 2 using a sampling signal of twice the highest frequency, and is converted into a digital signal of about 8 bits.

3 is a block encoding circuit, which divides the digital data output from the A/D converter 2 into groups of (4×4) adjacent pixels (blocks) vertically and horizontally on the screen, and divides the data into groups. The idea is to reduce the number of transmission bits per pixel 1) by utilizing the correlation of images within a group. For example, if the data output from the A/D converter 2 is 8 bits assigned to each of 16 pixels, the transmission data for one block will be (8×
16 = ) 128 bits, but the data of the pixel that takes the maximum value among all the pixels in each block is transmitted in 8 bits, and the data of the pixel that takes the minimum value is transmitted as 8 bits, and the maximum value and minimum value for each pixel are transmitted as 8 bits. If 3-bit data obtained by linear quantization in 8 steps between each value is to be transmitted, the data to be transmitted will be (B The amount can be reduced to %.

Further, 4 is a frame dropping circuit, which is configured to output only the data of the first field in one frame of image data with respect to the output data of the block encoding circuit 3, and not to output the data of the second field. be. Therefore, the amount of data output from the frame dropping circuit 4 is % of the output data from the A/D converter 2.

FIGS. 2(A) and 2(B) are diagrams showing the head configuration of the digital VTR of this embodiment. As shown in FIG. 2(A), the outer peripheral surface of the rotating cylinder 50 has an angular range of 180° or more. A magnetic tape T is wound over the cylinder 5.
0 includes heads HA+ and HB10 which have a first azimuth angle (hereinafter referred to as positive azimuth) and heads HA- and HB which have an azimuth angle different from these (hereinafter referred to as negative azimuth).
- is provided.

The heads HA+ and HB+ rotate with a phase difference of 1800 degrees, and the heads HA- and HB- similarly rotate with a phase difference of 180 degrees with each other. Here, the head HA+ and the head HA- rotate with a phase difference of θ0. The same applies to head HB+ and head HB-. Furthermore, it is assumed that the lower ends of the heads HA- and HB- have a step Tp' in the direction of the rotational axis relative to the heads HA+ and HB+, as shown in FIG. 2(B).

The VTR of this embodiment has three types of recording modes. The standard mode is a mode in which all the data outputted from the A/D converter 2 is recorded, and the data outputted from the block encoding circuit 3 is recorded in a standard mode. The mode for recording data is 2x mode, and the mode for recording data output from frame drop circuit 4 is 4.
This is hereinafter referred to as double mode. These recording modes are designated by the user manually operating the operating unit 5 during recording, and the system controller 6 connects the switch 7 to any one of the terminals A, B, and C in response to this.

Here, the recording operation of each head in each of the standard, 2x, and 4x modes will be explained. The cylinder 50 rotates twice while one frame of video signal is input to the terminal 1. That is, when the NTSC signal is input, the rotation speed of the cylinder 50 is 3600 r, p, m. In the standard mode, each head rotates twice while the cylinder 50 rotates twice.
The signal is traced on the tape one time at a time, and the signal is recorded by all these traces. During this time, the tape T is run at a constant speed by the capstan 8 so that eight tracks are formed at a constant track pitch Tp.

However, if θ is set sufficiently small, 'rp : Tp'. In the double mode, while the cylinder 50 rotates twice, signals are recorded by tracing the heads HA+ and HA- twice, and no recording is performed by the heads HB+ and HB-.

At this time, if the tracing direction of the head has a sufficiently small inclination with respect to the longitudinal direction of the tape T, the capstan 8 causes the tape to run at a speed of H in the standard mode. In the 4x mode, while the cylinder 50 rotates twice, the head HA+
.

A signal is recorded only in one of the two traces of HA-, and the speed of the tape T is in the standard mode.

Figures 3 (A), (B), and (c') are diagrams showing recording trajectories on the tape T in standard, 2x, and 4x modes, each of which records a video signal for one frame. Indicates the part that will be

TA+ in the figure.

TA-, TB+, and TB- are heads HA+, respectively.

Tracks recorded by HA-, TB+, and TB- are shown. ψ1. ψ2. Assuming that ψ3 is slightly different but sufficiently small, the track pitch Tp in each mode is almost the same.

The data output from switch 7 in Figure 1 is! It is divided into two systems by the Lunaplexer 10, and EC is applied to the data of each system by error detection code (ECC) adding circuits 11 and 12.
C is added and supplied to the buffer memory 13.14. Buffer memory 13 and 14 are system controller 6
A predetermined amount of data is output for each period in which the cylinder 50 rotates by %. The data read out from the buffer memories 13, 14 is subjected to modulation such as well-known mapping coding in digital modulation circuits 15, 16, and then to amplifiers 17, .
18 and the R side terminal of the switch 19.20, the two systems of recording signals d, , d2 are outputted from the switch 19.20.

Figure 4 shows each switch s for realizing the above recording.
w1. SW2. SW5. SW4 control signal S1゜82.
FIG.
4(a) is a timing chart in the standard mode, FIG. 4(b) is a timing chart in the 2x mode, and FIG. 4(C) is a timing chart in the 4x mode.

In the figure, it is assumed that when 81 to S4 are at a high level, SWs to SW4 are turned on. Furthermore, the shaded area indicates that no recording signal exists.

According to the above configuration, the output of the block encoding circuit 3 can be recorded as data with the data amount compressed to %.
There is no need to provide separate processing circuits for % compression and K compression.
It was possible to set three types of recording time.

The configuration of the reproduction system of the VTR of this embodiment will be briefly described below. Switch sw, , sw2゜sw, ,
sw4 is controlled at the same timing as during recording, thereby obtaining two systems of reproduction signals from the switch 19, 200P side terminal. The reproduction signals of these two systems are the amplifier 31.3
2 to digital demodulation circuits 33 and 34,
demodulated. The demodulated data is stored in the buffer memory 35.
The signals are supplied to ECC decoding circuits 37 and 38 via 36 and subjected to error correction.

The error-corrected data is converted into the original data signal of one system by the synthesis circuit 39.

In the case of a signal recorded in the standard mode, the analog video signal can be restored by supplying the output data of the synthesizing circuit 39 directly to the digital-to-analog converter 41 via the C terminal of the switch 40. In the case of a signal recorded in the double mode, the block decoding circuit 43 returns the block encoded data to the original data, and then the switch 40
The signal is supplied to the D/A converter 41 via the B terminal. In the case of a signal recorded in the 4x mode, the output data of the block decoding circuit 43 is further supplied to the interfield interpolation circuit 44, and after restoring the data of the field where the frame has been dropped, the switch 40 is It is supplied to the D/A converter 42 via the A terminal. Note that switching of this switch may be performed by operating the operating section 5, or by recording information indicating the recording mode in the recording signal and reproducing this.

In the above-mentioned VTR, means for compressing the amount of data is provided in multiple stages in series to set three types of recording times for the same recording medium, and the data output from these intermediate taps can be recorded. Therefore, there is no need to perform separate processing including a data compression circuit dedicated to each recording mode. In addition, one of the multiple stages uses block encoding to reduce the number of data per pixel, and the other uses frame dropping to reduce the number of recorded pixels, so data can be easily extracted from intermediate taps and Even if data compression is performed in stages, the image does not deteriorate significantly.

[Other Examples]

In the above embodiment, the head configuration is as shown in FIG. 2(A), (
Although the configuration shown in B) is used, other configurations are also possible.

FIG. 5 is a diagram showing another example of the head configuration, in which the head H
+ is a head with a positive azimuth, and head H- is a head with a negative azimuth, these are provided close to each other and have a predetermined step in the direction of the rotation axis depending on a desired track pitch.

In this head configuration, the cylinder 54 rotates once during one field of the video signal, that is, at twice the speed of the head in FIG.

55b, it is wound over a range of about 3000 corners, for example. In the standard mode, heads H+ and H- record signals in each trace and compress the data to l/n.
In the double mode, signals are recorded once every n traces, that is, once every n rotations. However, in this case, since there is a period during which no signal can be recorded, the reading period from the buffer memory as shown in FIG. 1 must be made shorter than in the case of FIG. For example, when the tape is wound in an xo corner range, the readout period needs to be less than (X/360) of one field period.

FIG. 6 is a diagram showing still another example of the head configuration. In the figure, heads H1, H3, and H5 are positive azimuth heads, H2
, H4, and H5 are negative azimuth heads, and heads H1, H2, and H3 are shifted in the direction of the rotation axis.
The same applies to 4, H5, and H6. With this head configuration, recording is performed on three tracks simultaneously, so if the amount of data that can be recorded on one track is the same as in the case of FIG. 2, the rotational speed of the cylinder 56 can be reduced to %. Tape T is tape guide 57a
.

57b over an angular range of 91,808 or more, in standard mode all heads record each trace, (2m
-1) In double mode, all heads record one variable signal in m traces.

m is a natural number, and in this case, if azimuth overwriting is to be performed, only a mode in which the amount of data is reduced to 1/an odd number can be used.

Furthermore, in the above-described embodiments, it has been explained that block coding is used to reduce the number of data for each pixel, but it is of course possible to use other methods such as predictive differential coding. Furthermore, as a method for reducing the number of pixels, simple frame dropping was performed, but it is also possible to use subsampling in which one period is n fields, variable density sampling, etc.

〔Effect of the invention〕

As explained above, according to the present invention, when recording digital signals on a recording medium with a relatively simple configuration, it has become possible to set a recording time of 3 m or more on the same recording medium. .

[Brief explanation of drawings]

FIG. 1 is a diagram showing a schematic configuration of a digital VTR as an embodiment of the present invention, FIGS. 2(A) and (B) are diagrams showing a head configuration in the VTR of FIG. 1, and FIG. FIG. 4 is a timing chart showing the operation timing of each part of the VTR shown in FIG. 1. FIG. 5 is a diagram showing another example of the head configuration. The figure shows still another example of the head configuration. 3 is a block encoding circuit, 4 is a frame dropping circuit, 5 is an operation unit, 6 is a system controller, 7 is a switch, 13.1
4 is a buffer memory, sw, sw2. sw,,sw4
are respectively switches and HA+. HA-, HB+, and HB- are magnetic heads, respectively.

Claims (1)

[Scope of Claims] (1) A first data compression means for reducing the amount of input digital information, and a second data compression means for further reducing the amount of digital information output from the first data compression means. and a recording means capable of selectively recording digital information output from the first data compression means and digital information output from the second data compression means as recording signals on a recording medium. digital signal recording device. (2) The digital information is image information, and the first
One of the compression means and the second compression means reduces the amount of information by reducing the amount of data per each pixel, and the other reduces the amount of information by reducing the number of pixels. A digital signal recording device according to claim (1).