JPS63304734A - Pulse stuff synchronizing system - Google Patents

Abstract

PURPOSE:To prevent the deterioration in the signal quality by constituting an information bit number in one frame as a prime number so as to block the production of a stuff jitter for a long period. CONSTITUTION:A frame is constituted so that the location of phase comparison is moved independently of the stuff by taking the relation between the frame constitution and the phase comparison interval into account. That is, the condition above is satisfied when no common measure except 1 exists between the information hit number (i) in one frame and the phase comparison interval (n). Thus, in selecting an optional positive integer for the interval (n), a prime number has only to be selected for the number (i). Thus, the production of jitter for a long period is suppressed and the deterioration in the quality of signal is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a pulse stuff synchronization method used in a time division multiplex digital communication method, and more specifically to a frame structure of the synchronization method.

(Prior Art) Conventionally, as a means of synchronizing asynchronous digital signals, the reference clock frequency is selected to be slightly higher than that of the input signal, and surplus bits (
A pulse stuff synchronization method is used in which the input signal is synchronized with the reference clock by inserting stuff bits (stuff bits).

In addition to the original signal, it is necessary to insert various service bits such as a synchronization pulse and a stuff control pulse into the synchronization signal, and a frame is formed by a group of signals for each cycle. Furthermore, stuff bits are inserted at specific positions in this frame, and the phase difference between the input signal and the reference clock is detected, and if this exceeds a limit value, the stuff bits are inserted.

This phase difference detection generally uses sampling phase comparison for each period due to the ease of hardware configuration.

Conventionally, when determining a frame configuration, the main focus has been on the ease of circuit configuration (for example, making the number of bits of an l frame a multiple of 2).

(Problems to be Solved by the Invention) Therefore, in the conventional frame configuration, no consideration is given at all to the relationship between the phase comparison interval for stuffing determination and the number of information bits in one frame.

For this reason, if there is a correlation between the frame structure and the phase comparison interval, there is a drawback that when the original signal is reproduced by destuffing, jitter with a very long A period is generated. Although a small amount of jitter can be absorbed by the clock smoothing circuit used to create the start-up clock, long-period jitter such as the one described above cannot be completely suppressed even by the clock smoothing circuit, and the quality of the signal can be significantly degraded. It will cause deterioration.

SUMMARY OF THE INVENTION An object of the present invention is to provide a pulse stuff synchronization method that can suppress the occurrence of long period jitter and prevent deterioration of signal quality.

(Means for Solving the Problems) In order to achieve the above object, the pulse stuff synchronization method according to the present invention is a pulse stuff synchronization method that synchronizes a plurality of asynchronous signals. It is configured to be.

(Example) Hereinafter, the present invention will be explained in more detail with reference to the drawings.

1 is a frame configuration diagram showing an embodiment of the pulse stuff synchronization method according to the present invention.

F and S are service bits for frame synchronization and stuff control, respectively. Bits 1 to 1 (7) are information bits, and the input asynchronous digital signal string is arranged in this part.

Furthermore, 1 is a variable time slot, and when the phase difference between the reference clock and the input signal clock exceeds a certain value, a useless pulse (stuff pulse) is inserted here,
Keep the phase difference within a certain value.

The gist of the present invention is how to determine the number i of information bits in one frame.

FIG. 2 shows the phase movement between the reference clock and the input signal clock in one frame.

1 indicates the phase of the input signal clock, l frame (number +
2 bits).

On the other hand, 2 indicates the phase of the reference clock, which stops at the service bit position and changes the same amount of phase as 1 between i bits.

From this reason, it can be seen that the observed phase difference varies depending on the position in the %l frame at which the phase comparison is performed. First, the phase difference to be stuffed will differ depending on the phase comparison position.

As a conventional example, consider the case where i=8 and the phase comparison interval is 8 bits. At this time, since the number of information bits in one frame and the phase comparison interval are equal, phase comparison is always performed at the same location in the frame.

This phase comparison position shifts by one bit each time stuffing is performed, and returns to the original phase comparison position after eight stuffs. For this reason, if the original signal is reproduced by destuffing, stuff jitter with a period of 8 stuffs will occur.

Generally, stuff jitter caused by pulse stuffing is removed by a clock smoothing circuit after destuffing, but jitter with long synchronization as described above cannot be completely removed and deteriorates signal quality.

As mentioned above, the reason why such jitter occurs is that phase comparison is always performed at the same location in successive frames, and it is moved each time stuffing is performed. However, if the phase comparison location is moved without depending on the staff, the above phenomenon will not occur.

The present invention was not previously considered. This method takes into account the relationship between the frame configuration and the phase comparison interval, and configures the frame rather than moving the phase comparison location regardless of the staff.

Generally, when the number of information bits in one frame is i and the phase comparison interval is n, the above condition is satisfied if there is no common divisor other than l between i and n.

If n is any positive integer, a prime number should be chosen for -.

(Effects of the Invention) As described above, according to the present invention, when configuring a frame in the pulse stuff synchronization method, the number of information bits in one frame is selected to be a prime number, thereby preventing the occurrence of long period stuff jitter. This has the effect of preventing deterioration of signal quality.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the pulse stuff synchronization method according to the present invention. FIG. 2 is a diagram showing changes in the phase of the input signal clock and the phase of the reference clock within one frame in an embodiment of the present invention. l...Clock phase transition of input signal 2...Reference clock phase transition Patent applicant NEC Corporation representative Patent attorney Noro Hisashi 1.1 Figure 22

Claims (1)

[Claims] A pulse stuff synchronization method for synchronizing a plurality of asynchronous signals, characterized in that the number of information bits in one frame is a prime number.