JPS6330000A - Method of mounting optimum resistance onto circuit board - Google Patents

Method of mounting optimum resistance onto circuit board

Info

Publication number
JPS6330000A
JPS6330000A JP61173035A JP17303586A JPS6330000A JP S6330000 A JPS6330000 A JP S6330000A JP 61173035 A JP61173035 A JP 61173035A JP 17303586 A JP17303586 A JP 17303586A JP S6330000 A JPS6330000 A JP S6330000A
Authority
JP
Japan
Prior art keywords
resistor
chip
circuit board
resistance
mounting machine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61173035A
Other languages
Japanese (ja)
Inventor
宏之 岡本
義文 原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61173035A priority Critical patent/JPS6330000A/en
Publication of JPS6330000A publication Critical patent/JPS6330000A/en
Pending legal-status Critical Current

Links

Landscapes

  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は回路基板最適抵抗実装方法に関するもので、電
子回路基板をチップ抵抗実装機と機能を調整測定機を利
用して製造するのに利用される。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for optimally mounting resistors on a circuit board, and is used to manufacture electronic circuit boards using a chip resistor mounting machine and a function adjusting and measuring machine. .

従来の技術 従来は回路上で調整の必要な箇所は半固定抵抗器を後付
けして、調整工程で人あるいは機械で調整している。
BACKGROUND OF THE INVENTION Conventionally, semi-fixed resistors are retrofitted to parts of the circuit that require adjustment, and adjustments are made manually or mechanically during the adjustment process.

また印刷抵抗やチップ抵抗を実装し、レーザートリミン
グ装置等を用いて機能トリミングを行うこともされてい
る。
It is also possible to mount printed resistors or chip resistors and perform functional trimming using a laser trimming device or the like.

発明が解決しようとする問題点 前記従来技術の前者では半固定抵抗の実装という異形部
品である半固定抵抗の実装工程が必要であり、かつ調整
後の特性の安定性に不安がある。
Problems to be Solved by the Invention The former method of the prior art requires a step of mounting a semi-fixed resistor, which is an oddly shaped component, and there is concern about the stability of the characteristics after adjustment.

また後者では調整すべき抵抗も他の抵抗と一括して印刷
実装するため調整工数だけであり、調整後は固定抵抗と
なるため特性も安定しているが、調整にレーザートリミ
ング装置を用いるため設備コストが高くなる。
In addition, in the latter case, the resistor to be adjusted is printed and mounted together with other resistors, so only the adjustment man-hours are required, and after adjustment, it becomes a fixed resistance, so the characteristics are stable, but since a laser trimming device is used for adjustment, the equipment The cost will be higher.

問題点を解決するための手段 本発明は前記問題点を解決するために、第1の発明とし
て機能調整箇所のある回路基板の調整すべき抵抗の定数
を求める機能調整測定器と、抵抗値を各レンジごとに所
要種類□の2チツプ抵抗器のストックを備えたチップ抵
抗実装機と、前記機能調整測定器およびチップ抵抗実装
機を管理する制御装置とを利用し、前記機能調整測定器
からの出力を、前記制御装置に受けることにより必要な
チップ抵抗器の組合せを選択してそれを前記チップ抵抗
実装機に指示し、前記選択したテップ抵抗器を回路基板
に実装することを特徴とするものである。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides, as a first invention, a function adjustment measuring device for determining the constant of the resistance to be adjusted on a circuit board having a function adjustment location, and a function adjustment measuring device for determining the resistance value to be adjusted. Using a chip resistance mounting machine equipped with a stock of two-chip resistors of the required type □ for each range, and a control device that manages the function adjustment measuring instrument and the chip resistance mounting machine, The device is characterized in that the output is received by the control device to select a necessary combination of chip resistors, instruct it to the chip resistor mounting machine, and mount the selected step resistors on the circuit board. It is.

また第2の発明は、第1の発明に対し、制御装置が選択
したチップ抵抗器の組合せを前記チップ抵抗実装機に指
示するのに、その指示される抵抗器の実際の値を前記抵
抗測定器により測定させて、その値を前記制御装置にフ
ィードバックさせ、次に実装すべき抵抗器の補正を行い
ながら抵抗の組合せを行い、この補正後の組合せに基く
抵抗器を前記チップ抵抗実装機により回路基板に実装さ
せることを特徴とするものである。
A second invention, in contrast to the first invention, is such that when the control device instructs the chip resistor mounting machine to select a combination of chip resistors, the actual value of the instructed resistor is measured by the resistance measurement. The value is fed back to the control device, and then the resistances are combined while correcting the resistors to be mounted, and the resistors based on the corrected combinations are mounted by the chip resistance mounting machine. It is characterized by being mounted on a circuit board.

作  用 第1の発明では機能調整箇所のある回路基板の調整すべ
き抵抗の定数を機能調整測定器によって求め、このデー
タを制御装置に受けることにより必要なチップ抵抗器の
組合せを選択することができる。
In the first invention, the constant of the resistance to be adjusted on the circuit board where the function adjustment part is located is determined by the function adjustment measuring device, and this data is received by the control device to select the necessary combination of chip resistors. can.

この選択はチップ抵抗実装機に指示し、選択通りのチッ
プ抵抗器をストック分からピックアップし回路基板に実
装させるものであり、回路基板や個々に最適な抵抗器を
トリミングなしに実装することができる。
This selection is instructed to the chip resistor mounting machine, which picks up the selected chip resistor from stock and mounts it on the circuit board, making it possible to mount the optimal resistor on the circuit board or individually without trimming.

第2の発明では、ストックしたチップ抵抗器のうち選択
した組合せに係る指示抵抗器の実際の値を抵抗測定器に
より測定するようにし、この測定値を制御装置にフィー
ドバックさせて次に実装すべき抵抗器の補正を行い、こ
の補正しながら選択した組合せに基くチップ抵抗器を回
路基板に実装するもので、ストックしたチップ抵抗器の
誤差をもトリミングなしに配慮してさらに適正な抵抗器
を実装することができる。
In the second invention, the actual value of the indicator resistor related to the selected combination of chip resistors in stock is measured by a resistance measuring device, and this measured value is fed back to the control device to determine which chip resistors should be mounted next. The resistor is corrected, and a chip resistor based on the selected combination is mounted on the circuit board while making this correction.The error of the stocked chip resistor is also considered without trimming, and a more appropriate resistor is mounted. can do.

実施例 本発明の第1図から第4図に示す実施例について説明す
れば、第1図に概略を示すように回路基板Pの搬送ライ
ン4において、チップ抵抗実装機3の前に被測定回路基
板の最適機能調整時の定数を測定する機能調整測定器2
を設置し、この機能調整測定器2により測定されたデー
ターを制御装置1に受けて被測定基板に実装するチップ
抵抗器の定数の組合せを選択し、これをチップ抵抗実装
機3に指示し、前記選択にかかるチップ抵抗器を回路基
板Pに実装させるようにする。ここで、チップ抵抗実装
機3には必要種類のチップ抵抗器をストックしておき、
前記選択指令に応じてピックアップし実装するようにす
る。
Embodiment To explain the embodiment of the present invention shown in FIGS. 1 to 4, as schematically shown in FIG. Function adjustment measuring instrument 2 that measures constants during optimum function adjustment of the board
The controller 1 receives the data measured by the function adjustment measuring device 2, selects a combination of constants of the chip resistor to be mounted on the board to be measured, and instructs this to the chip resistor mounting machine 3, The selected chip resistor is mounted on the circuit board P. Here, the chip resistor mounting machine 3 is stocked with the necessary types of chip resistors,
Pick up and implement according to the selection command.

なお1つの調整すべき抵抗R(第2図)を、1つの抵抗
器で構成せず第2図の様に複数のレンジの異なる抵抗器
R1,R2,R3を直列に接続して構成することで各種
抵抗値を合成して選択使用すると、トリミングを行わず
に調整を行うことができ好都合である。
Note that one resistor R to be adjusted (Fig. 2) should not be composed of a single resistor, but rather a plurality of resistors R1, R2, and R3 of different ranges connected in series as shown in Fig. 2. If various resistance values are synthesized and selectively used, adjustments can be made without trimming, which is convenient.

さらに前記チップ抵抗実装機が各レンジごとに等間隔に
10分割したストックを持つようにすれば、前記制御装
置から指示される値の十進表現の各ケタ知相する抵抗器
を選ぶことができる。つまシ最適抵抗値が123にΩな
らば、1ooKΩと20 KQと3にΩに分割できる。
Furthermore, if the chip resistor mounting machine has a stock divided into 10 equally spaced parts for each range, it is possible to select resistors that are compatible with each digit of the decimal representation of the value instructed by the control device. . If the optimum resistance value is 123Ω, it can be divided into 10KΩ, 20KQ, and 3Ω.

この様に実装するためには被実装回路基板Pの回路パタ
ーンも複数のチップ抵抗器を実装できる様になっている
必要がある 又チップ抵抗実装機3には、抵抗測定器を内蔵しておき
、実際に実装する抵抗値の実際の値を測定して不良判定
を行うほか、測定データを前記制御装置1に帰すことで
、次に実装すべき抵抗器の補正を行いながら抵抗の組合
せを行い、この補正後の組合せに基く抵抗器をチップ抵
抗実装機3により回路基板Pに実装させることができる
In order to mount in this manner, the circuit pattern of the circuit board P to be mounted must also be such that multiple chip resistors can be mounted.The chip resistor mounting machine 3 must also have a built-in resistance measuring device. In addition to measuring the actual value of the resistor to be actually mounted and determining whether the resistor is defective, the measurement data is returned to the control device 1 to perform combinations of resistors while correcting the resistor to be mounted next. , a resistor based on this corrected combination can be mounted on the circuit board P by the chip resistor mounting machine 3.

これを具体的に説明すると、抵抗値Rをn個の抵抗で構
成するとすると、 ■ R= Σ rK     rK>rK+1に=1 であるが、実際には各抵抗は誤差εKを有している。
To explain this specifically, if the resistance value R is made up of n resistors, (1) R=Σ rK rK>rK+1 = 1, but in reality each resistor has an error εK.

■ gK=rK rK   rKは実測データこの誤差
εKを1番目に選択したチップ抵抗につき実測し、その
ときの誤差εKを用いて次のrK+1 を補正し”K+
、をrK+1 の代りに用いる。
■ gK=rK rK rK is actually measured data. This error εK is actually measured for the first selected chip resistor, and the next rK+1 is corrected using the error εK at that time, and "K+
, is used instead of rK+1.

■ ”K11= rK+1 ” ’に この手法を繰返しながら必要数のチップ抵抗器を組合せ
て実装させ、所要抵抗値を得る。第3図はこのような手
法のアルゴリズムを表わしている。
■ ``K11=rK+1'' Repeat this method to combine and mount the required number of chip resistors to obtain the required resistance value. FIG. 3 represents an algorithm for such a method.

チップ抵抗の誤差が10%以下であれば、ε1はHの1
0分の1以下であり、ε2は1%以下、ε3は0.1%
以下が期待できる。
If the chip resistance error is 10% or less, ε1 is 1 of H.
It is less than 1/0, ε2 is less than 1%, and ε3 is 0.1%.
You can expect the following.

上記のような方法によって基板組立後に調整工程を設け
ることなく、かつレーザートリミング装置等の高価な設
備を使用しなくても高精度の回路機能の調整ができる。
By the method described above, circuit functions can be adjusted with high precision without providing an adjustment step after board assembly and without using expensive equipment such as a laser trimming device.

また調整後の抵抗は固定抵抗であるため製品としての安
定性もよい。
Furthermore, since the resistance after adjustment is a fixed resistance, the stability of the product is good.

本発明の方法ではチップ抵抗器を多種類ストックしてお
く必要があるが、回路の設計段階で調整用の抵抗の範囲
を制限しておくことで必要な抵抗器の種類を少なくでき
る。
In the method of the present invention, it is necessary to stock many types of chip resistors, but by limiting the range of resistances for adjustment at the circuit design stage, the number of required types of resistors can be reduced.

またストックする抵抗器の値が多種類であれば、多品種
の製品を製造する場合に対応できる。
Furthermore, if there are many types of resistors in stock, it is possible to manufacture a wide variety of products.

第4図に前記方法を実施するための具体的装置の一例を
示している。
FIG. 4 shows an example of a specific apparatus for implementing the method.

この例ではローダ−7から基板Pが供給され、機能調整
測定器2で測定したデータから制御装置1が基板Pごと
の実装抵抗の組合を決定する。これに併せチップ抵抗実
装機3に備える抵抗ストッカー8が移動し実装機3のロ
ータリマウントヘッド9が前記決定された組合せに係る
抵抗をストッカー8から取り出し、抵抗計測プローブ1
4付き 。
In this example, the board P is supplied from the loader 7, and the control device 1 determines the combination of mounted resistances for each board P based on data measured by the function adjustment measuring instrument 2. At the same time, the resistance stocker 8 provided in the chip resistance mounting machine 3 moves, and the rotary mount head 9 of the mounting machine 3 takes out the resistors related to the determined combination from the stocker 8, and the resistance measurement probe 1
With 4.

の位置規正部10に一旦移しチップ抵抗値を測定する。Once transferred to the position regulating section 10, the chip resistance value is measured.

この測定値は制御装#1にフィードバックし、不良チッ
プの処理や次に取り出す抵抗の指示値の補正を行う。そ
の間に前記基板Pをローダ−7からテーブル11に移動
させて、実装のための位置決めをする。位置規正部10
のチップ抵抗を再び取り出し、テーブル11上の基板P
に実装する。
This measured value is fed back to control device #1 to process defective chips and correct the indicated value of the resistor to be taken out next. During this time, the substrate P is moved from the loader 7 to the table 11 and positioned for mounting. Position regulating section 10
Take out the chip resistor again and place it on the board P on the table 11.
to be implemented.

以降テーブル移動、チップ抵抗域シ出し、抵抗値測定、
実装をくり返し、全抵抗の実装終了時に基板pHテーブ
ル11上からアンローダ12に移され搬出される。
After that, move the table, show the chip resistance range, measure the resistance value,
The mounting is repeated, and when all the resistors have been mounted, the board is transferred from the substrate pH table 11 to the unloader 12 and unloaded.

発明の効果 本発明は前記構成および作用を有するので、レーザート
リミング装置等を用いずにチップ抵抗実装機と測定器を
組合せて機能調整を行うことができるため設備コストを
少なくできる。
Effects of the Invention Since the present invention has the above-described configuration and operation, it is possible to perform functional adjustment by combining a chip resistor mounting machine and a measuring device without using a laser trimming device or the like, thereby reducing equipment costs.

特に第2の発明では実装する抵抗器の実測誤差をも配慮
したさらに適正な抵抗器の実装が行える。
In particular, in the second aspect of the invention, it is possible to more appropriately mount the resistor, taking into consideration the actual measurement error of the resistor to be mounted.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を実施する装置の概略図、第夛図は調整
すべき抵抗Rを、3つの抵抗(R1,R2゜R3)の組
合せにして用いることを示している説明図、第3図は上
記抵抗を実装していくときの抵抗値の補正のフローチャ
ート、第4図は本発明を実施する装置の具体例を示す平
面図である。 1・・・・・・制御装置、2・・・・・・機能調整測定
器、3・・・・・・チップ抵抗実装機、14・・・・・
抵抗計測プローブ、P・・・・・・回路基板。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名1−
ルj御S1 第2図 R Rt> R2> R3
Fig. 1 is a schematic diagram of an apparatus for carrying out the present invention; The figure is a flowchart for correcting the resistance value when the above-mentioned resistors are mounted, and FIG. 4 is a plan view showing a specific example of an apparatus implementing the present invention. 1... Control device, 2... Function adjustment measuring device, 3... Chip resistance mounting machine, 14...
Resistance measurement probe, P...Circuit board. Name of agent: Patent attorney Toshio Nakao and 1 other person1-
S1 Figure 2 R Rt>R2> R3

Claims (2)

【特許請求の範囲】[Claims] (1)機能調整箇所のある回路基板の調整すべき抵抗の
定数を求める機能調整測定器と、抵抗値の異なるチップ
抵抗器のストックを備えたチップ抵抗実装機と、前記機
能調整測定器およびチップ抵抗実装機を管理する制御装
置とを利用し、前記機能調製測定器からの出力を前記制
御装置に受けることにより必要なチップ抵抗器の組合せ
を選択してそれを前記チップ抵抗実装機に指示し、前記
選択したチップ抵抗器を回路基板に実装することを特徴
とする回路基板最適抵抗実装方法。
(1) A function adjustment measuring device that determines the constant of the resistance to be adjusted on a circuit board with a function adjustment location, a chip resistance mounting machine equipped with a stock of chip resistors with different resistance values, and the function adjustment measuring device and the chip. A control device that manages the resistor mounting machine is used to select a necessary combination of chip resistors and instruct the chip resistor mounting machine to select a necessary combination of chip resistors by receiving the output from the function adjustment measuring device into the control device. . A method for optimally mounting a resistor on a circuit board, comprising: mounting the selected chip resistor on a circuit board.
(2)機能調整箇所のある回路基板の調整すべき抵抗の
定数を求める機能調整測定器と、抵抗値の異なるチップ
抵抗器のストックと抵抗測定器とを備えたチップ抵抗実
装機と、前記機能調整測定器およびチップ抵抗実装機を
管理する制御装置とを利用し、前記機能調整測定器から
の出力を前記制御装置に受けることにより必要なチップ
抵抗器の組合せを選択してそれを前記チップ抵抗実装機
に指示するのにその指示される抵抗器の実際の値を前記
抵抗測定器により測定させて、その値を前記制御装置に
フィードバックさせ、次に実装すべき抵抗器の補正を行
いながら抵抗の組合せを行いこの補正後の組合せに基く
抵抗器を前記チップ抵抗実装機により回路基板に実装さ
せることを特徴とする回路基板最適抵抗実装方法。
(2) A chip resistor mounting machine equipped with a function adjustment measuring device that determines the constant of the resistance to be adjusted on a circuit board with a function adjustment point, a stock of chip resistors with different resistance values, and a resistance measuring device, and the above-mentioned function. Using an adjustment measuring device and a control device that manages a chip resistor mounting machine, the control device receives the output from the function adjustment measuring device, selects a necessary combination of chip resistors, and selects the combination of chip resistors. To instruct the mounting machine, the actual value of the specified resistor is measured by the resistance measuring device, the value is fed back to the control device, and then the resistance is measured while correcting the resistor to be mounted. A method for optimally mounting a resistor on a circuit board, characterized in that the resistor based on the corrected combination is mounted on the circuit board by the chip resistor mounting machine.
JP61173035A 1986-07-23 1986-07-23 Method of mounting optimum resistance onto circuit board Pending JPS6330000A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61173035A JPS6330000A (en) 1986-07-23 1986-07-23 Method of mounting optimum resistance onto circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61173035A JPS6330000A (en) 1986-07-23 1986-07-23 Method of mounting optimum resistance onto circuit board

Publications (1)

Publication Number Publication Date
JPS6330000A true JPS6330000A (en) 1988-02-08

Family

ID=15952991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61173035A Pending JPS6330000A (en) 1986-07-23 1986-07-23 Method of mounting optimum resistance onto circuit board

Country Status (1)

Country Link
JP (1) JPS6330000A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03272691A (en) * 1990-03-22 1991-12-04 Tanabe Seiyaku Co Ltd Production of 2-halogeno-3-hydroxy-3-phenylpropionic acid esters
JP2011155252A (en) * 2009-12-23 2011-08-11 Biosense Webster (Israel) Ltd Component selection for circuit assembly

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03272691A (en) * 1990-03-22 1991-12-04 Tanabe Seiyaku Co Ltd Production of 2-halogeno-3-hydroxy-3-phenylpropionic acid esters
JPH0779706B2 (en) * 1990-03-22 1995-08-30 田辺製薬株式会社 Process for producing 2-chloro-3-hydroxy-3-phenylpropionic acid esters
JP2011155252A (en) * 2009-12-23 2011-08-11 Biosense Webster (Israel) Ltd Component selection for circuit assembly

Similar Documents

Publication Publication Date Title
US5528825A (en) Method of manufacture of hybrid integrated circuit
JPS6330000A (en) Method of mounting optimum resistance onto circuit board
US5485115A (en) Impedance synthesizer
JP3628789B2 (en) Automatic calibration system for semiconductor test system
JPH05111827A (en) Positioning method of rotational position
JPS61232652A (en) Adjusting method for electronic circuit
JPH02178961A (en) Regulator for electronic circuit
JPH0126162B2 (en)
JPS61253804A (en) Trimming of resistor
US4821822A (en) Method and apparatus for adjusting resistors in load-cell scale
JPH09216338A (en) Apparatus and method for printing solder paste
JPS6120345A (en) Bonding method
JPS61253803A (en) Trimming of resistor
JPS61253802A (en) Trimming of resistor
JPH0128401Y2 (en)
JPH0746645B2 (en) Electronic circuit adjustment method
JPS61279102A (en) Electronic circuit adjustor
JP2769517B2 (en) Manufacturing method of hybrid integrated circuit
JPS5950503A (en) Device for adjusting electric circuit
JPS61149872A (en) Output adjustment system for unit
JPH0140516B2 (en)
JPS58171846A (en) Multi-segment hybrid ic substrate
JPH03150804A (en) Test device for electronic circuit
JPS60198707A (en) Method of regulating electronic circuit
JPS5817648A (en) Manufacture of semiconductor device