JPS63288009A - Wafer and method of controlling wafer treatment process - Google Patents

Abstract

PURPOSE:To effectively detect marks and to simplify the process control when the kind of treatment differs for every wafer by a method wherein the marks for the whole process or a partial process are engraved on the prescribed positions in advance, and by engraving a treatment-finished mark in the vicinity of the corresponding process-mark or directly above the process mark, it can be detected effectively. CONSTITUTION:A plurality of chips 2, normally having rectangular shape, are arranged in order to form an integral circuit on a silicon wafer 1, and as it is necessary to cut off finally, a commonly called scribe region 3 having the width of 50-100 mum is formed. A process mark 4 is formed in this scribe region. Pertaining to the process marks, a groove is formed on the wafer 1 by photoetching in the first stage of wafer treatment, and not only English letters, numerals and Japanese characters, but also bar codes and the other prescribed marks can be used. In the other implementation examples, two sets of marks, namely, a mark group consisting of a pair of a process mark 4 and a treatment mark 5 are formed, and if one of them is crushed, the other one is left, and the reliability can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a technology for forming integrated circuits (abbreviated as IC), and particularly to a wafer and a process control method therefor that facilitate process control.

[Conventional technology]

The conventional sea urchin fly control mark is JP-A-58-4841.
As described in No. 4, marks of processing steps are printed in advance on the periphery of the wafer, and when the process is completed, a dot is printed near the corresponding mark to record the completion of the process.

In this method, in order to record the history of a process that leaves no trace, a new device for forming marks in that process is required, which increases costs. Also, since the mark is located on the periphery of the wafer, depending on the processing process, the mark may be hidden or
Pattern defects, which are relatively common in the periphery, may deform the mark or, in the worst case, erase the mark.6 [Problems to be Solved by the Invention] The above-mentioned prior art takes into account consideration to deal with these problems. There was a problem in that the process management was not carried out properly, which hindered smooth process control.

The purpose of the present invention is to eliminate these drawbacks of conventional methods.

The object of the present invention is to provide a wafer and its management method that enable smooth process control.

[Means for solving interlayer points]

The above purpose is to inscribe marks (abbreviated as process marks) for all or part of the processing steps on the wafer in advance at predetermined positions on the wafer, and mark marks (abbreviated as end marks) that indicate the completion of processing on the wafer. .

This is accomplished by carving in the vicinity of or directly above the corresponding process mark.

[Effect]

In a process involving buttering, such as photoetching, whether the process has been completed can be determined by whether the material to be etched remains in a predetermined area or is removed. To identify.

An optical microscope, a scanning electron microscope, or the like can be used. When the material to be etched is extremely thin,
It can be used in cases where the above two microscopic methods cannot distinguish between them.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. To form an integrated circuit (IC) on a silicon wafer 1, a plurality of usually rectangular chips 2 are arranged. Furthermore, since it is necessary to ultimately separate these chips 2, l150
A so-called scribe region 3 of ~100 μm is formed. When the process mark 4 is formed in this scribe area, no new area is required, and a decrease in the efficiency of using the area of the wafer can be prevented.

The process mark is, for example, a groove formed by photo-etching on the wafer 1 at the earliest stage of wafer processing.

Marks can be not only simple English letters, numbers, and Japanese characters, but also bar codes and other room symbols. Basically, all you need to do is form a pattern, so the so-called LOG
An element isolation pattern such as O8 (local oxidation method) or a method of leaving a thick insulating film such as a field oxide film can be similarly used.

FIG. 2 shows another embodiment of the invention; in the embodiment already shown in FIG. 1, process marks 4. Since only one pair of processing marks is formed, there is a possibility of crushing due to defects randomly occurring on the wafer. Therefore, in this embodiment, the mark group 6 of the process mark 4 and the processing mark 5 is divided into two
It is made up of a set. According to such a configuration, even if one is crushed, the other remains, improving reliability. When the defect density is high, a set of two or more mark groups 6 may be formed accordingly.

Further, in the embodiment shown in FIG. 3, the mark group 6 is inserted not in the generally narrow scribe area 3 but in a part of the area where the chips 2 are arranged. This increases the degree of freedom in design since a sufficient area can be secured.

On the other hand, in photoetching processes that change the planar shape, marks can be easily detected by detecting the external shape. The process is carried out as in the embodiment shown in FIG. 5, that is, a blocking film 7 typified by a thermally oxidized SiOx film is formed on the wafer 1, and a predetermined portion is removed. Thereafter, an ion implantation layer 8 is formed by ion implantation. Then, a layer 18 in which ions are implanted and a layer 9 in which ions are not implanted are formed.
This difference can be seen using electron beam induced current (EBIC) and optical scanning microscopy! ! (SPM) Can be detected by ellipsometry, E
Basically, in BIC and SPM, the region and velocity of the flow of electrons and holes induced on the surface of the Si substrate of the wafer 1 are 111! The difference between the implanted layer 8 and the non-implanted layer 9 is detected by utilizing the difference in density and concentration.

If the implanted layer 8 and the non-implanted layer 9 form a p-n junction, the difference can be detected by detecting the secondary electron image with a normal scanning electron microscope (SEM) without using EBIC or SPM. can be determined. If the blocking film 7 is too thick and the electron beam cannot penetrate sufficiently, the blocking film 7 in the area necessary for detection can be removed, as shown in FIG. It becomes almost the same with the mixed layer 9, and the detection sensitivity increases.

In addition, if the surface conditions are almost the same, the crystal condition can be detected by ellipsometry, so when the ion implantation amount is large, EBIC and SPM are used.

There is no need to use SEM etc.

〔Effect of the invention〕

According to the present invention, each wafer processing step can be marked on the wafer and detected effectively, so that process management can be simplified, especially when the processing is different for each wafer.

[Brief explanation of drawings]

1 to 3 are plan views of an embodiment of the invention, and FIGS. 4, 7, and 5 are sectional views of another embodiment of the invention. 1... Wafer, 2... Chip, 3... Scribe area. 4... Process mark, 5... Processing mark, 6 different mark groups, 7... Blocking film, 8... Ion implantation layer, 9...
・Non-striking Fy5゜Kaya II2] Kaya 2 Figure 6 Mark needle

Claims (1)

[Claims] 1. A wafer on which a mark remains that allows the history of predetermined processing to be detected. 2. The wafer according to item 1, on which all or some of the predetermined steps are pre-engraved before processing the steps. 3. The wafer according to item 2, in which the history of the completed process remains as a mark. 4. Place the mark at a predetermined position on the wafer, or
The wafer according to any one of items 1 to 3, remaining in the scribe area. 5. A wafer processing process management method including a step of forming in advance on a wafer a mark capable of detecting a predetermined processing history, and a step of managing the mark at each predetermined processing stage.