JPS63282798A - Operation control circuit for voice recorder/reproducer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention (a) Industrial Application Field The present invention converts a recording signal obtained from a microphone into a digital signal and stores it in a semiconductor memory, and also converts the signal stored in the semiconductor memory during playback operation. The present invention relates to an audio recording and reproducing device that converts the audio into an analog signal after reading the audio and outputs the audio through a speaker.

(b) Prior Art Cassette tape recorders, which use magnetic tape and are called cassette tapes, have become popular as devices for recording and reproducing audio. Devices such as cassette tape recorders that use magnetic tape as a means of recording audio signals have the advantage of being able to perform long recording operations, but they are difficult to miniaturize. Since it requires a mechanism to drive the magnetic tape, there is a problem in that the failure rate is high. As an improved device in this respect, the audio signal is converted into a digital signal and stored in a semiconductor memory, and during playback operation, the signal stored in the semiconductor memory is read out, converted into an analog signal, and then emitted through a speaker. A technology has been developed based on this technology, for example, Utility Model Application No. 62-2.
There is one disclosed in Japanese Patent No. 2800.

(c) Problems to be Solved by the Invention The technology disclosed in the above-mentioned publication uses a semiconductor memory as a means for recording audio signals, which eliminates the need for a drive mechanism such as a tape recorder, and the device It has the advantage of being smaller and lowering the failure rate. However, this technique has a problem in that it takes time to search for necessary information because only recording and playback operations are performed. The present invention aims to provide an audio recording/playback device that is improved in this respect.

(d) Means for Solving the Problems The operation control circuit of the present invention is capable of controlling the ADPC during recording and playback operations.
An ADPCM analysis and synthesis circuit that performs speech analysis and speech synthesis using the M method, a writing operation of digital signals output from the ADPCM analysis and synthesis circuit to a semiconductor memory circuit, and an operation of reading signals stored in the semiconductor memory circuit. an address control circuit for controlling the address control circuit, a recording operation switch that is pressed and closed during a recording operation, a playback operation switch that is suppressed and opened during a playback operation, and an interlace playback operation switch that is pressed and closed during an interlace playback operation. , recording operation,
The ADPCM according to the playback operation and the interlaced playback operation.
It is composed of a control circuit that controls the operation of an analysis and synthesis circuit, a semiconductor memory circuit, and an address control circuit.

(e) Operation In the present invention, during the recording operation, the ADPCM analysis and synthesis circuit performs the voice analysis and synthesis processing operation and the storage operation in the semiconductor memory circuit is performed by dividing it into phrases of a predetermined time, and the interlace playback operation switch is pressed and closed. The playback operation is performed after skipping a predetermined number of phrases each time.

(F) Embodiment The circuit shown in FIG. 1 is an embodiment of the present invention, and FIG. 2 is a diagram for explaining the present invention in detail.

In the illustrated circuit, (1) is a microphone that converts an acoustic signal into an electrical signal, and (2) is the microphone (
1) is input with a recording signal that has been converted into an electrical signal and amplifies the signal; (3) is unnecessary as the recording signal amplified by the recording amplifier circuit (2) is input. This is a low-pass filter that blocks high-frequency signals. (4) is an A-D converter that converts the analog signal passed through the low-pass filter into a digital signal; (5) is an ADPCM analysis and synthesis circuit that performs digital processing using a method called adaptive differential pulse code modulation; (6) ) is the ADPCM analysis and synthesis circuit (5)
A D-A converter (7) converts the digital signal processed by the D-A converter (6) into an analog signal. A low-pass filter that blocks the signal, (8) a reproduction amplifier circuit that receives the reproduction signal that has passed through the low-pass filter (7) and amplifies the signal, and (9) a reproduction amplifier circuit that amplifies the signal. This is a speaker to which an amplified signal is applied and which emits the signal.

(10) is a control unit that controls the voice analysis operation and voice synthesis operation of the ADPCM analysis and synthesis circuit (5), and (11) is an external circuit that will be described later, and the control unit (10) and ADPC.
This is a data I10 buffer circuit that controls input/output operations of signals to/from the M analysis/synthesis circuit (5). In such a circuit, an A-D converter (4), an ADPCM analysis and synthesis circuit (
5), the D-A converter (6), the control unit (10), and the data 110 buffer circuit (11) constitute an audio processing circuit. Manufactured by Ki Kogyo Co., Ltd. (') L S I ' M S M 6258
” etc., and the details are omitted. (13) is a RAM which is a semiconductor memory that stores the digital signal output from the data I10 buffer circuit (11) constituting the audio processing circuit (Tsubo), and (14) is the RAM
(13) is an address control circuit that controls the write operation and read operation of signals to and (15) is a control circuit that controls the operations of the audio processing circuit (equipment), the RAM (13), and the address control circuit (14). be. (16) is a recording operation switch that is pressed and closed by the recording operation, and when the recording operation switch (16) is closed, the RAM (1)
3) is performed. (17) is a regeneration operation switch that is pressed and closed by the regeneration operation, and when the regeneration operation switch (17) is closed, the signal stored in the RAM (13) is read and reproduced. It will be done. (18) is a fast-forward operation switch that is pressed and closed by a fast-forward operation, and if it is falsely closed when it is in a stopped state, a fast-forward operation will be performed, and if it is closed while it is in a playback state, it will be in a closed state. The fast-forward playback operation is performed while the data is held at . (19) is a rewinding operation switch that is pressed and closed by the rewinding operation, and when it is closed when it is in the stopped state, the rewinding operation is performed, and when it is closed when it is in the playing state, it is opened. An unwinding and rewinding playback operation that is maintained in this state is performed.

(20) is an operation switch for skipping playback that is pressed and closed during the skipping playback operation, and when suppressed and opened when the playback or stop state is in progress, the playback starts after skipping a predetermined phrase in the opposite direction, as will be described later. is to be carried out. Reference numeral 21 denotes a stop operation switch that is pressed and closed during a stop operation, and is configured to switch to the stop state when it is closed in each operating state.

The present invention is constructed as described above, and its operation will be explained next. If the sampling frequency in the audio processing circuit (婬) is 8 KHz and the number of quantization bits is 4, the bit rate will be 32 bits/second, and RA゛M(13)
If the capacity is 16 Mbits, it can be stored for about 512 seconds. In the present invention, the speech analysis and synthesis process by the ADPCM analysis and synthesis circuit (5) and the write operation to the RAM (13) accompanying the process are performed in phrases every 250 milliseconds. That is, the analysis and synthesis operation by the ADPCM analysis and synthesis circuit (5) is started by a start signal output from the control unit (10) incorporated in the audio processing circuit (10), and after 250 milliseconds, the control unit (10) The audio analysis and synthesis operation is stopped by the stop signal output from the ADPCM analysis and synthesis circuit (5) during the aforementioned 250 milliseconds when writing the signal to the RAM (13), that is, during the recording operation. The signal is output to the RAM (13) through the data I10 buffer circuit (11) and is also output to the address control circuit (11).
14), the data is written into the RAM (13) while the address is specified. Also, RAM(1
3), during the readout operation of the signal from the ADPCM analysis/synthesis circuit (
The signal synthesized by 5) is sent to a D-A converter (6).
is input and converted into an analog signal. The control operation of the RAM (13) is performed by the audio processing circuit (12) and the address control circuit (14) in this way.Next, each operation in this embodiment will be explained with reference to FIG.

When the user performs a recording operation, power is supplied to the recording amplifier circuit (2), the recording operation switch (16) is pressed and closed, and the control circuit (15) performs a control operation for recording. A recording signal converted into an electric signal by a microphone (1) is input to a recording amplifier circuit (2), amplified, and then input to an audio processing circuit (婬) through a low-pass filter (3). The audio processing circuit (
The recorded signal that has been input into the input device (4) is converted into a digital signal by the A-D converter (4), and the analysis operation by the ADPCM analysis and synthesis circuit (5) is performed as described above.
It takes place every millisecond. The signal analyzed and processed by the ADPCM analysis and synthesis circuit <5) is data I10.
It is output to the RAM (13) through the buffer circuit (11) and is output to the RAM (13) by the control operation of the address control circuit (14).
(13) is written. While the recording operation is being performed, the above-mentioned analysis operation by the ADPCM analysis and synthesis circuit (5) and writing operation to the RAM (13) are repeated until a stop operation is performed or the capacity of the RAM (13) is exhausted. It will be done. Figure 2 (a) explains such a recording operation, and the signal that has been subjected to voice analysis processing using the ADPCM method is divided into phrases (1), (2).
, (3)... and save it to RAM (13
) is written. The analysis operation by the ADPCM analysis and synthesis circuit (5) starts at point (A) of each phrase, and stops at point (B), but the period between (A) and (B) is 25
It is 0 milliseconds. Although the recording operation is performed in this manner, the reproduction operation will be explained next. When the regeneration operation is performed, power is supplied to the regeneration amplifier circuit (8), and the regeneration operation switch (17) is pressed to close the control circuit (15).
A control operation for playback is performed. RAM (1
3) is sent to the address control circuit (14).
) is read out by the control operation by
The signal is input to the ADPCM analysis and synthesis circuit (5) through the zero buffer circuit (11). The ADPCM analysis and synthesis circuit (
The digital signals inputted into the ADPCM analysis/synthesis circuit (5) are synthesized for 250 milliseconds each and then applied to the DA converter (6) where they are converted into analog signals. The signal converted into an analog signal by the DA converter (6) passes through a low-pass filter (7) and is input to a reproduction amplifier circuit (8) where it is amplified and then emitted by a speaker (9). While the reproduction operation is being performed, the read operation from the RAM (13) and the synthesis operation by the ADPCM analysis and synthesis circuit (5) are continued until a stop operation is performed or the signal written in the RAM (13) is This will be repeated until it runs out.

FIG. 2(b) shows such a playback operation, and shows the phrases (1), (
2), (3)..., the ADPCM analysis and synthesis circuit (5) performs the speech synthesis processing operation and performs the reproduction operation. ADPCM at point (A) of each phrase
The synthesis operation by the analysis and synthesis circuit (5>) is started, and (B)
The synthesis operation stops at the point, but the distance between (A) and (B) is 2.
It is 50 milliseconds.

Recording and reproducing operations are performed as described above, but the operation sequence when fast forwarding and rewinding operations are performed while in the reproducing operation state will now be explained. If you perform a fast-forward operation while in the playback mode, the fast-forward operation switch (18
) is pressed to close, and while the fast-forward operation switch (18) is closed, the fast-forward playback operation state is entered. When the fast-forward playback operation state is reached, the control circuit (15) performs the readout operation of the signal from the RAM (13) and the synthesis operation by the ADPCM analysis and synthesis circuit (5) as shown in FIG. 2(C). It is done. As is clear from the figure, only the beginning portions (A) to (C) of each phrase analyzed during the recording operation are read out and synthesized, and the sound is emitted from the speaker (9). This way (A) ~
If the interval (C) is set to 174, or 62.5 milliseconds, between each phrase (A) and (B), the tape will be played back at four times the speed compared to the playback operation described above. Unlike a recorder, the frequency of the signal emitted from the speaker (9) does not become high, so the reproduced signal can be heard, albeit in fragments. In this way, when in the playback mode, press the fast forward operation switch (1).
When 8) is pressed and closed, it is possible to perform a cue operation in a tape recorder, which performs a playback operation while performing a fast forward operation. Then, when the fast-forward operation switch (18) is released from the press, the above-mentioned playback operation state is entered, and all of the phrases (A> to (B)) are read out and synthesized. The operation will be performed if you perform the fast forward operation while in the playback mode, but next we will explain the operation when you perform the rewind operation.When you perform the rewind operation while in the playback mode, the rewind operation switch (19) is pressed closed and the rewinding operation switch (19) is closed to enter the open rewinding and reproducing operating state.When the rewinding and reproducing operating state is entered, the control circuit (15) controls the operation. RAM (13
) and the synthesis operation by the ADPCM analysis and synthesis circuit (5) are performed as shown in FIG. 2(d). As is clear from the figure, only the beginning parts (A) to (C) of each phrase that have been analyzed during the recording operation are verified and synthesized, and the sound is emitted from the speaker (9). The read operation is in the opposite direction to the direction during the recording operation. If the period between (A) and (C) is set to 174 or 62.5 milliseconds between each phrase (A) and (B), the rewinding speed will be four times faster than that during the above-mentioned playback operation. However, unlike a tape recorder, the frequency of the signal emitted from the speaker (9) does not become high, and it is emitted as words, so it is difficult to hear the reproduced signal, albeit in fragments. I can do it. In this manner, when the rewind operation switch (19) is pressed and closed during the playback operation state, it is possible to perform a review operation in the tape recorder in which the playback operation is performed while rewinding the tape recorder. Then, when the rewinding operation switch (19) is pressed and closed, the above-mentioned playback operation state is entered, and all of the phrases (A) to (
The reading and combining processing operations between B) are performed. As described above, when the rewinding operation is performed while in the reproducing operation state, the operation is performed.

As described above, operations are performed when fast forwarding and rewinding operations are performed while in the playback operating state.Next, operations when fast forwarding and rewinding operations are performed while in the stopped state will be described. If a fast-forward operation is performed while in the stopped state, the fast-forward operation switch (18) is closed and power is supplied to the reproduction amplifier circuit (8).

When the fast-forward operation switch (18) is closed, the control circuit (15) performs a control operation to read out signals from the RAM (13) and perform the AIIICM analysis and synthesis circuit (
5> is performed as shown in FIG. 2(e). As is clear from the figure, after synthesis processing is performed between the beginning parts (A) to (C) of phrase (1) that have been analyzed during recording, the beginning parts (A) to (C) of phrase (4) are performed. )
Synthesis processing between the beginning parts (A) to (C) of phrase (7) is performed, and the synthesis processing between the beginning parts (A) to (C) of phrase (7) is performed.
9) The sound is emitted from If the period between (A) and (C) is set to 174 or 62.5 milliseconds between each phrase, that is, between (A) and (B), the beginning part will be played back while skipping between the two phrases, as described above. The data will be played back at a speed 12 times faster than during the playback operation. Also in this case, unlike a tape recorder, a speaker (
9) Since the frequency of the emitted signal does not become higher, the reproduced signal can be heard, albeit in fragments. As described above, the operation is performed when the fast forward operation is performed from the stopped state, but next, the operation when the rewind operation is performed will be explained. If a rewinding operation is performed in the stopped state, the rewinding operation switch (19) is closed and power is supplied to the reproducing amplifier circuit (8). When the rewind operation switch (19) is closed, RAM (1
The reading operation of the signal from 3) and the synthesis operation by the ADPCM analysis and synthesis circuit (5) are performed as shown in FIG. 2(f). As is clear from the figure, after the beginning part (A) to (C) of phrase (8) which has been analyzed during recording operation has been synthesized, the beginning part (A) to (C) of phrase (5) is completed.
Synthesis processing between phrase (A) and (C) is performed, and further synthesis processing between the beginning portions (A) to (C) of phrase (2) is performed, and the sound is emitted from the speaker (9). If the period between (A) and (C) is set to 174 or 62.5 milliseconds between each phrase, that is, between (A) and (B), the beginning part will be played back while skipping between the two phrases, as described above. The video is played back while being rewound at a speed 12 times faster than during the playback operation. In this case as well, unlike a tape recorder, not only does the frequency of the signal emitted from the speaker (9) not become high, but it is also emitted as words, making it difficult to hear the reproduced signal, albeit in fragments. I can do it. As described above, each operation is performed when fast forwarding and rewinding operations are performed from the stopped state, but if the stop operation switch (21) is pressed and closed while in each operating state, the switch to the stopped state is made. I can do it.

As described above, each operation in this embodiment is performed, but
Next, the operation when an interlaced playback operation is performed will be explained. When the interlaced playback operation switch (20) is pressed and closed, the control circuit (15) performs a control operation to read signals from the RAM (13) and perform ADPCM.
The synthesis operation by the analysis and synthesis circuit (5) is performed as shown in FIG. 2(g).

That is, phrases (120) and (121) are reproduced by the playback operation.
) is played back, and when phrase (122) is being played back, if the skip playback operation switch (20) is pressed and closed, the playback is instantly rewound by 120 frames and the phrase (2) is played back. The playback operation starts. When in the playback mode, press the skip playback operation switch (
20) is pressed and closed, the 250 millisecond phrase is skipped in the reverse direction by 120 phrases, so each time the playback operation switch (20) is closed, the playback operation is instantaneously reversed by 30 seconds. will be carried out. In this way, when the skip playback operation switch (20) is closed during the playback operation state, the operation is performed.
When in the stopped state, press the corresponding skip playback operation switch (
20) is also closed.

Therefore, if you press and close the previous 2 skip playback operation switch (20) after canceling the recording operation by stopping the recording operation, the playback operation will start in reverse for 30 seconds, so you can check and play back the recorded content. I can do it.

Note that the recording and playback time can be increased by increasing the capacity of RAM (13) or by setting the sampling frequency low. Furthermore, if the RAM (13) is built into a container called an IC card and the IC card (RAM 13) is made replaceable, it can be used as a recording means in place of a tape recorder even if the RAM (413) has a small capacity. . The analysis and synthesis time during recording and playback operations was set to 250 milliseconds, and the synthesis time during fast-forward playback, rewind playback, and fast-forward and rewind operations was set to 62.5 milliseconds, but the times are not limited. . Furthermore, when the skip playback operation is performed, the skip is made to skip 120 phrases at a time, but the number is not limited.Also, the skip playback operation was made to skip in the reverse direction, but it is now possible to skip in the forward direction. You can also do it.

(G) Effects of the Invention The operation control circuit of the present invention converts a recording signal obtained from a microphone into a digital signal and stores it in a semiconductor memory circuit, and also reads out the signal stored in the semiconductor memory circuit during playback operation. In a voice recording and playback device configured to convert the signal into an analog signal and emit the sound through a speaker, during the recording operation, the ADPCM analysis and synthesis circuit performs voice analysis and synthesis processing and the storage operation in the semiconductor memory circuit is performed as a phrase for a predetermined period of time. In addition, each time the skip playback operation switch is suppressed and closed, the playback operation is performed after skipping over a predetermined number of phrases. In other words, unlike a tape recorder, the playback position changes instantaneously. This is very useful when you want to listen again to information that you have already heard.

[Brief explanation of the drawing]

The circuit shown in FIG. 1 is an embodiment of the present invention, and FIG. 2 is a diagram for explaining the present invention in detail. Explanation of main drawing numbers (1)... Microphone, (2)... Recording amplifier circuit, (5)... ADPCM analysis and synthesis circuit, (8)
... reproduction amplifier circuit, (9) ... speaker,
(12)...Audio processing circuit, (13>...RA
M, (14)...address control circuit, (15)
...control circuit, (16)...recording operation switch, (17)...playback operation switch, (2o)...
...Operation switch for skipping playback.

Claims (1)

[Claims] (1) Convert the recording signal obtained from the microphone into a digital signal and store it in a semiconductor memory circuit, and during playback operation, read out the signal stored in the semiconductor memory circuit, convert it into an analog signal, and emit it through a speaker. In a voice recording and playback device configured to produce sound, an ADPCM analysis and synthesis circuit that performs voice analysis and voice synthesis using an ADPCM method during recording and playback operations;
an address control circuit for controlling the writing operation of the digital signal output from the analysis and synthesis circuit to the semiconductor memory circuit and the reading operation of the signal stored in the semiconductor memory circuit; and a recording circuit that is pressed and closed during a recording operation. an operation switch, a playback operation switch that is pressed and closed during a playback operation, an interlace playback operation switch that is pressed and closed during an interlace playback operation, and the ADPCM analysis and synthesis according to the recording operation, playback operation, and interlace playback operation. It consists of a control circuit that controls the operation of a circuit, a semiconductor memory circuit, and an address control circuit, and during recording operation, the ADPCM analysis and synthesis circuit performs audio analysis and synthesis processing operations and storage operations in the semiconductor memory circuit are performed by dividing them into phrases of a predetermined time. An operation control circuit for a voice recording/playback device, characterized in that the playback operation is performed after skipping a predetermined number of phrases each time the skip playback operation switch is pressed and closed.