JPS63182913A - Driving circuit for field effect transistor - Google Patents

Driving circuit for field effect transistor

Info

Publication number
JPS63182913A
JPS63182913A JP62014336A JP1433687A JPS63182913A JP S63182913 A JPS63182913 A JP S63182913A JP 62014336 A JP62014336 A JP 62014336A JP 1433687 A JP1433687 A JP 1433687A JP S63182913 A JPS63182913 A JP S63182913A
Authority
JP
Japan
Prior art keywords
capacitor
transistor
field effect
effect transistor
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62014336A
Other languages
Japanese (ja)
Inventor
Hirobumi Endo
遠藤 博文
Hidetoshi Matsumoto
英俊 松本
Yutaka Nozaki
豊 野崎
Koji Omori
浩二 大盛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP62014336A priority Critical patent/JPS63182913A/en
Publication of JPS63182913A publication Critical patent/JPS63182913A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/06Modifications for ensuring a fully conducting state

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  • Logic Circuits (AREA)

Abstract

PURPOSE:To reduce the current drive capability of a transistor (TR) and to decrease the heat and current consumption of a boosting circuit by using a current source for a component deciding its charge mobility in moving an electric charge charged in the 1st capacitor into the 2nd capacitor at its discharge. CONSTITUTION:A current source 15 is used for a component deciding the mobility of an electric charge from a capacitor C1 to C2 in the boosting circuit and a voltage VF extracted at a connecting point F is fed to a gate of a field effect transistor FET. When a transistor (TR) Q1 is switched by a B signal of a square wave oscillator 1 and the TR Q1 is turned on, the potential at a connecting point C is decreased up to the GND level and the capacitor C1 is charged. When the TR Q1 is turned off, the potential at the connecting point C is increased up to a potential at a connecting point D and the capacitor C2 is boosted to a voltage higher than the power voltage VD. Since the same current continues flow from the IS to the capacitor C2 in this way, the current source IS is set small to reduce the current consumption and heat.

Description

【発明の詳細な説明】 (イ)発明の分野 この発明は、電界効果トランジスタを昇圧回路を用いて
駆動する回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of the Invention The present invention relates to a circuit for driving a field effect transistor using a booster circuit.

(ロ)発明の背景 上記電界効果トランジスタの駆動回路は従来第3図のよ
うに構成されていた。
(b) Background of the Invention A drive circuit for the above-mentioned field effect transistor has conventionally been constructed as shown in FIG.

即ち、昇圧回路の入力端子Bに、弛張発振器で作成した
第2図Bの如き矩形波信号が入力されると、トランジス
タQ1がONL、接続点Cの電位が下がっ−Cコンデン
サC1がバッテリ1の電源電圧VDによりダイオードD
1を介し充電される。
That is, when a rectangular wave signal as shown in FIG. 2B generated by a relaxation oscillator is input to the input terminal B of the booster circuit, the transistor Q1 turns ON, and the potential at the connection point C decreases. Diode D due to power supply voltage VD
1.

次に、トランジスタQ1がOFF覆ることによって0点
の電位がD点の電位まであがり、コンデンサC2に充電
された電荷が放電され、コンデンサC2は電源電圧VD
より高い電圧に充゛電され、これに伴って接続点E、F
の電位も電源電圧VDの分だけ昇圧され、コンデンサC
2に昇圧された電圧VFは電源電圧VDの2倍の電圧ど
なって、高いゲート電圧が要求される電界効果トランジ
スタのゲートに印加される。
Next, by turning OFF the transistor Q1, the potential at the 0 point rises to the potential at the D point, the charge stored in the capacitor C2 is discharged, and the capacitor C2 is connected to the power supply voltage VD.
It is charged to a higher voltage, and connection points E and F are connected accordingly.
The potential of the capacitor C is also boosted by the amount of the power supply voltage VD, and the potential of the capacitor C
The voltage VF boosted to 2 is twice the power supply voltage VD and is applied to the gate of a field effect transistor that requires a high gate voltage.

しかるに、コンデンサC1からC2への゛電荷の移動の
能力が、上記回路では抵抗R1によって決定されるため
、該能力を大きくするために抵抗R1の値を小さくせね
ばならず、 O消費電流が大きくなり、発熱量が増大する。
However, in the above circuit, the ability to transfer charge from capacitor C1 to C2 is determined by resistor R1, so in order to increase the ability, the value of resistor R1 must be reduced, resulting in a large current consumption. The amount of heat generated increases.

OトランジスタQ1に電流駆動能力の大きいトランジス
タを使用する必要がある。
It is necessary to use a transistor with a large current driving capability as the O transistor Q1.

といった問題を生じていた。This caused problems such as:

(ハ)発明の目的 この発明は、コンデンサの電荷移動用の抵抗に代え、電
流源を使用することによりt記問題を解消する電界効果
トランジスの駆動回路の提供を目的とする。
(C) Purpose of the Invention The object of the present invention is to provide a field effect transistor drive circuit that solves the problem described in t by using a current source in place of a resistor for transferring charges in a capacitor.

(ニ)発明の構成 この発明は、第・1のコンデンサに充電した電荷をその
放電時に第2のコンデンサに移動さけるにあたり、その
電荷移動能力を決定する素子に電流源を用いた電界効果
トランジスタの駆動回路であることを特徴とする。
(D) Structure of the Invention This invention provides a field effect transistor that uses a current source as an element that determines the charge transfer ability of a first capacitor in order to avoid transferring the charge charged in a first capacitor to a second capacitor during discharge. It is characterized by being a drive circuit.

(ホ)発明の作用 この発明によれば、第1のコンデンサの電荷がトランジ
スタのOFF動作によって第2のコンデンサに移動され
る時、その移動能力を電流源で決めるようにしたから、
移動時には抵抗値に作用されずに電流が流れるようにな
り、電流源の値を小さく設定できる。
(E) Effect of the Invention According to this invention, when the electric charge of the first capacitor is transferred to the second capacitor by the OFF operation of the transistor, the transfer ability is determined by the current source.
During movement, current flows without being affected by the resistance value, and the value of the current source can be set small.

(へ)発明の効果 従って、 0従来回路に比べ、昇圧回路の消費電流が少なくなり、
発熱の問題もなくなる。
(f) Effects of the invention Therefore, compared to the conventional circuit, the current consumption of the booster circuit is reduced,
There will be no problem with heat generation.

Oトランジスタの電流駆動能力が少なくて済む。The current driving capability of the O transistor can be reduced.

O抵抗の温度特性に依存しないため、昇圧電圧値の温度
特性を小さくできる。
Since it does not depend on the temperature characteristics of the O resistance, the temperature characteristics of the boosted voltage value can be made small.

等の効果を奏することができる。It is possible to achieve the following effects.

(ト)発明の実施例 以下この発明の一実施例を図面を用いて説明する。(g) Examples of the invention An embodiment of the present invention will be described below with reference to the drawings.

第1図の回路において、破線で囲む回路部分は、トラン
ジスタQ1のON・OFFスイッチングを司るための方
形波発振器2を構成しており、オペアンプOPIの出力
端から抵抗Rt1 、Rt2、およびコンデンサCtか
らなる時定数回路によりオペアンプ非反転入力にフィー
ドバックをか【プで、基準電圧から方形波信号(第2図
のC)を作成し、これを昇圧回路のトランジスタQ1の
ベース、即ち、入力端子Bに印加している。尚、第2図
は第1国名部の信号波形を示している。
In the circuit shown in Fig. 1, the circuit portion surrounded by the broken line constitutes a square wave oscillator 2 for controlling ON/OFF switching of the transistor Q1, and connects the output end of the operational amplifier OPI to the resistors Rt1, Rt2, and the capacitor Ct. A square wave signal (C in Figure 2) is created from the reference voltage by applying feedback to the non-inverting input of the operational amplifier using a time constant circuit, and this is applied to the base of transistor Q1 of the booster circuit, that is, input terminal B is being applied. Incidentally, FIG. 2 shows the signal waveform of the first country name part.

また、昇圧回路ではコンデンサC1から02へ電荷を移
動させる能力を決定する素子として第3図従来回路の抵
抗R1に代えて電流源ISを用いると共に、接続点Fで
取出した電圧VFを電界効果トランジスタF E Tの
ゲートに印加するようになされいている。
In addition, in the booster circuit, a current source IS is used in place of the resistor R1 in the conventional circuit shown in FIG. The voltage is applied to the gate of FET.

抵抗RFは電界効果トランジスタFETを駆動するため
の負荷抵抗、Q2は電界効果トランジスタFETをスイ
ッチングさせるためのブリドライバー用トランジスタで
ある。
The resistor RF is a load resistor for driving the field effect transistor FET, and Q2 is a bridriver transistor for switching the field effect transistor FET.

次に昇圧動作を説明すると、トランジスタQ1が方形波
発振器1の第2図8信号にてスイッチングされる時、該
トランジスタQ1がONすると、接続点Cの電位は第2
図Cによって明らかなようにGNDまで下がり、ダイオ
ードD1を介しコンデンサC1が充電される。
Next, to explain the step-up operation, when the transistor Q1 is switched by the signal shown in FIG.
As is clear from Figure C, the voltage drops to GND, and the capacitor C1 is charged via the diode D1.

次に、トランジスタQ1が0F−Fすると、接続点Cの
電位は接続点りの電位まで上がり、コンデンサC1に充
電された電荷が電流源IS→コンデンサC1→ダイオー
ドD2→コンデンサC2の経路で移動し、コンデンサC
2は電源電圧VDより高い電圧に昇圧される。−例とし
て、この電源電圧ybに7.2■のバッテリー1が使用
されたとすると、コンデンサC2に昇圧された電圧Fは
約11.5Vとなる。
Next, when the transistor Q1 goes 0F-F, the potential at the connection point C rises to the potential at the connection point, and the charge charged in the capacitor C1 moves along the path of current source IS → capacitor C1 → diode D2 → capacitor C2. , capacitor C
2 is boosted to a voltage higher than the power supply voltage VD. - As an example, if a 7.2-inch battery 1 is used as the power supply voltage yb, the voltage F boosted by the capacitor C2 will be approximately 11.5V.

一方、負荷抵抗RFの消費電流発生のため、トランジス
タQ1がONしている間、電圧VFの値は下がるが、第
3図に示すように該トランジスタQ1を早い周期で連続
的にスイッチングさせれば、電圧VFは常に昇圧電圧値
11.5V近傍に維持されるから、電界効果トランジス
タFETを駆動できる電圧に保持される。
On the other hand, due to the current consumption of the load resistor RF, the value of the voltage VF decreases while the transistor Q1 is ON, but if the transistor Q1 is continuously switched at a fast cycle as shown in FIG. Since the voltage VF is always maintained near the boosted voltage value of 11.5V, it is maintained at a voltage that can drive the field effect transistor FET.

従って、ブリドライバー用トランジスタQ2をONさせ
れば、接続点Gの電位はGNDまで下がり、電界効果ト
ランジスタFETにはゲート電圧が与えられなくなって
OFFするが、トランジスタQ2をONするとゲート電
圧が与えられて電界効果トランジスタFETがONする
ので、トランジスタQ2のON・OFF駆動で電界効果
トランジスタFETをスイッチングできるに至る。
Therefore, when transistor Q2 for the driver is turned on, the potential at the connection point G drops to GND, and gate voltage is no longer applied to the field effect transistor FET, turning it off.However, when transistor Q2 is turned on, gate voltage is applied to field effect transistor FET. Since the field effect transistor FET is turned on, the field effect transistor FET can be switched by turning ON/OFF the transistor Q2.

このように電源電圧VDをIL5Vのような電圧VFに
まで昇圧して電界効果トランジスタFETのベースに印
加させるにあたり、上記昇圧のためコンデンサC1の電
荷をコンデン1すC2に移動させる能力を決定する素子
として電流源Isを用いるから、接続点Cの電荷の変化
に依存せず同じ電流がIsからコンデンサC1、ダイオ
ードD1を経てコンデンサC2に流れ続け、故に電流源
Isの値を小さく設定し、消費電流の低下、発熱の抑制
を期待できる。
In this way, when boosting the power supply voltage VD to a voltage VF such as IL5V and applying it to the base of the field effect transistor FET, an element that determines the ability to transfer the charge of the capacitor C1 to the capacitor C2 for the above boosting is used. Since the current source Is is used as the current source Is, the same current continues to flow from Is to the capacitor C2 via the capacitor C1 and diode D1 without depending on the change in the charge at the connection point C. Therefore, the value of the current source Is is set small to reduce the current consumption. It can be expected to reduce the temperature and suppress heat generation.

【図面の簡単な説明】[Brief explanation of the drawing]

図面はこの発明の一実施例を示し、 第1図は電界効果トランジスタの駆動回路図、第2図は
第1重合部の信号波形図、 第3図は従来回路の要部回路図である。 Ql、C2・・・トランジスタ FET・・・電界効果トランジスタ C1、C2・・・コンデンサ Is・・・電流源
The drawings show an embodiment of the present invention; FIG. 1 is a driving circuit diagram of a field effect transistor, FIG. 2 is a signal waveform diagram of a first overlapping section, and FIG. 3 is a circuit diagram of a main part of a conventional circuit. Ql, C2...Transistor FET...Field effect transistor C1, C2...Capacitor Is...Current source

Claims (1)

【特許請求の範囲】 1、トランジスタのON・OFFスイッチングにより第
1のコンデンサを充放電させ、そ の電荷を第2のコンデンサに移動させて、 電源電圧よりも高い電圧を電界効果トラン ジスタのゲートに印加する昇圧回路を有す る回路であつて、 上記第1のコンデンサから第2のコンデン サへの電荷移動能力を決定する素子に電流 源を用いた 電界効果トランジスタの駆動回路。
[Claims] 1. Charge and discharge the first capacitor by ON/OFF switching of the transistor, transfer the charge to the second capacitor, and apply a voltage higher than the power supply voltage to the gate of the field effect transistor. A driving circuit for a field effect transistor, the circuit having a step-up circuit that uses a current source as an element that determines charge transfer ability from the first capacitor to the second capacitor.
JP62014336A 1987-01-23 1987-01-23 Driving circuit for field effect transistor Pending JPS63182913A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62014336A JPS63182913A (en) 1987-01-23 1987-01-23 Driving circuit for field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62014336A JPS63182913A (en) 1987-01-23 1987-01-23 Driving circuit for field effect transistor

Publications (1)

Publication Number Publication Date
JPS63182913A true JPS63182913A (en) 1988-07-28

Family

ID=11858224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62014336A Pending JPS63182913A (en) 1987-01-23 1987-01-23 Driving circuit for field effect transistor

Country Status (1)

Country Link
JP (1) JPS63182913A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4965696A (en) * 1988-10-27 1990-10-23 Siemens Aktiengesellschaft Voltage doubling driving circuit for controlling a field effect transistor having a source load
US4994694A (en) * 1989-08-23 1991-02-19 Tektronix, Inc. Complementary composite PNP transistor
JPH065221U (en) * 1992-06-18 1994-01-21 シャープ株式会社 Power MOSFET drive circuit
US5283478A (en) * 1990-12-28 1994-02-01 Sgs-Thomson Microelectronics, S.R.L. Fast capacitive-load driving circuit particularly memories

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6113594A (en) * 1984-06-27 1986-01-21 ホ−ヤ株式会社 Method of sealing thin film el element
JPS61210596A (en) * 1985-03-15 1986-09-18 Hitachi Ltd Magnetic bubble memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6113594A (en) * 1984-06-27 1986-01-21 ホ−ヤ株式会社 Method of sealing thin film el element
JPS61210596A (en) * 1985-03-15 1986-09-18 Hitachi Ltd Magnetic bubble memory device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4965696A (en) * 1988-10-27 1990-10-23 Siemens Aktiengesellschaft Voltage doubling driving circuit for controlling a field effect transistor having a source load
US4994694A (en) * 1989-08-23 1991-02-19 Tektronix, Inc. Complementary composite PNP transistor
US5283478A (en) * 1990-12-28 1994-02-01 Sgs-Thomson Microelectronics, S.R.L. Fast capacitive-load driving circuit particularly memories
JPH065221U (en) * 1992-06-18 1994-01-21 シャープ株式会社 Power MOSFET drive circuit

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