JPS6318149B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a low power consumption drive system for a step motor of an analog display type electronic timepiece. Conventionally, the display mechanism of a commonly used analog display type quartz watch is constructed as shown in FIG. The output of the motor, which is composed of the stator 1, coil 7, and rotor 6, is transmitted to the gear trains 2, 3, 4, and 5. hour hand,
In some cases, it drives a display mechanism such as a calendar. Next, FIG. 2 shows an example of the circuit configuration of a conventionally used electronic wristwatch. The oscillation signal of the oscillation circuit 10 is sequentially frequency-divided by the frequency divider circuit 11. These frequency-divided signals are processed by the pulse synthesis circuit 12 into two signals with a pulse width of 7.8 msec, a period of 2 seconds, and a phase difference of 1 second.
drive inverters 13a, 1.
As a result of being applied to the inputs 15 and 16 of the coil 7, a reversal pulse is applied to the coil 7 in which the direction of current flow changes every second, and the rotor 6, which is magnetized to two poles, sequentially rotates by 180 degrees. An example of the coil current waveform at this time is shown in FIG. By the way, the drive pulse width (7.8 msec in the above example), coil resistance, number of coil turns, and
The dimensions of each part of the step motor should be adjusted in all situations that the electronic wristwatch is expected to encounter, i.e., when the gear train load becomes heavy due to calendar events, when it is placed in a magnetic field, and when the internal resistance of the battery becomes significant at low temperatures. It is designed to be able to drive the step motor stably even when the battery voltage increases, or when the battery voltage drops at the end of the battery life.As a result, even though a large output torque is not normally required, the This was a major hindrance to lowering the power consumption of watches as a whole. The present invention was proposed in order to eliminate the above-mentioned drawbacks of the prior art, and it supplies the step motor with pulses of the minimum pulse width commensurate with the current load condition of the step motor. This aims to reduce the Hereinafter, before explaining the present invention in detail, an example of the operation according to the present invention will be briefly explained using FIGS. 4a, b, and c. The drive pulse for the step motor used in the electronic timepiece of the present invention is composed of two types of pulses: a normal drive pulse and a corrected drive pulse. The order of pulses supplied to the step motor is the normal drive pulse and the correction drive pulse, but the correction drive pulse is the normal drive pulse and the step motor is
As a general rule, it is supplied when rotation is not possible.
Then, when the corrected drive pulse is supplied to the step motor, since it was not possible to rotate with the normal drive pulse, the pulse width of the next normal drive pulse is lengthened by a predetermined amount to make it easier to rotate. On the other hand, if the step motor can be rotated several steps with only the normal drive pulse, the pulse width of the normal drive pulse is shortened by a predetermined amount. By the above operation, the pulse width of the normal drive pulse _P1 becomes approximately the minimum pulse width that can drive the step motor in the current state, and therefore the power consumption becomes approximately the minimum. For example, as shown in FIG. 4a, the pulse width of _P1 , which is currently 3.9 msec, is shortened to 3.4 msec by the operation described in the second term above. Assume that the step motor can further rotate in this state. Next, after rotating several steps at 3.4 msec, the pulse width of _P1 is set to 2.9 msec by the above operation again. If the step motor is unable to rotate in this state, the non-rotation of the rotor is detected by the operation described in item 1 above, and a correction drive pulse _P2 is immediately applied, thereby changing the pulse width of _P1 from the next step onward. is set to 3.4msec. Thereafter, the normal drive pulse width of 3.4 msec is maintained while repeating the above operation. If for some reason this step motor becomes unable to rotate within the normal drive pulse width of 3.4 msec, the non-rotation of the rotor will be detected by rotor motion detection as shown in Figure 4b, and The normal drive pulse width from the next step onwards is set to 3.9 msec. After that, if there is room for rotation again, as shown in Figure 4c, after normal driving for several steps at 3.9 msec, the above-mentioned second
The normal drive pulse width is set to 3.4 msec by the operation in section 2. The outline of the operation of the present invention has been described above, and next, the principle of rotor operation detection, which is an important element of the present invention, will be explained. As a method of detecting rotor motion, it is possible to use a mechanical switch or an external element such as a Hall element, but it is difficult to install these mechanisms in an extremely small volume such as an electronic wristwatch. . Below, we will explain two different types of motion detection principles as an example of rotor motion detection in which a detection circuit can be realized in the same integrated circuit along with oscillation, frequency division, drive circuits, etc. without requiring external elements. conduct. The first method utilizes the fact that when an integrated stator is used, the drive current waveform varies depending on the position of the rotor. Fig. 5 shows an integrated stator connected by a saturable magnetic path 17 made to be easily saturated, and although not clearly shown in the figure, it is magnetically engaged with a magnetic core around which a coil 7 is wound. . This stator also has a rotor 6 which is magnetized into two poles in the radial direction.
A notch 18 is provided to determine the direction of rotation. Figure 5 shows the state immediately after a current is applied to the coil 7, and when no current is applied to the coil 7, the rotor 6 is rotated so that the angle between the notch 18 and the rotor magnetic pole is approximately 90 degrees. stationary in position. In this state, when a current is passed through the coil 7 in the direction of the arrow, magnetic poles are formed in the stator 1 as shown in FIG. 5, and the rotor 6 is repelled and rotates clockwise.
When the current flowing through the coil 7 is cut off, the rotor 6
It comes to rest with the magnetic poles reversed as shown in Figure 5. Thereafter, by applying current to the coil 7 in the opposite direction, the rotor 6 sequentially continues to rotate clockwise. In a step motor constructed of an integral stator having the saturable portion 17 as described above, the current waveform when current is passed through the coil 7 has a gentle rising portion as shown in FIG. This is because the magnetic resistance of the magnetic circuit seen from the coil 7 is very low until the saturable part 17 of the stator 1 becomes saturated, and as a result, the resistance R and the time constant τ of the coil series circuit become large. be. This can be expressed as a formula as follows. τ=L/R L≒N ² /Rm From now on τ=N ² /
(R×Rm) where L: inductance of the coil 7, N: number of turns of the coil 7, and Rm: magnetic resistance. When the saturable part 17 of the stator 1 becomes saturated, the magnetic permeability of the saturated part becomes the same as that of air, so Rm increases, the time constant τ of the circuit becomes smaller, and the current waveform becomes as shown in Figure 3. , stand up suddenly. Furthermore, since this saturation time is also affected by the state of magnetization of the motor, the higher the current level at the time of pulse interruption, the longer the saturation time becomes. Therefore, after supplying the corrected drive pulse to the step motor, the saturation time becomes longer.
It is preferable to supply a degaussing pulse to the step motor to cancel this effect. The operation of the rotor in this example is detected as a difference in the time constant of the resistor-coil series circuit after driving with normal pulses. Next, the reason for the difference in time constant will be explained using drawings. FIG. 6 shows the state of the magnetic field when current begins to flow through the coil 7, and the rotor 6 has magnetic poles at positions where it can rotate. The magnetic flux lines 20 show the state of the magnetic flux generated from the rotor 6, and although there is actually magnetic flux that interlinks with the coil 7, it is omitted here. The magnetic flux lines 20a and 20b are oriented in the direction of the arrow in FIG. 6 in the saturable parts 17a, 17b of the stator 1. In many cases, the saturable portion 17 is not yet saturated. In this state, current is applied to the coil 7 as shown by the arrow in order to rotate the rotor 6 clockwise. Since the magnetic fluxes 19a and 19b generated by the coil 7 strengthen each other with the magnetic fluxes 20a and 20b generated from the rotor 6 in the saturable parts 17a and 17b of the stator 1, the saturable part 17 of the stator 1 is quickly saturated. . After this, magnetic flux sufficient to rotate the rotor 6 is generated in the rotor 6, but this is not shown in FIG. FIG. 8 22 shows the waveform of the current flowing through the coil at this time. On the other hand, FIG. 7 shows the state of the magnetic flux when a current is applied to the coil 7 where the rotor 6 cannot rotate for some reason and has returned to its original position. Originally, in order to rotate the rotor 6, a current must be passed through the coil 7 in the opposite direction to the arrow, that is, in the same direction as shown in Figure 6. Since a reversal current that changes the direction of the current is applied to the rotor 6, such a state occurs when the rotor 6 cannot rotate. Since the rotor 6 could not rotate,
The direction of the magnetic flux generated from the rotor 6 is the same as in FIG. Since current flows through the coil 7 in the opposite direction to that shown in FIG. 6, the directions of magnetic flux are as shown in 21a and 21b. Saturable parts 17a, 17 of stator 1
In b, the magnetic fluxes generated by the rotor 6 and the coil 7 cancel each other out, and a longer time is required to saturate the saturable portion of the stator 1. This state is shown in FIG. 8, 23. An example of rotor position detection means that utilizes the above phenomenon is shown in FIGS. 9 and 10. FIG. 9 shows a conventional drive circuit, that is, MOS gates 24, 25, 26, which constitute a drive inverter.
27, detection gates 28, 29, detection resistor 3
0. This is a rotor position detection circuit constructed by adding a capacitor-charging transmission gate 31, a capacitor 33, and a voltage comparator 32. First, to give an example of normal drive timing, a current is passed through the path 34 to excite the coil 7 and drive the rotor. After the rotor motion is almost finished,
A first detection pulse is applied to the coil 7 for a short time (approximately 0.5 msec to 1 msec) through a path 35, and then a second detection pulse is applied to the coil 7 through a path 36. Now, if the rotor rotates normally one step by the normal drive pulse, the relationship between the rotor magnetic poles and the stator magnetic poles when the first detection pulse is applied to the coil is as shown in Figure 6. The relationship is such that the rotor can be driven one step again. The rising portion of the current waveform at this time shows a waveform with a fast rise as shown in FIG. 822. Next, when the second detection pulse is applied, the rotor position is the same as the first detection pulse (the pulse width of the detection pulse is short, and the high resistance 30 is connected in series with the coil 7, so (The rotor does not rotate due to the pulse.) Since the direction of excitation is opposite, the relationship between the rotor magnetic poles and the stator magnetic poles is as shown in Figure 7, and the rising part of the current waveform is a slow rising waveform as shown in Figure 8, 23. becomes. However, since the detection resistor 30 is connected in series with the coil when the detection pulse is applied, strictly speaking, the waveform does not match the waveform shown in FIG. 8, but the characteristics of the rising portion remain the same. Then, observing the terminal potential of the detection resistor 30, we find that
As shown in Figure 10a, the potential Vs ₁ due to the first detection pulse
rises to a higher potential than the potential Vs ₂ caused by the second detection pulse. Next, if the rotor cannot rotate one step by the normal drive pulse and returns to the initial position, the relationship between the rotor magnetic poles and the stator magnetic poles when the first detection pulse and the second detection pulse are applied is as follows. The situation is reversed from the normal rotation described above, and as a result, the detection resistor 3
The terminal potential of 0 becomes Vs ₁ <Vs ₂ as shown in FIG. 10b. Therefore, by comparing the magnitudes of Vs ₁ and Vs ₂ , it is possible to detect whether or not the rotor has operated normally due to the normal drive pulse. In our example Vs ₁ and Vs ₂
The potential difference was about 0.4V. A potential difference of this magnitude can be easily detected. For example, in the configuration shown in FIG. 9, the timing gate 31 of the first detection pulse is turned ON, and Vs ₁ is connected to the capacitor 33.
Then, the voltage comparator 33 may determine the magnitude of the potential Vs ₁ charged in the capacitor 33 and the terminal potential Vs ₂ of the detection resistor 30 when the second detection pulse is applied. This completes the explanation of the first method of rotor motion detection principles.Next, we will explain the principle of rotor motion detection from the voltage waveform induced in the coil by the free vibration of the rotor after the rotor is driven. . Figure 11a shows the induced voltage waveform of the coil generated at both ends of the high resistance when the coil is connected to a high resistance of several tens of kilohms after applying a normal driving pulse to the coil, and the rotation angle of the rotor. As shown in Figure b, the angle between the stator parallel axis and the magnetic poles is shown. The period _T1 is a period in which a driving pulse is applied to the coil, and since the high resistance (detection resistance) is not connected to the circuit, no induced voltage waveform appears. The next section T ₂ is the rotation of the rotor after the drive is completed,
It is the voltage induced in the coil by vibrational motion. Since the voltage waveform in this section _T2 changes depending on the load state and driving conditions of the step motor, the operation of the step motor can be detected by detecting changes in this voltage waveform. FIG. 12 shows an example of a detection circuit based on the present principle. Gate 24, 25, 26, 27, 28, 2
9, the detection resistor 30, and the coil 7 have exactly the same configuration as in FIG. 9, except for the input signal. Detection resistor 30
The connection point of is connected to the input end of a voltage detector 40 having a predetermined threshold value. When the coil is energized in path 41 with a normal drive pulse, the rotor is driven. Thereafter, during the movement of the rotor, the coil 7 is intermittently switched between a state where both ends are grounded and short-circuited through the path 42 and a state where a closed loop including the high-resistance detection resistor 30 is formed through the path 43. The effect of intermittent switching will be described later, but for the sake of simplicity, we will first describe a state in which a closed loop including the detection resistor 30 is formed immediately after the rotor is driven. FIG. 11 shows the terminal potential waveform of the detection resistor 30 in such a state,
This is a potential waveform in a state where the rotor is not subjected to any load such as the wheel train load mentioned above, that is, in a no-load state. Figure 13 shows the above-mentioned no-load state, the maximum load state where the rotor is subjected to such a huge load that it can barely rotate, and the state where the rotor is subjected to an excessive load and returns to its initial position without being able to rotate. The waveform of each induced potential during overload is shown as waveform c ₁ at no load, and waveform at maximum load.
a ₁ and overload are shown by waveform b ₁ , and the rotation angle of the motor at each load is shown by waveform c ₂ , waveform a ₂ , and waveform b _2, respectively. At this time, the magnitude of the load applied to the rotor is in the relationship of overload>maximum load<no load. At maximum load, the rotor rotates slower than at no load, and the vibration after one step rotation is also small, so the induced voltage has a waveform _a1 with few irregularities. Furthermore, during overload, a large peak voltage is induced in the negative direction when the rotor returns to the initial position, and the induced voltage waveform becomes waveform _b1 with few irregularities. Various methods can be considered for determining whether the rotor rotates or not based on the induced voltage waveform, but the determination based on the magnitude of the peak P shown in FIG. 11 is simple and reliable in terms of circuitry. In other words, the rotation of the rotor depends on whether or not the terminal potential of the detection resistor 30 reaches a predetermined potential or higher within a predetermined time period during which the peak P is considered to occur after the number of milliseconds after the end of the application of the drive pulse.
Determine non-rotation. Specifically, the terminal voltage of the detection resistor 30 is detected by an element whose output changes depending on the input of the threshold voltage Vth, and if the input exceeds Vth, the motor rotates, and if it is less than Vth, the motor does not rotate. It is. In this case, Vth is set in order to prevent a malfunction that causes a delay in the clock display, that is, an operation that determines that the rotor is rotating when it is actually not, not only during overload when the rotor cannot rotate. The rotor is considered to be non-rotating even under maximum load when it barely rotates.
It is determined that the rotor has rotated within a range in which it is determined that the rotor has rotated reliably, including when there is no load. For example, in FIG. 13, Vth is set to a voltage slightly higher than a ₁ at maximum load to prevent malfunctions. Furthermore, at maximum load, the rotor is considered to be non-rotating even though it is rotating, but since too many correction pulses are generated in the same direction, this is a safe malfunction and the rotor is rotating too much. There's nothing wrong. FIG. 14 shows the coil induced voltage waveform after driving when the pulse width of the normal driving pulse is varied. As can be seen from this figure, when the pulse width of the normal drive pulse exceeds a certain length, the height of the peak P of the induced voltage waveform becomes low despite no load and normal rotation.
To make this easier to understand, FIG. 15 shows the pulse width of the normal drive pulse on the horizontal axis and the potential of the peak P of the induced voltage on the vertical axis. 45 is a case in which a detection resistor is connected in series with the coil after driving to form a closed loop as explained above, and 46 is a case in which a detection resistor is intermittently connected in a closed loop as explained next. It is. Next, we will discuss the effect of intermittently connecting a high-resistance detection resistor in a closed loop that includes a coil after applying a normal drive pulse. Conventional drive circuits are driven by two inverters as shown in Figure 2, so when not driving, both ends of the motor coil are short-circuited due to the low resistance in the driver that forms the inverter, and the voltage induced in the coils The current flows through the short circuit of path 42 in FIG. 12, and this current is consumed as heat by the driver resistor transistor, thereby applying braking to the rotor. Furthermore, when a closed loop is formed using the path 43 in FIG. 12 to detect the induced voltage, a detection resistor 30 with a higher resistance is connected in series with the driver circuit, and the current in the braking circuit is equal to It is small in comparison. Therefore, by switching these two circuits when braking the rotor, a sudden change in current occurs in the circuit. However, since the motor coil has a large inductance, it cannot follow this change in current, and the braking circuit resistance Rd (=R + R30)
and time constant τ due to coil inductance L =
It shows the first-order lag response L/Rd. At this time, the voltage generated across the detection resistor 30 (R30) is:
In the braking circuit of path 42 in Fig. 12, the voltage is zero, and the instant the coil 7 is switched to path 43, the current during braking continues to flow through path 42, so the detection resistor has a relatively high resistance. A momentary high voltage is generated across the terminal 30, and then this high voltage is attenuated by the aforementioned time constant τ. An example of the terminal voltage of the detection resistor 30 at this time is shown in FIG. The feature of this method is that it is possible to amplify the voltage induced by the motor during braking simply by switching the resistance value of the circuit that performs rotor braking, and it is possible to amplify the voltage induced by the motor during braking, as shown in Figure 15 45, when the induced voltage is continuously detected. While the maximum value of the high voltage peak voltage is about 0.8V at most, in the case where the detection resistor is connected intermittently as shown in 46, it reaches the power supply voltage of the drive circuit (about 1.5V) or more. Therefore, it is extremely easy to detect such a voltage. By the way, as can be seen from FIG. 15, there is a phenomenon in which the induced voltage becomes smaller when the pulse width of the normal drive pulse exceeds a certain level, so care must be taken to this point. The principles of the two types of rotor motion detection circuits have been described above, but the gist of the present invention is to increase or decrease the normal drive pulse width, and although the configuration of the step motor and the step motor motion detection circuit are important elements. , but are not limited to those described herein. Next, examples of the present invention will be described. FIG. 17 is a block diagram of the embodiment. Reference numeral 90 denotes an oscillation circuit, which normally uses a crystal resonator that oscillates at 32768 Hz. 91 is a frequency divider circuit, and in the case of the above oscillation frequency, the flip-flop 15
The frequency is divided by steps to obtain a timing of 1 second. 97
is a clock reset input, and when reset, all frequency division stages are reset. 92 is a waveform synthesis circuit which converts a desired pulse from the output of the flip-flop obtained by the frequency dividing circuit 91 into a NAND gate;
The waveforms are synthesized using a NOR gate etc. as shown in the time chart shown in Fig. 18. Since this synthesis allows logically easy circuit design, the circuit diagram is omitted. FIG. 19 is a circuit diagram of the drive circuit 94 and the detection circuit 95 shown in _FIG .
This is the output of the control circuit 93 and is “H” at the _T1 terminal.
(abbreviation of High level), one of the step motor 96 output terminals is "H" and the other is "L" (abbreviation of Low level), and current flows through the step motor 96. The T ₂ terminal is shown in Figure 17.
When the output of the control circuit 93 is input and _T2 is set to "H", the Q signal of the flip-flop 100 is input to EX/OR only during that time.
The output of EX/OR becomes a negative logic with respect to the output of flip-flop 100, and the direction of the current flowing to the motor can be reversed. In this embodiment, when there is no rotation with the normal drive pulse, the correction pulse _P2 is used to drive, and then the pulse _P3 , which is in the opposite direction to _P2 , is applied again. This is because in an integrated stator type motor, if correction drive is performed at P ₂ , the magnetic saturation time of the saturable magnetic path of the integrated stator becomes longer in the next drive pulse, and the effective pulse width becomes shorter. When corrective driving is performed with P ₂ , by applying a reverse pulse P ₃ to the coil of the step motor 96, the stator is magnetized in the direction of the next driving pulse, and the time required for saturation of the integral part is reduced. Keep it short. Input terminal _T3 is the output of control circuit 93 in Fig. 17.
_T3 is input, and the rotation is detected using this pulse using the method for detecting the induced voltage after the rotor rotates as described above. When a pulse _P0 with a period of 1 second is input to flip-flop (hereinafter abbreviated as F/F) 100, F/F10
0 is F/F that outputs 1/2Hz, and its output Q
The output is input to EX/OR 121 and the output is input to EX/OR 122. T ₂ is input to the other input terminals of EX・OR121, 122, and the output of EX・OR121 is the NOR gate 102, 103, EX・OR122
The outputs of are connected to NOR gates 104 and 105, respectively. The output of NOT gate 101 is NOR gate 10
3,104. The output T ₃ of the control circuit 93 is input to the NOR gates 102 and 105 via the NOT gate 120. The output of NOR gate 102 is NMOS FET1
15 and the first input of NOR gate 106. The output of NOR gate 103 is NOT gate 123
PMOS FET1 for step motor drive via
13 and a second input of NOR gate 106. The output of NOR gate 104 is NOT gate 124
PMOS FET1 for step motor drive via
18 and the first input of NOR gate 107. The output of NOR gate 105 is NMOS
It is connected to the second input of FET 116 and NOR gate 107. The output of the NOR gate 106 is connected to the step motor driving NMOS FET 114.
NOR gate 107 is N for driving the step motor.
Connected to MOS FET119. The power supply terminal V _DD is a + power supply input terminal, and P
The sources of MOS FETs 113 and 118 are connected. N MOS FET114 and 119 have their sources grounded, and P MOS FET113 and N MOS
The drains of FET114 are connected to each other, and
It is connected to the output terminal of the coil of the step motor 96 and the drain of the detection NMOS FET 115, respectively. P MOS FET118, N MOS FET11
9 have their drains connected to each other, and are further connected to the other end output terminal of the coil of the step motor 96 and the detection terminal N.
Connected to the drain of MOS FET116. The N MOS FETs 115 and 116 have their source electrodes connected to each other, and the connection point thereof is connected to one end of a resistor 117. Further, the other end of the resistor 117 is grounded. N MOS FET115, 116, resistor 117
The connection point of is also connected to the + input of comparator 110. Also, this connection point T ₀ is a rotor rotation/non-rotation signal, and is connected to a comparator 110, a resistor 108,
109, N MOS FET111 is the detection circuit 95
In this embodiment, when the detection signal T ₀ can be detected sufficiently even with the threshold voltage of the CMOS gate circuit, it is also possible to use a CMOS NOT gate. The resistor 108 is connected to the power supply voltage _VDD , and the other end is connected to the resistor 109, and this connection point is connected to the comparator 11.
Connected to one input terminal of 0. The other end of the resistor 109 is connected to the drain of the detection inhibiting NMOS FET 111 and grounded through the source. Also, the ground terminal of the comparator 110 is NMOS FET11.
It is connected to the drain of No. 1 and grounded through the source. The output of comparator 110 is a signal at terminal 112.
T ₄ is output and input to the control circuit 93. Further, the comparator used in the detection circuit 93 of the present invention is a comparator made of CMOS, and its operation will be briefly explained. FIG. 20 shows one embodiment of the comparator 110, FIG. 20a is a detailed explanatory diagram, and FIG. 20b is a block diagram. Terminal 164 is a "+" input terminal, terminal 165 is a "-" input terminal, terminal 166 is an output terminal, terminal T ₃
is an enable terminal. The functions are summarized in Table 1.

[Table] V _DD is the power supply terminal, and P MOS FET16
0,162 source electrodes, respectively. P MOS FET 160 has its gate and drain electrodes connected, and the connection point is P MOS FET
162 and the drain of NMOS FET 161, respectively. The gate of NMOS FET161 is connected to terminal 164
and its source is N MOS FET11
connected to the drain. The drain of P MOS FET162 is N MOS
It is connected to the drain of FET 163 and output terminal 166. The gate of NMOS FET163 is connected to terminal 165
and its source is N MOS FET1
It is connected to the drain of the NMOS FET 111 along with the source of the transistor 61. The NMOS FET 111 has its source grounded and connected to the gate terminal _T3 . Also,
The NMOSFETs 161 and 163 have the same characteristics, and the PMOSFETs 160 and 162 have the same characteristics. The operation of the comparator configured as above will be explained. When the enable terminal _P3 is "L", the NMOS FET 111 is turned off and the comparator does not operate. When terminal _T3 becomes “H”, NMOS FET11
1 turns ON and the comparator operates. In addition, in this embodiment, the threshold voltage of the detection signal is obtained by the divided voltage of the resistors 108 and 109, so if current is constantly flowing, power will be consumed.
The current is made to flow only when the pulse _T3 becomes "H" in step 11, thereby reducing the current in the circuit. When the input voltage V ₁ is applied to the terminal 164, the potential and current at the connection point 168 become as shown in FIG. 21a. In FIG. 21a, V168 is the potential of the terminal 168, and I168 is the current flowing through the terminal 168. The gate of P MOS FET162 is connected to the above V
168 is applied, its saturation current is I16
will be equal to 8. The situation is shown in the characteristics of FIG. 21 b162. On the other hand, when the voltage applied to the terminal 165 is _V2 , the saturation current of the NMOS FET 163 becomes larger than I168 when _V2 > _V4 . Therefore, the potential V166 of the output terminal 166 becomes close to the "L" level. This situation is shown by operating point X in FIG. 21b. On the other hand, when V ₂ <V ₁ , the output V166 becomes "H" level, as shown in FIG. 21bY. Therefore, the functions are summarized as shown in Table 1. FIG. 22 is a circuit example of the control circuit 93 in FIG. 17. The output signal _T4 from the detection circuit 95 is SR-F/F1
It is input to the set input terminal S of 40. The signal _P1 from the waveform synthesis circuit 92 is connected to the reset input terminal R of the SR-F/F, the clock input terminal of the binary counter 143, the input terminal of the AND gate 156, and the NOT
It is input to the reset terminal R of the SR-F/F 158 via the gate 157. AND gate 141 is
Output signal _P2 of waveform synthesis circuit 92 and SR-F/F1
40 outputs are input. AND gate 142
is the output _P3 of the waveform synthesis circuit 92 and SR-F/F1
40 is input, and the output signal is input to the drive circuit as _T2 . The output P ₅ of the waveform synthesis circuit and the output of the SR-F/F are input to the AND gate 159 , and its output signal T ₃ is input to the drive circuit 94 . In the embodiment, the binary counter 143 is composed of a four-stage flipflop, and the output signal of each stage is input to an AND gate. OR gate 14
5 is the output of AND gate 144 and AND gate 14
The output of 2 is input. AND gate 146 is SR
-F/F output and the output of the NAND gate 147 are input. The up/down counter 148 is U/
The output of the AND gate 146 is input to the D input (up-down control input), and the output of the OR gate 145 is input to the clock input C. In the embodiment, the up-down counter 148 has a three-stage flip-flop, and the outputs Q ₁ , Q ₂ , and Q ₃ are each NAND.
are input to gate 147, and are also input to EX・
It is input to OR gates 150, 151, and 152. The outputs P ₄ and P ₁ of the waveform synthesis circuit 92 and the output of the SR-F/F are input to the AND gate 156 . In the binary counter 149, the output of the AND gate 159 is input to the clock input C, and the Q output of the SR-F/F 158 is input to the reset input R. In the embodiment, a binary counter 149
is composed of three stages of flip-flops, and their respective outputs Q ₁ , Q ₂ , Q ₃ are input to an OR gate 154, and EX/OR gates 150, 151, 1
52 respectively. NOR gate 153
The outputs of EX・OR gates 150, 151, and 152 are input, and the output is sent to SR-F/F 158.
It is input to the set input S of . OR gate 155
is the output of AND gate 141, AND gate 1
42, the output of the OR gate 154, and the output _P0 of the waveform synthesis circuit 92 are inputted, respectively, and the output _T1 is inputted to the drive circuit. Next, the operation of the embodiment will be explained. When the rotor is rotating, the SR-F/F 140 is set to "L" by the input of the detection signal _T4 , so the AND gates 141, 142,
The outputs of 146 and 159 are all "L". Therefore, the output _T3 of the AND gate 159 and the output _P5 signal of the waveform synthesis circuit become an "L" signal at the same time as the rotation is detected, and thereafter the detection circuit is prohibited. Further, when the U/D input of the up-down counter 148 is "H", it becomes a down counter when the up counter is "L", so it becomes a down counter when the rotor is rotating. At this time, since the output _P1 is input from the waveform synthesis circuit every second to the clock input C of the binary counter 143, in the case of a four-stage flip-flop configuration as in the embodiment, an AND gate is input every 16 seconds. 1
The output of 44 becomes "H" and is inputted to clock input C of up-down counter 148 via OR gate 145, and the count content of up-down counter 148 is decremented by 1 every 16 seconds. On the other hand, the output P ₄ of the waveform synthesis circuit 92 is a 2048Hz signal with a period of approximately 0.5 msec, and only when the output P ₁ of the waveform synthesis circuit 92 is “H” is the output of the binary counter 149 via the AND gate 156. It is input to clock input C. In the embodiment, the binary counter 149 is composed of three stages of flip-flops. EX・OR150,151,152
always monitors whether the outputs of the binary counter 149 and the up-down counter 148 match, and when the contents match, the outputs of EX and OR all become "L" and the output of the NOR gate 153 becomes "H".
The SR-F/F 158 is set to a set state, the output Q becomes "H", and the binary counter 149 is reset. Therefore, the OR gate 154 outputs a signal having a time width equal to the product of the count number of the up-down counter and 0.5 msec as "H". On the other hand, if the output _T4 of the detection circuit 95 does not output an "H" signal even once within the detection time, it is determined that the rotor could not rotate with the first drive pulse, and the output of the SR-F/F 140 is " Continue in the “H” state. Therefore, the output of the AND gate 141 is the output T ₂ from the waveform synthesis circuit 92 which is directly ORed.
The output of the gate 155 is used for corrective driving of the motor. Furthermore, the output signal _P3 of the waveform synthesis circuit 92 is outputted from the AND gate 142, and is inputted to the drive circuit 94 as a _T2 signal, and at this time, the direction of the current flowing through the coil of the step motor in the corrected drive state is opposite to that of the output signal P3 of the waveform synthesis circuit 92. In addition to controlling the current to flow in the direction of the stator, it is also input to the drive circuit 94 from the output _T1 of the OR gate 155, so the influence of the step motor's residual magnetism can be removed, and the saturable magnetism in the case of an integral stator Elimination of road saturation time is performed. Furthermore
Since the output of SR-F/F140 is “H”,
The output of the AND gate 146 becomes "H" and the U/D input of the up-down counter 148 becomes "H". The up-down counter 148 is set as an up-counter and outputs the output _P3 of the waveform synthesis circuit 92.
Through AND gate 142 and OR gate 145,
It is input to clock input C of up-down counter 148. For this reason, the up-down counter 14
The count content of 8 becomes +1, and the length of the driving pulse output next time becomes longer by 0.5 msec. The flip-flop outputs Q ₁ , Q ₂ , and Q ₃ of the up-down counter 148 all become "H", and when the next up input is input, the contents of the counter all become "L". NAND gate 1 to prohibit this
When all the inputs of 47 become "H", the output of the AND gate 146 is set to "L", and the up/down counter 148 is set as a down counter, thereby prohibiting all of the inputs from becoming "L". The output P ₀ of the waveform synthesis circuit is usually for determining the minimum pulse width of the drive pulse. This is because when the pulse width starts from 0 msec, energy loss is large until driving at a constant pulse width. In the example, the minimum driving pulse width was set to about 1.9
It is set to msec. Even when the frequency divider circuit 91 is reset, the count contents of the up-down counter 148 are not reset, and even after the reset is released, the count starts from the drive pulse width before the reset. If the step motor drive pulse has a pulse width so short that the step motor cannot rotate, the step motor cannot be driven with the normal drive pulse width. Therefore, since the output signal T ₄ from the detection circuit is an "L" signal, the output of the SR-F/F 140 is "H", and the output signal P ₂ of the waveform synthesis circuit 92 is used as a correction drive pulse. , are applied to the step motor 96. This pulse width is set to a width that can guarantee the maximum torque of the motor. In the example, this width is 7.8 msec. When the output _P3 of the waveform synthesis circuit 92 is input, the up-down counter 1
Since 48 is an up counter, the counter content is +1. Therefore, if the drive pulse width for the first second is 1.9msec, the normal drive pulse for the second second will be the output T ₁ of the waveform synthesis circuit = 1.9msec and 0.5m.
The drive pulse has a length of sec, that is, 2.4 msec. Furthermore, when the pulse width cannot be rotated completely,
A 7.8msec correction drive is performed, and this 7.8msec pulse width is due to the fact that the internal resistance of the battery increases significantly when the train is loaded with a heavy clock such as a calendar load, when placed in a magnetic field, or at low temperatures. The pulse width is set so that the step motor can be stably driven even when the battery voltage drops at the end of the battery life. Thereafter, the up-down counter is set to 2 using the output _T3 of the waveform synthesis circuit 92.
At the third second, the length of the normal drive pulse is 2.9 msec. If the rotor cannot rotate with this pulse width, the same operation is repeated and driving can be performed with a normal drive pulse width close to the limit at which the rotor can rotate. However, when the counter content of the binary counter 143 reaches 16, the AND gate 144
The output becomes “H” and up-down counter 1
The content of 48 is -1. For this reason, for example 3.4
If normal driving is performed at msec, the next normal driving pulse will be 2.9 msec. Therefore, if it can rotate at 2.9msec, leave it as is.
It continues to drive at 2.9 msec, but if it cannot rotate completely in 2.9 msec, it continues to drive at 2.9 msec, detects that it is not rotating, rotates the rotor with a correction drive pulse, and increases the contents of the up-down counter by +1. The length of the next normal drive pulse is again 3.4 msec. Furthermore, in the case of a wristwatch with a calendar body, the calendar is fed for about 6 hours a day, which increases the load. In this case as well, the drive that normally runs at 3.4 msec changes to 3.9 msec and 4.4 msec only during calendar feed.
The motor can now be driven with pulses such as this, and once the pulse has become longer, it is shortened by 0.5 msec after 16 seconds. This means that the motor can always be driven with the narrowest drive pulse width that allows the rotor to rotate, and the power consumption of the motor is at its lowest. Now you can drive the clock. In the embodiment, the binary counter 143 is a binary counter with four stages of flip-flops, so 16
A normal drive pulse and a correction drive pulse are sent once every second.
They will come out at the same time. Therefore, when aiming for further reduction in power consumption, by further increasing the number of stages of the binary counter 143, it is possible to reduce the rate at which both a normal drive pulse and a correction drive pulse are generated within one second. However, if the number of stages of the counter is increased too much, the load becomes large and the normal drive pulse width becomes long, and then it takes time to return to the original pulse width when the load becomes small. Therefore, even if the number of stages of this binary counter is too large, it becomes meaningless. Next, experimental results of Examples of the present invention will be shown. The wristwatch used is a type with a calendar and date, and the motor has a rotor diameter of 1.25mm, a thickness of 0.5mm, and a spacing between the stator and rotor of 0.325mm.
mm, coil resistance is 3KΩ, number of coil turns is 10000
It's a turn. Table 2 shows the experimental values of the current when driving the motor with each pulse and the output torque measured by the minute hand, as well as the experimental values of the output torque measured by the minute hand when the motor is driven by _each pulse. This shows the results of measuring the ratio of pulses and P _2. In this case, when a pulse with P ₁ is supplied to the motor continuously for 64 pulses, the pulse width is shortened by one step. I conducted an experiment with the settings as follows.

[Table] That is, the sum of the products of each pulse generation rate and current in Table 2 is the average current of this wristwatch for one day.
As a result of calculation, this value was 0.58 μA. This motor was originally designed to be driven with a pulse width of 6.8 msec, but although the electronic watch according to the present invention has the same performance as a conventional electronic watch, the current is only 1.518 μA. This is a 62% reduction in current to 0.58 μA, making it a truly groundbreaking electronic timepiece for a calendar and day-of-the-week 1-second movement timepiece. As explained above, in the present invention, all CMOS
It consists of components that can be built into an IC, and because it always drives a conventional step motor at the limit value of the pulse width that can be driven, there is no cost increase and it is possible to drive a conventional motor with the lowest power consumption. , the effect of wristwatches that aim to be thinner, smaller, and lower in cost is extremely significant. In this example, the explanation was given using a one-piece stator type motor, but this effect is the same and can be similarly large for other motors, including the two-piece stator type motor that has been conventionally used for watches. effective.

[Brief explanation of the drawing]

Fig. 1 is an example of the display mechanism of a general analog display type electronic wristwatch, Fig. 2 is an example of the circuit configuration of a conventional electronic wristwatch, Fig. 3 is an example of the drive current waveform of a step motor, and Fig. 4 is the invention of the present invention. Figures 5, 6, and 7 are explanatory diagrams of one principle of rotor motion detection, Figure 8 is an example of a step motor drive current waveform, and Figures 9 and 10 are An example of a rotor operation detection circuit, an example of a detection voltage waveform,
Figures 11 and 13 show the relationship between the rotation angle of the rotor and the induced voltage after the rotor is driven, Figure 12 is an example of a rotor motion detection circuit based on another principle, and Figure 14 shows the relationship between the rotation angle of the rotor after the rotor is driven and the induced voltage. 15 is a graph showing the relationship between the drive pulse width and the peak potential of the induced voltage after that.
The figure shows an example of the induced voltage waveform for rotor motion detection.
Figure 7 is a block diagram of an embodiment of the present invention, Figure 18 is a time chart of pulses necessary for this embodiment, Figure 19 is an example of the configuration of the drive circuit and detection circuit, and Figures 20a and b are diagrams of the comparator. A detailed configuration diagram and a block diagram, FIGS. 21a and 21b are diagrams for explaining the operation of the comparator, and FIG. 22 is an example of the configuration of the control circuit. 1... Stator, 6... Rotor, 7... Coil, 10... Crystal oscillation circuit, 11... Frequency dividing circuit,
12... Pulse synthesis circuit, 13a, 13b... Drive inverter, 90... Oscillation circuit, 91... Frequency division circuit, 92... Waveform synthesis circuit, 93... Control circuit, 94... Drive circuit, 95... ...motion detection circuit,
96...Step motor.

Claims (1)

[Scope of Claims] 1. A step motor comprising a reference signal generation means, a rotor, a stator, and a coil, a waveform synthesis circuit for synthesizing the outputs of the reference signal generation means and outputting a plurality of pulse signals; a drive circuit for driving a step motor; a detection means for detecting rotation or non-rotation of the rotor based on the magnitude of a voltage value of a signal generated in the coil by the operation of the step motor; and a detection means for detecting rotation or non-rotation of the rotor; input and output a normal drive pulse to the drive circuit, and a correction drive pulse having an effective power value larger than the normal drive pulse following the normal drive pulse based on a signal for detecting non-rotation from the detection means. 1. An electronic timepiece comprising: a control circuit which outputs an effective power value of the next normal drive pulse to be larger than the immediately preceding normal drive pulse and outputs the same to the drive circuit. 2. A step motor comprising a reference signal generating means, a rotor, a stator, and a coil, a waveform synthesis circuit for synthesizing the outputs of the reference signal generating means and outputting a plurality of pulse signals, and a drive for driving the step motor. a detection means for detecting rotation or non-rotation of the rotor based on the magnitude of the voltage value of a signal generated in the coil by the operation of the step motor; A correction having an effective power value larger than the normal driving pulse following the normal driving pulse by a signal for detecting non-rotation by inputting the output of the detecting means and outputting a normal driving pulse to the normal driving pulse. At the same time as outputting a drive pulse, the effective power value of the next normal drive pulse is made larger than the normal drive pulse output immediately before and is output to the drive circuit, and further normal drive pulses with the same effective power value are continuously applied to the drive circuit. 1. An electronic timepiece comprising: a control circuit which, when applied to a step motor, outputs a lower effective value of the normal drive pulse to the drive circuit.