JPS63148613A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce surplus products during the manufacture of many types by a method wherein, when a wafer containing wiring patterns of more than two types of semiconductor integrated circuits is diced and their pellets are arranged, these pellets are arranged after discriminating an identification code marked on each pellet. CONSTITUTION:In order to separate semiconductor integrated circuits A12 and semiconductor integrated circuits B13, both formed on a wafer 11, into each individual semiconductor integrated circuit, the wafer 11 is diced and they are separated. Furthermore, the semiconductor integrated circuits A12 and the semiconductor integrated circuits B13 are discriminated by an identification code 1 which is marked at a corner of a semiconductor integrated circuit 2 to indicate a product name or an identification number for discrimination of a type; then, they are arranged on an identical sheet 14 for arrangement use. That is to say, the semiconductor integrated circuits A12 and the semiconductor integrated circuits B13 are arranged on the identical sheet 14 for arrangement use by keeping a specified space so that these are not intermingled with each other. By this method, it is possible to reduce surplus products during the small production of many types of products.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor integrated circuit, and particularly to a method for arranging pellets after dicing a wafer.

[Conventional technology]

In the manufacture of semiconductor integrated circuits, there are many different types of circuits, and demand for one type is relatively small. In this case, a master slice method is used, that is, a method in which necessary elements are provided in the circuit and only the wiring pattern is changed to create a different circuit. Conventionally, masks used when forming wiring patterns using the master slice method have been formed to have only one type of mask.

That is, as shown in FIG. 4, a method is adopted in which a semiconductor integrated circuit with only semiconductor integrated circuits 42 is manufactured on a wafer 41, and furthermore, when arranging into individual semiconductor integrated circuits, 1
After wafers 41 were diced, they were enlarged and arranged on an array sheet 44.

[Problem that the invention seeks to solve]

Therefore, when manufacturing a large number of types of semiconductor integrated circuit devices, there is a problem in that the amount of manufactured products inevitably increases compared to the demand for each type, and the number and storage space for surplus products increases.

An object of the present invention is to provide an optimal method for manufacturing semiconductor integrated circuits in order to reduce surplus products when manufacturing a wide variety of semiconductor integrated circuits, and to prevent an increase in the number of products stored and the storage space. It is.

[Means for solving problems]

The present invention has a manufacturing method for arranging the pellets by identifying a recognition code added on the pellets when dicing and arranging the pellets by dicing Uni-no-- having wiring patterns of two or more types of semiconductor integrated circuits. There is.

〔Example〕

The present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing a first embodiment of the present invention, and FIG. 3 is a partially enlarged view of a semiconductor integrated circuit. First, as shown in FIG. 1, in order to make the semiconductor integrated circuits A, 12 and semiconductor integrated circuits B, 13 formed on the wafer 11 into individual semiconductor integrated circuits, the wafer 11 is Separate by a known dicing technique. Furthermore, as shown in FIG. 3, a recognition code 1 indicating a product name or a serial number for distinguishing the product type provided at a part of the corner of the semiconductor integrated circuit 2 indicates that the semiconductor integrated circuit is recognized, 12 and the semiconductor integrated circuit. B,
13 and arranges it in the same array sheet) and 14.

That is, the semiconductor integrated circuits 12 and 12 and the semiconductor integrated circuits B and 13 are arranged on the same arrangement sheet 14, with a specific space therebetween, so that they do not coexist. In this embodiment, the recognition code 1 for a part of the corner as shown in FIG.

Similarly, the peripheral part of circuit 2 can be recognized by changing the recognition coordinates for recognition.

[Embodiment 2] FIG. 2 is a diagram showing a second embodiment of the present invention. 1st
Similarly to the embodiment shown in FIG. 23 are arranged on the arrangement sheet B, 25. This*m
In this example, the wiring patterns of two or more types of semiconductor integrated circuits are arranged separately for each type.
There is an advantage that there is no need to identify the recognition code in the work of dicing, arranging pellets, and bonding external connection terminals to the bumps 3 shown in FIG.

〔Effect of the invention〕

As explained above, according to the present invention, when producing a small amount of semiconductor integrated circuits by a high-product, low-volume production method, wafers having wiring patterns of two or more types of semiconductor integrated circuits are diced, Since pellets can be arranged, surplus products can be reduced, and the number of products stored and storage space can be prevented from increasing.

[Brief explanation of the drawing]

1 and 2 are detailed explanatory diagrams of the present invention, FIG. 3 is a partially enlarged view of a semiconductor integrated circuit, and FIG. 4 is an explanatory diagram of an embodiment according to the prior art. 1... Recognition code, 2... Semiconductor integrated circuit, 3... Bump, 4... Blank prevention bump, 11°21.41. ...Wafer,
12, 22, 42..., Semiconductor integrated circuit A, 13
．． 23...Semiconductor integrated circuit B114.44...
...Arraying sheet, 24... Arraying sheet A125... Arraying sheet B0 Cow λ Figure 3

Claims (1)

[Claims] In semiconductor integrated circuits manufactured by the master slicing method, when dicing a wafer having wiring patterns of two or more types of semiconductor integrated circuits and arranging them into individual semiconductor integrated circuits, recognition of different types of semiconductor integrated circuits is required. 1. A method of manufacturing a semiconductor integrated circuit, comprising identifying codes and arranging them on individual semiconductor integrated circuits.