JPS63141342A - Treatment for semiconductor wafer and device thereof - Google Patents
Treatment for semiconductor wafer and device thereofInfo
- Publication number
- JPS63141342A JPS63141342A JP61287814A JP28781486A JPS63141342A JP S63141342 A JPS63141342 A JP S63141342A JP 61287814 A JP61287814 A JP 61287814A JP 28781486 A JP28781486 A JP 28781486A JP S63141342 A JPS63141342 A JP S63141342A
- Authority
- JP
- Japan
- Prior art keywords
- vacuum
- semiconductor wafer
- plate
- pins
- turned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 76
- 238000011282 treatment Methods 0.000 title description 2
- 230000007246 mechanism Effects 0.000 claims abstract description 10
- 235000012431 wafers Nutrition 0.000 claims description 67
- 238000012545 processing Methods 0.000 claims description 26
- 238000012546 transfer Methods 0.000 claims description 15
- 238000003672 processing method Methods 0.000 claims description 4
- 230000003028 elevating effect Effects 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 12
- 238000005530 etching Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000012937 correction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005469 synchrotron radiation Effects 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
この発明は、例えば光照射により、半導体ウェハを処理
する半導体ウェハ処理方法及びその装置に係り、特に半
導体クエへが搬送アームから搬送されて、処理台に正し
くaatされるためになされた半導体ウェハ処理方法及
びその装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor wafer processing method and apparatus for processing a semiconductor wafer by, for example, light irradiation. The present invention relates to a semiconductor wafer processing method and apparatus for correctly aating a semiconductor wafer to a processing table.
[従来の技術]
半導体製造工程において、半導体ウェハにレジストパタ
ーンを設けて様々な処理か行われている。そのレジスト
パターンの形成は大きく分けるとレジスト塗布、プレベ
ーク、露光、現像、ボストベークの順に行われる。この
後、このレジストパターンを用いて、イオン注入、ある
いはレジスト塗布前にあらかじめ半導体ウェハ表面に形
成されたシリコン酸化膜、シリコン窒化膜、アルミニウ
ム薄膜などのエツチングなどが行われる。これらの工程
の後にレジストが除去される。[Background Art] In a semiconductor manufacturing process, a resist pattern is provided on a semiconductor wafer and various treatments are performed. The formation of the resist pattern is roughly divided into the following steps: resist coating, pre-baking, exposure, development, and post-baking. Thereafter, using this resist pattern, ion implantation or etching of the silicon oxide film, silicon nitride film, aluminum thin film, etc. previously formed on the surface of the semiconductor wafer before resist application is performed. After these steps, the resist is removed.
近年、半導体素子の高集精化、微細化などに伴い、レジ
ストにより高分解スオのものが使われるようになり、こ
の場合レジストの耐熱性が悪くなる傾向にある。また一
方では、エツチング時のレジスト劣化(膜へすなど)が
問題となっている。In recent years, as semiconductor devices have become more highly integrated and finer, resists with high resolution properties have come to be used, and in this case, the heat resistance of the resists tends to deteriorate. On the other hand, resist deterioration (film loss, etc.) during etching has become a problem.
レジストの耐熱性、耐エツチング性を窩める方法として
、真空吸着孔で、加熱手段を有するウェハ処理台におい
て、半導体クエへに塗布されたし゛シストを、高圧水銀
灯による放射光で照射処理するにあたり、半導体ウェハ
がウェハ処理台に真空吸着されると同時か、もしくは所
定時間を経て、放射光照射を行い、さらに所定時間経過
後、ウェハ処理台による加熱を開始する方法等がある。As a method to improve the heat resistance and etching resistance of the resist, the resist applied to the semiconductor substrate is irradiated with synchrotron radiation from a high-pressure mercury lamp on a wafer processing table equipped with a heating means using a vacuum suction hole. There is a method of irradiating the semiconductor wafer with synchrotron radiation either at the same time as the semiconductor wafer is vacuum-sucked onto the wafer processing table or after a predetermined period of time, and then after a predetermined period of time, heating by the wafer processing table is started.
第3図(イ)、(ロ)、(ハ)は従来の半導体ウェハ処
理装置の主要部の機略を示すもので、第3図(イ)、(
ロ)は処理台の概略を示す斜視図、同図(ハ)はその断
面図である。図においてlは処理台(以下プレートとい
う)、2はこのプレートlに設けられた溝、3はこのプ
レートlに設けられた真空吸着孔、4は前記溝2内を上
下に昇降してロボット等の搬送アームから搬送された半
導体ウェハ5を受取るための梯子形に形成された薄い支
持板、Mはモータである。Figures 3 (a), (b), and (c) show the features of the main parts of conventional semiconductor wafer processing equipment.
B) is a perspective view schematically showing the processing table, and FIG. 3C is a sectional view thereof. In the figure, l is a processing table (hereinafter referred to as a plate), 2 is a groove provided in this plate l, 3 is a vacuum suction hole provided in this plate l, and 4 is a robot etc. that moves up and down in the groove 2. A thin support plate formed in the shape of a ladder for receiving the semiconductor wafer 5 transferred from the transfer arm of , M is a motor.
第4図は第3図の装置において、半導体ウェハ5がプレ
ート1にa置される直前、及び処理終了後搬出直前の様
子を示したもので、第3図と同一符号は同−又は相当部
分を示す。FIG. 4 shows the apparatus shown in FIG. 3, just before the semiconductor wafer 5 is placed on the plate 1, and just before it is taken out after processing. The same reference numerals as in FIG. 3 indicate the same or corresponding parts. shows.
第3図、第4図を用いて、半導体ウェハ5がプレートl
に載置される状態を説明すると、不図示の搬送アームか
ら、半導体ウェハ5か前記支持板4に載置される。この
支持板4はプレートlの上面に幾分突出した後、半導体
ウェハ5を受取ると、プレートlの溝2内を下降して半
導体ウェハ5をプレートlに固定する。その場合、プレ
ート1の真空チャックの作動により、半導体ウェハ5全
体かプレートlに密着していないのに、近接しただけで
、第4図に示す如く薄板である半導体ウェハ5は部分的
に強く吸引されて、歪みを生じることがある。3 and 4, the semiconductor wafer 5 is placed on the plate l.
The semiconductor wafer 5 is placed on the support plate 4 from a transport arm (not shown). After the support plate 4 protrudes somewhat from the upper surface of the plate l, when it receives the semiconductor wafer 5, it descends within the groove 2 of the plate l and fixes the semiconductor wafer 5 to the plate l. In this case, due to the operation of the vacuum chuck on the plate 1, even though the entire semiconductor wafer 5 is not in close contact with the plate 1, it is only brought close to the plate 1, and the semiconductor wafer 5, which is a thin plate, is partially strongly attracted as shown in FIG. may cause distortion.
[発明が解決しようとする問題点]
上記のように従来の装置においては、搬送アームから搬
送されてきた半導体ウェハがプレート上に載置される際
に、支持板を介してプレート上に固定されるわけである
が、搬送アームから支持板を介してプレートへの受渡し
が円滑に行われないという問題がある。即ち、半導体ウ
ェハの載った支持板が下降中に半導体ウェハが幾分ずれ
たり。[Problems to be Solved by the Invention] As described above, in the conventional apparatus, when the semiconductor wafer transferred from the transfer arm is placed on the plate, it is fixed on the plate via the support plate. However, there is a problem in that the transfer from the transfer arm to the plate via the support plate is not performed smoothly. That is, while the support plate on which the semiconductor wafer is placed is being lowered, the semiconductor wafer may shift to some extent.
また、前記の通り、支持板が下降して、半導体ウェハか
プレート上へ接する直前にプレートの真空チャックの影
響で薄板である半導体ウェハの一部分を強く吸引するた
めに、薄板にそりが生じる。Further, as described above, just before the support plate descends and the semiconductor wafer comes into contact with the plate, a portion of the semiconductor wafer, which is a thin plate, is strongly attracted due to the influence of the vacuum chuck of the plate, causing warpage in the thin plate.
このそりのために、半導体ウェハにヒビが入ったり、こ
の半導体ウェハの位置ずれの状態てプレート上に固定し
て光照射もしくは光照射と加熱等の半導体処理をすると
、部分的に温度が不均一になりその処理が円滑に行われ
ないばかりでなく、後の処理までの途中で2位置補正工
程が必要となって、工程か複雑となり、品質不良の原因
となるという問題があった。さらに、上記半導体処理終
了後、半導体ウェハを搬出する場合にも同様の弊害が生
じるという問題があった。Due to this warping, if the semiconductor wafer cracks or if the semiconductor wafer is misaligned and is fixed on a plate and subjected to semiconductor processing such as light irradiation or light irradiation and heating, the temperature may become uneven in some parts. Not only does this process not proceed smoothly, but a two-position correction process is required before the subsequent process, complicating the process and causing quality defects. Furthermore, there is a problem in that a similar problem occurs when the semiconductor wafer is unloaded after the semiconductor processing is completed.
この発明はかかる問題点を解決するためになされたもの
て、プレート上の正しい位置に歪みのない半導体ウェハ
を搬入、搬出できる半導体ウェハ処理装置を燭供するこ
とを目的とする。The present invention has been made to solve these problems, and an object of the present invention is to provide a semiconductor wafer processing apparatus that can carry in and out a semiconductor wafer without distortion at the correct position on a plate.
[問題点を解決するための手段]
上記の目的を達成するために、この発明は内部に真空吸
着孔を有する処理台上に半導体ウェハを搬送するために
、まず内部に真空吸着孔を有するビンに半導体ウェハを
保持せしめ、このビンを上下動させてから前記処理台に
前記半導体ウェハを載置するもので、前記ビンの真空吸
着孔に設けられた真空機構の出力信号に基づいて、前記
処理台の真空吸着孔に設けられた真空機構を駆動する。[Means for Solving the Problems] In order to achieve the above object, the present invention first provides a bottle having vacuum suction holes inside in order to transport a semiconductor wafer onto a processing table having vacuum suction holes inside. The semiconductor wafer is held in the bin, and the semiconductor wafer is placed on the processing table after moving the bin up and down. Drives the vacuum mechanism installed in the vacuum suction hole of the stand.
[作用]
上記の構成にすることにより、搬送アームからビン、さ
らにビンからプレートへの半導体ウェハの位置がずれる
ことなく受渡しか円滑に行われ、プレートの正しい位置
にそりのない半導体ウエハを搬入し、そしてそりのない
状態で搬出することができる。[Function] With the above configuration, the semiconductor wafers can be transferred smoothly from the transfer arm to the bin and from the bin to the plate without shifting their positions, and the semiconductor wafers can be delivered to the correct position on the plate without warping. , and can be transported without warping.
[実施例]
第1図はこの発明の半導体ウェハ処理装置の一実施例を
示す概略説明図で、6は搬送アームから半導体ウェハを
受取るために内部に真空吸着孔7を有し、プレート1内
を上下に昇降する4本のビン、7はこのビン6の内部に
設けられ真空吸着孔であり、又第3図と同一符号は同−
又は相当部分を示す。第2図は第1図における装置の真
空機構の動作を示すタイムチャートであり、このタイム
チャートに従ってすべての操作をコンピュータが行うも
のである。[Embodiment] FIG. 1 is a schematic explanatory diagram showing an embodiment of the semiconductor wafer processing apparatus of the present invention, in which 6 has a vacuum suction hole 7 inside to receive the semiconductor wafer from the transfer arm, and There are four bottles that move up and down, 7 is a vacuum suction hole provided inside the bottle 6, and the same reference numerals as in Fig. 3 are the same.
or a corresponding portion. FIG. 2 is a time chart showing the operation of the vacuum mechanism of the apparatus shown in FIG. 1, and all operations are performed by a computer according to this time chart.
第1図の装置において、ロボット等の搬送アームからビ
ン6に半導体ウェハ5か載せられて後。In the apparatus shown in FIG. 1, after a semiconductor wafer 5 is placed on a bin 6 from a transfer arm such as a robot.
プレートlへ固定されるまでの過程を第2図のタイムチ
ャートによって説明する。また、真空機構に関する以下
の説明は真空チャックする手段と、この真空チャックを
検知する真空センサとに分けて行う。The process until it is fixed to the plate 1 will be explained with reference to the time chart shown in FIG. Further, the following explanation regarding the vacuum mechanism will be divided into means for vacuum chuck and a vacuum sensor for detecting this vacuum chuck.
いま、搬愼アームに吸着されている半導体ウェハ5がビ
ン6の近傍にきたとき、ビン6の真空チャックに対する
不図示のスイッチがオンになる。半導体ウェハ5がとン
6上に近づいた後、真空吸着孔7に接続された不図示の
真空センサが真空度の高まりを感知して真空チャックの
動作を確認したことを示す(真空センサがオンとなる)
。When the semiconductor wafer 5 currently being attracted to the transport arm comes near the bin 6, a switch (not shown) for the vacuum chuck of the bin 6 is turned on. After the semiconductor wafer 5 approaches the top of the tube 6, a vacuum sensor (not shown) connected to the vacuum suction hole 7 detects an increase in the degree of vacuum, indicating that the operation of the vacuum chuck has been confirmed (the vacuum sensor is turned on). )
.
そのときがちょうど搬送アームからビン6に半導体ウェ
ハ5が受渡しされたときである。その受渡しにより、半
導体ウェハ5は搬送アームの真空チャックからビン6の
真空チャックにより、ビン6の正しい位置に載ったまま
モータMの駆動により下降を開始する。そして図のよう
に、ビン6の真空センサがオフになる時点がビン6から
プレート1へ半導体ウェハ5を受渡しする受渡し点(以
下プレート面の原点という)である。そして、半導体ウ
ェハ5がビン6からプレートlへ受渡しされた後も、ビ
ン6はモータの駆動により下降し続けるが、ビン6の真
空度の変化を検知して、真空センサはオフになり、この
オフになったビン真空センサの信号によりプレートlの
真空チャックのスイッチをオンにする。プレートlの真
空チャックがオンになってもビン6の真空チャックのス
イッチはオンのままビン6は下降している。従フて、半
導体ウェハ5はプレートlに載った後、直ちにプレート
lに真空チャックされ、その上ピン6の真空チャックは
オンされたままなので、プレートlの上で位置がずれる
ことなく固定されることになる。そしてこのプレートl
の真空チャックのスイッチがオンされた後、プレート1
の真空度の高まりによりプレート真空センサが感知して
このセンサがオンになり、このセンサのオンの後ビン6
の真空チャ・ンクのスイッチはオフとなる。At that time, the semiconductor wafer 5 is just transferred from the transfer arm to the bin 6. Upon the transfer, the semiconductor wafer 5 is moved from the vacuum chuck of the transfer arm to the vacuum chuck of the bin 6, and begins to be lowered by the drive of the motor M while being placed on the bin 6 at the correct position. As shown in the figure, the point at which the vacuum sensor of the bin 6 turns off is the transfer point (hereinafter referred to as the origin of the plate surface) at which the semiconductor wafer 5 is transferred from the bin 6 to the plate 1. Even after the semiconductor wafers 5 are transferred from the bin 6 to the plate l, the bin 6 continues to descend due to the drive of the motor, but a change in the degree of vacuum in the bin 6 is detected and the vacuum sensor is turned off. The vacuum chuck of plate l is switched on by the signal from the turned-off bottle vacuum sensor. Even when the vacuum chuck for the plate l is turned on, the vacuum chuck for the bottle 6 remains on and the bottle 6 continues to descend. Therefore, after the semiconductor wafer 5 is placed on the plate L, it is immediately vacuum chucked to the plate L, and since the vacuum chuck of the pin 6 remains on, it is fixed on the plate L without shifting its position. It turns out. And this plate
After the vacuum chuck is turned on, plate 1
The plate vacuum sensor senses the increase in vacuum level and turns on this sensor, and after this sensor turns on, the bottle 6
The vacuum chunk is switched off.
以上かこの実施例における半導体ウェハ5の搬送される
過程であるが、この実施例の特徴は、滑らかな鏡面から
なる半導体ウェハ5が搬送アームからビン6、ビン6か
らプレートlへと搬送され、受渡しされる際に、絶えず
真空吸着により保持されているのて、受渡しの直前、直
後における位置ずれがないということである。The above is the process of transporting the semiconductor wafer 5 in this embodiment.The feature of this embodiment is that the semiconductor wafer 5 having a smooth mirror surface is transported from the transport arm to the bin 6, from the bin 6 to the plate l, Since it is constantly held by vacuum suction during delivery, there is no positional shift immediately before or after delivery.
また、ビン6の真空チャックは、ピン真空センサの信号
でなく、プレートlの真空センサの信号により、オフに
するので、確実に半導体ウェハ5がプレート1に載置さ
れた場合のみ、オフし、誤動作の恐れがない。In addition, since the vacuum chuck of the bin 6 is turned off not by the signal of the pin vacuum sensor but by the signal of the vacuum sensor of the plate l, it is turned off only when the semiconductor wafer 5 is reliably placed on the plate 1. There is no risk of malfunction.
尚、この半導体ウェハ5をプレート1から取去る際は、
前述の搬入とは逆の過程を経ることにより、搬出させる
ことができるのは勿論である。Incidentally, when removing this semiconductor wafer 5 from the plate 1,
Of course, it can be carried out by going through the process reverse to the above-mentioned carrying-in process.
[発明の効果]
以上述べたとおり、この発明は内部に真空吸着孔を有す
るプレート上に、内部に真空吸着孔を有するビンを上下
動させて搬送アームから半導体ウェハを前記プレートに
前記半導体ウェハを@置する際に、前記ビンの真空吸着
孔に設けられた真空機構の出力信号に基づいて、前記プ
レートの真空吸着孔に設けられた真空機構を駆動する方
法及びその装置からなるので、プレートへ半導体ウェハ
が正しい位置に搬送されたという確認ができると共に、
搬送アームからビンへ、ビンからプレートへの受渡しの
際の半導体ウェハかずれることかなくなると共に、半導
体ウェハにそりを生じさせないという効果がある。[Effects of the Invention] As described above, the present invention transfers semiconductor wafers from a transfer arm onto a plate having vacuum suction holes therein by moving a bottle having vacuum suction holes therein up and down. The method and apparatus for driving the vacuum mechanism provided in the vacuum suction hole of the plate based on the output signal of the vacuum mechanism provided in the vacuum suction hole of the bottle when placing the bottle on the plate. It is possible to confirm that the semiconductor wafer has been transferred to the correct position, and
There is an effect that the semiconductor wafer does not shift when it is transferred from the transfer arm to the bin and from the bin to the plate, and that the semiconductor wafer is not warped.
第1図はこの発明の半導体ウェハ処理装置の一実施例を
示す概略説明図、第2図は第1図の動作を行うためのタ
イムチャート、第3図は従来の半導体ウェハ処理装置の
主要部の概略を示す斜視図及び側面図、第4図は第3図
において、半導体ウェハがプレートに受渡しされる直前
、直後の状態を示す図である。
図中。
lニブレート 3.7:真空吸着孔5:半導体ウェ
ハ 6:ビン
代理人 弁理士 1)北 嵩 晴
第1図
第2図
(イ) (0)(八)
第3図
ら
第4図
手続補正書く目先
昭和62年 5月28日FIG. 1 is a schematic explanatory diagram showing an embodiment of the semiconductor wafer processing apparatus of the present invention, FIG. 2 is a time chart for performing the operation shown in FIG. 1, and FIG. 3 is a main part of a conventional semiconductor wafer processing apparatus. FIG. 4 is a schematic perspective view and side view of the semiconductor wafer shown in FIG. 3, showing the state immediately before and after the semiconductor wafer is delivered to the plate. In the figure. l Nibrate 3.7: Vacuum suction hole 5: Semiconductor wafer 6: Bin agent Patent attorney 1) Haru Kitatake Figure 1 Figure 2 (A) (0) (8) Figures 3 and 4 Prospects for writing procedural corrections May 28, 1986
Claims (2)
おいて、内部に真空吸着孔を有するピンに半導体ウェハ
を保持させ、該ピンを上下動させて内部に真空吸着孔を
有する処理台に前記半導体ウェハを載置する際に、前記
ピンの真空吸着孔に設けられた真空機構の出力信号に基
づいて、前記処理台の真空吸着孔に設けられた真空機構
を駆動する工程を含むことを特徴とする半導体ウェハ処
理方法。(1) In a semiconductor wafer processing method for processing a semiconductor wafer, the semiconductor wafer is held by pins having vacuum suction holes inside, and the semiconductor wafer is placed on a processing table having vacuum suction holes inside by moving the pins up and down. A semiconductor characterized in that it includes a step of driving a vacuum mechanism provided in a vacuum suction hole of the processing table based on an output signal of the vacuum mechanism provided in the vacuum suction hole of the processing table when placing the semiconductor. Wafer processing method.
おいて、半導体ウェハを搬送アームから内部に真空吸着
孔を有する前記処理台に載置する際に、昇降機構により
上下動する内部に真空吸着孔を備えたピンと、このピン
の真空度を制御する手段と、この真空度を検知して信号
を出力する手段と、前記処理台の真空度を制御する手段
と、この真空度を検知して信号を出力する手段とを具備
したことを特徴とする半導体ウェハ処理装置。(2) A semiconductor wafer processing apparatus for processing semiconductor wafers, which is equipped with an internal vacuum suction hole that moves up and down by an elevating mechanism when the semiconductor wafer is placed from the transfer arm onto the processing table that has a vacuum suction hole inside. a pin, a means for controlling the degree of vacuum of this pin, a means for detecting this degree of vacuum and outputting a signal, a means for controlling the degree of vacuum of the processing table, and a means for detecting this degree of vacuum and outputting a signal. 1. A semiconductor wafer processing apparatus characterized by comprising means for:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61287814A JPS63141342A (en) | 1986-12-04 | 1986-12-04 | Treatment for semiconductor wafer and device thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61287814A JPS63141342A (en) | 1986-12-04 | 1986-12-04 | Treatment for semiconductor wafer and device thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63141342A true JPS63141342A (en) | 1988-06-13 |
Family
ID=17722104
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61287814A Pending JPS63141342A (en) | 1986-12-04 | 1986-12-04 | Treatment for semiconductor wafer and device thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63141342A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6086362A (en) * | 1998-05-20 | 2000-07-11 | Applied Komatsu Technology, Inc. | Multi-function chamber for a substrate processing system |
US6176668B1 (en) | 1998-05-20 | 2001-01-23 | Applied Komatsu Technology, Inc. | In-situ substrate transfer shuttle |
US6206176B1 (en) | 1998-05-20 | 2001-03-27 | Applied Komatsu Technology, Inc. | Substrate transfer shuttle having a magnetic drive |
US6213704B1 (en) | 1998-05-20 | 2001-04-10 | Applied Komatsu Technology, Inc. | Method and apparatus for substrate transfer and processing |
US6215897B1 (en) | 1998-05-20 | 2001-04-10 | Applied Komatsu Technology, Inc. | Automated substrate processing system |
US6298685B1 (en) | 1999-11-03 | 2001-10-09 | Applied Materials, Inc. | Consecutive deposition system |
US6517303B1 (en) | 1998-05-20 | 2003-02-11 | Applied Komatsu Technology, Inc. | Substrate transfer shuttle |
US6688375B1 (en) | 1997-10-14 | 2004-02-10 | Applied Materials, Inc. | Vacuum processing system having improved substrate heating and cooling |
JP2013130608A (en) * | 2011-12-20 | 2013-07-04 | Ushio Inc | Exposure equipment |
-
1986
- 1986-12-04 JP JP61287814A patent/JPS63141342A/en active Pending
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6688375B1 (en) | 1997-10-14 | 2004-02-10 | Applied Materials, Inc. | Vacuum processing system having improved substrate heating and cooling |
US6517303B1 (en) | 1998-05-20 | 2003-02-11 | Applied Komatsu Technology, Inc. | Substrate transfer shuttle |
US6193507B1 (en) | 1998-05-20 | 2001-02-27 | Applied Komatsu Technology, Inc. | Multi-function chamber for a substrate processing system |
US6206176B1 (en) | 1998-05-20 | 2001-03-27 | Applied Komatsu Technology, Inc. | Substrate transfer shuttle having a magnetic drive |
US6213704B1 (en) | 1998-05-20 | 2001-04-10 | Applied Komatsu Technology, Inc. | Method and apparatus for substrate transfer and processing |
US6215897B1 (en) | 1998-05-20 | 2001-04-10 | Applied Komatsu Technology, Inc. | Automated substrate processing system |
US6435868B2 (en) | 1998-05-20 | 2002-08-20 | Applied Komatsu Technology, Inc. | Multi-function chamber for a substrate processing system |
US6471459B2 (en) | 1998-05-20 | 2002-10-29 | Applied Komatsu Technology, Inc. | Substrate transfer shuttle having a magnetic drive |
US6086362A (en) * | 1998-05-20 | 2000-07-11 | Applied Komatsu Technology, Inc. | Multi-function chamber for a substrate processing system |
US6679671B2 (en) | 1998-05-20 | 2004-01-20 | Applied Materials, Inc. | Substrate transfer shuttle having a magnetic drive |
US6176668B1 (en) | 1998-05-20 | 2001-01-23 | Applied Komatsu Technology, Inc. | In-situ substrate transfer shuttle |
US6746198B2 (en) | 1998-05-20 | 2004-06-08 | Applied Materials, Inc. | Substrate transfer shuttle |
US6298685B1 (en) | 1999-11-03 | 2001-10-09 | Applied Materials, Inc. | Consecutive deposition system |
JP2013130608A (en) * | 2011-12-20 | 2013-07-04 | Ushio Inc | Exposure equipment |
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