JPS63128835A - Internal bus connection system - Google Patents

Internal bus connection system

Info

Publication number
JPS63128835A
JPS63128835A JP27594986A JP27594986A JPS63128835A JP S63128835 A JPS63128835 A JP S63128835A JP 27594986 A JP27594986 A JP 27594986A JP 27594986 A JP27594986 A JP 27594986A JP S63128835 A JPS63128835 A JP S63128835A
Authority
JP
Japan
Prior art keywords
bus
buses
transmission
signal
takes place
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27594986A
Other languages
Japanese (ja)
Other versions
JPH0666809B2 (en
Inventor
Michio Takayama
高山 美知男
Yuji Ishikawa
裕次 石川
Kaoru Yoshida
薫 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61275949A priority Critical patent/JPH0666809B2/en
Publication of JPS63128835A publication Critical patent/JPS63128835A/en
Publication of JPH0666809B2 publication Critical patent/JPH0666809B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To maintain the signal transmission/reception among all equipments even if a defect takes place on the way of bus path by the connection using desired (N-1)-line of buses in the bus connection of ring form via N-set of buses in N-set of equipments. CONSTITUTION:If a defect takes place on the way of transmission path of a bus Ba, a master equipment 4 sends a signal to both buses Ba and Bc. The signal sent from the equipment 4 is sent consecutively by the bus Ba in an adaptor 5 before a faulty part, and a signal sent from the equipment 4 passes through a bus Bc and is sent consecutively through the bus Ba in an adaptor before the defective part and the transmission direction of each gate 6 is set so as to be sent consecutively to the bus Ba. In the setting when a defect takes place in both the transmission paths of the buses Ba and Bb, the bus Bc or Bd is used in place of the defective bus Ba and Bb. Thus, if a defect takes place, the signal transmission/reception among the entire equipments is maintained without awaiting the repair.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は内部バス接続方式、特にディジタル通信方式や
ディジタル処理方式などの局内の装置間でディジタル信
号を授受するための内部バス接続方式、に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an internal bus connection system, particularly an internal bus connection system for exchanging digital signals between devices within a station, such as a digital communication system or a digital processing system. .

〔従来の技術〕[Conventional technology]

従来、この種の内部バス接続方式として、主装置の機能
を拡張するため付加装置を増設する場合に付加装置との
バス接続が主装置に集中するのを避けるように1主装置
と各付加装置とをバスで縦続接続する内部バス接続方式
が用いられている。
Conventionally, this type of internal bus connection method has been used to connect one main device and each additional device to avoid concentrating the bus connections with the main device when adding additional devices to expand the functions of the main device. An internal bus connection method is used in which the two are connected in cascade via a bus.

第4図は従来の内部バス接続方式を示すブロック図であ
る。主装置1および付加装置2は、バスBaおよびBb
により、主装置it一端として縦続に接続されている。
FIG. 4 is a block diagram showing a conventional internal bus connection system. The main device 1 and the additional device 2 have buses Ba and Bb.
The main device IT is connected in cascade as one end.

各付加装置2には、バスBaおよびBbとの接続箇所毎
に、インピーダンス整合用のゲート3を接続しである。
A gate 3 for impedance matching is connected to each additional device 2 at each connection point with the buses Ba and Bb.

各ゲート3は一方向のみの信号伝送を行い、主装置1の
送信ディジタル信号をバスBaで各付加装置2へ縦続に
伝送し、また各付加装置2の送信ディジタル信号をバス
Bb−で主装置1へ縦続に伝送するよう接続しである。
Each gate 3 performs signal transmission in only one direction, transmitting the transmission digital signal of the main device 1 to each additional device 2 via bus Ba, and transmitting the transmission digital signal of each additional device 2 to the main device via bus Bb-. 1 for cascade transmission.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の内部バス接続方式は、主装置lを一端に
配設して付加装置2を縦続接続しているので、バスBa
およびBbの伝送経路の途中に断線や線間短絡、あるい
はゲート3の故障などの不具合を生じた際に、不具合箇
所よりも先の付加装置2は不具合の修復終了までの間、
主装置lとの信号授受をできなくなるという問題点をも
つ。
In the conventional internal bus connection method described above, the main device I is disposed at one end and the additional devices 2 are connected in cascade.
When a problem such as a disconnection, a short circuit between lines, or a failure of the gate 3 occurs in the transmission path of Bb and Bb, the additional device 2 located ahead of the problem location will
This has the problem that it becomes impossible to exchange signals with the main device l.

本発明の目的は、上述の問題点を解決しバスの伝送経路
に不具合を生じた際にその修復を待たずに全装置間の信
号授受を再開できる内部バス接続方式を提供することに
ある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an internal bus connection system that solves the above-mentioned problems and allows signal transmission and reception between all devices to be resumed without waiting for the repair of a problem in the bus transmission path.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の方式は、へ個(Nは予め設定した自然数)の装
置t−N本のバスを介してリング状に接続したバス接続
を少くとも1組設けてあシ、各組の前記バス接続中の所
望の(N−1)本の前記バスを選択使用してN個の前記
装置を縦続に接続するようにしである。
The system of the present invention provides at least one set of bus connections connected in a ring shape through t-N buses of devices (N is a preset natural number), and each set of bus connections. The N devices are connected in cascade by selectively using desired (N-1) buses among them.

〔実施例〕〔Example〕

次に1本発明について図面を参照して説明する。 Next, one embodiment of the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示すブロック図である。主
装置4と各付加装置5とは、バスBaおよびBbにより
縦続接続してあり、更に両端の主装置4および付加装置
5との間をバスBcおよびBdで接続して、2組のルー
プ状のバス伝送経路を構成しである。主装置4は、バス
BaおよびBcに対しいずれか一方への信号送出あるい
は両方への信号送出を選択可能であシ、またバスBbお
よびBdに対しいずれか一方の信号蔓信あるいは両方の
信号受信管選択可能である。付加装置5は、バスBaな
いしBdとの接続箇所毎に伝送方向の切替えが可能なゲ
ー)61に接続しである。
FIG. 1 is a block diagram showing one embodiment of the present invention. The main device 4 and each additional device 5 are connected in cascade via buses Ba and Bb, and the main device 4 and each additional device 5 at both ends are further connected via buses Bc and Bd to form two sets of loops. The bus transmission route is configured. The main device 4 can select to send a signal to one or both of the buses Ba and Bc, and can also send a signal to one of the buses Bb and Bd or receive both signals. Tube selection available. The additional device 5 is connected to a gate 61 that can switch the transmission direction at each connection point with the buses Ba to Bd.

第2図は本実施例中のゲート6の一構成例を示すブロッ
ク図である。ゲート61は、制御信号によって信号伝送
をオンオフ制御可能な一方向伝送用のケート、例えば三
状態ゲート列、である。ゲート6は、2つのゲート61
を互いに逆向きにして並列接続し、バスの途中に接続し
た構成rもつ。
FIG. 2 is a block diagram showing an example of the configuration of the gate 6 in this embodiment. The gate 61 is a one-way transmission gate, such as a three-state gate array, whose signal transmission can be turned on and off by a control signal. Gate 6 has two gates 61
There is also a configuration r in which the buses are connected in parallel with each other in opposite directions, and connected in the middle of the bus.

第3図(a)ないしくC)は本実施例における伝送経路
の設定例を示すブロック図である。同図(a)は、バス
BaおよびBbの伝送経路に不具合が無い正常時におけ
る設定例を示す。主装置4は、バスBaにのみ信号送出
し、またバスBbだけから信号受信する。各付加装置5
では、主装置4の送出信号をバスBaで縦続に伝送し、
且つ主装置4に送る信号をバスBbで縦続に伝送するよ
う、各ゲート6の伝送方向を設定しておく。同図(b)
は、バスBaの伝送経路の途中に不具合を生じた場合に
おける設定例を示す。主装置4は、バスBaおよびBc
の両方に信号送出する。不具合箇所よシも手前の付加装
置5では、主装置4の送出信号をバスBaで縦続に伝送
し、また不具合箇所よりも先の方の付加装置5では、主
装置4の送出信号はバスHcを通ったあとバスBaで縦
続に伝送するよう、各 ・ゲート6の伝送方向を設定し
である。同図(C)は、バスBaおよびBbの画伝送経
路中にそれぞれ不具合を生じた場合の設定例を示す。こ
の場合にも、不具合箇所のバスBaおよびBbの代プに
バスBcおよびadを使うことにより、全ての装置間で
の信号授受を維持し得る。
FIGS. 3A to 3C are block diagrams showing examples of setting transmission paths in this embodiment. FIG. 5A shows an example of a setting in a normal state where there is no problem in the transmission paths of buses Ba and Bb. The main device 4 sends signals only to the bus Ba and receives signals only from the bus Bb. Each additional device 5
Then, the output signal of the main device 4 is transmitted in series on the bus Ba,
Furthermore, the transmission direction of each gate 6 is set so that the signals sent to the main device 4 are transmitted in series on the bus Bb. Same figure (b)
shows an example of settings when a problem occurs in the middle of the transmission path of bus Ba. The main device 4 has buses Ba and Bc.
sends a signal to both. In the additional device 5, which is located closer to the defective location, the output signal from the main device 4 is transmitted in cascade over the bus Ba, and in the additional device 5, which is further ahead than the defective location, the output signal from the main device 4 is transmitted via the bus Hc. The transmission direction of each gate 6 is set so that after passing through the bus Ba, the signals are transmitted in cascade on the bus Ba. FIG. 2C shows an example of settings when a problem occurs in the image transmission paths of buses Ba and Bb, respectively. In this case as well, by using the buses Bc and ad as substitutes for the buses Ba and Bb at the defective location, it is possible to maintain signal exchange between all the devices.

本実施例ではこのように、バス経路の途中に不具合を生
じた際にその修復を待たすに、全装置間での信号授受を
再開し維持できる。なお、本実施例では各バス経路の伝
送方向が片方向である場合を示したが、両方向伝送用の
バス経路の場合でも、ループ状のバス経路を構成して本
実施例と同様な効果が得られるのは明らかである。
In this way, in this embodiment, when a problem occurs in the middle of the bus route, signal exchange between all devices can be resumed and maintained even after the problem is repaired. Although this embodiment shows the case where the transmission direction of each bus route is unidirectional, even in the case of a bus route for bidirectional transmission, the same effect as in this embodiment can be obtained by configuring a loop-shaped bus route. The result is clear.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明には、バスの伝送経路の途中
に不具合を生じた際にその修復を待たすに全装置間の信
号授受を再開し得る内部バス接続方式を実現できる効果
がある。
As described above, the present invention has the effect of realizing an internal bus connection system that can restart signal exchange between all devices even if a problem occurs in the middle of the bus transmission path, waiting for the problem to be repaired.

【図面の簡単な説明】[Brief explanation of the drawing]

MS1図ないし第3図(a)〜(C)はおのおの本発明
の実施例を示すブロック図、第4図は従来の内部バス接
続方式を示すブロック図であ゛る。 1.4・・・・・・主装置、2,5・・・・・・付加装
置、3゜6.61・・・・・・ゲート、Ba 、Bb 
、Bc 、Bcl・”・・第1図 第2図 (a) (b) 第3図
MS1 to FIGS. 3(a) to 3(C) are block diagrams showing embodiments of the present invention, and FIG. 4 is a block diagram showing a conventional internal bus connection system. 1.4...Main device, 2,5...Additional device, 3゜6.61...Gate, Ba, Bb
, Bc, Bcl・”...Fig. 1 Fig. 2 (a) (b) Fig. 3

Claims (1)

【特許請求の範囲】[Claims] N個(Nは予め設定した自然数)の装置をN本のバスを
介してリング状に接続したバス接続を少くとも1組設け
てあり、各組の前記バス接続中の所望の(N−1)本の
前記バスを選択使用してN個の前記装置を縦続に接続す
るようにした内部バス接続方式。
At least one set of bus connections is provided in which N devices (N is a preset natural number) are connected in a ring shape via N buses, and a desired (N-1 ) An internal bus connection method in which the N devices are connected in cascade by selectively using one of the buses.
JP61275949A 1986-11-18 1986-11-18 Internal bus connection method Expired - Lifetime JPH0666809B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61275949A JPH0666809B2 (en) 1986-11-18 1986-11-18 Internal bus connection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61275949A JPH0666809B2 (en) 1986-11-18 1986-11-18 Internal bus connection method

Publications (2)

Publication Number Publication Date
JPS63128835A true JPS63128835A (en) 1988-06-01
JPH0666809B2 JPH0666809B2 (en) 1994-08-24

Family

ID=17562669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61275949A Expired - Lifetime JPH0666809B2 (en) 1986-11-18 1986-11-18 Internal bus connection method

Country Status (1)

Country Link
JP (1) JPH0666809B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5380111A (en) * 1976-12-24 1978-07-15 Nippon Signal Co Ltd:The Automatic cutting-off unit for defective circuit
JPS5438705A (en) * 1977-09-01 1979-03-23 Nec Corp Data transmission system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5380111A (en) * 1976-12-24 1978-07-15 Nippon Signal Co Ltd:The Automatic cutting-off unit for defective circuit
JPS5438705A (en) * 1977-09-01 1979-03-23 Nec Corp Data transmission system

Also Published As

Publication number Publication date
JPH0666809B2 (en) 1994-08-24

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