JPS629954B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a coordinate transformation device, and more specifically, to various types of coordinate conversion devices such as geometric distortion correction, normalization, enlargement, reduction, and rotation of images displayed on an image processing display device. The present invention relates to a coordinate transformation device suitable for use in image transformation.

Remote sensing uses sensors mounted on platforms such as aircraft and satellites to collect electromagnetic waves reflected or emitted from objects on the earth's surface, and uses this data to obtain information about objects and phenomena. It is a technology to acquire, but in a broad sense,
It is also possible to consider remote measurement, non-contact measurement, pattern measurement, etc. In this remote sensing technology, various sensors placed in the air, on the ground, in the ocean, etc. sense the state of an object using light, electromagnetic waves such as microwaves, sound waves, magnetism, etc. as media. This sensed data is usually stored in a storage device, analyzed and used for various purposes, but the accumulated data is Since the data is often graphical, the analysis process is generally called image processing.

However, the above two-dimensional pictorial information often generates geometric distortion due to various conditions such as the sensor, its device position, and condition.
If the data is displayed as is on a display device, a problem arises in that, for example, a rectangular image is displayed in a trapezoidal shape.

Conventionally, correction of the geometric distortion of an image as described above has been performed using software, so image data is input into an image memory, the image data is then subjected to arithmetic processing by a computer, and then displayed on a display device. It took a long time, approximately 5 to 10 minutes, to display the image. Therefore, especially
When performing interactive processing, the response was extremely poor, and the operator was forced to wait for the next processing.

The present invention has been made in order to eliminate the above-mentioned drawbacks of the conventional art, and therefore, it is an object of the present invention to provide image information with geometrical distortion at a speed compatible with television display devices. It is an object of the present invention to provide a new coordinate conversion device that can accurately correct and display.

Another object of the present invention is to improve the responsiveness of interactive image processing by speeding up the generation of image correction display.

Still another object of the present invention is to provide a novel coordinate conversion device for instantly and accurately converting a given two-dimensional coordinate or address plane to any other coordinate or address plane.

Still another object of the present invention is to provide a novel coordinate conversion device that can be manufactured at low cost with a relatively simple circuit configuration.

The above-mentioned objects of the present invention are to provide a timing generation circuit that generates a sequence signal using a first clock signal and generates a second clock signal when the sequence signal reaches a predetermined value; an address control circuit that generates a signal, a write/read control circuit that generates a write/read timing signal based on the sequence signal, and a parameter data that is stored under the control of the write/read control circuit and the address control circuit. and a memory circuit in which part of the parameter data is updated by the arithmetic output of the arithmetic circuit described later, and a source area to be converted based on the parameter data read out from the memory circuit and the updated data for each scan. calculating the starting point of scanning, the rate of change between grid points on the scanning line, and the coordinates of each grid point using the sequence signal controlled by the second clock signal, and simultaneously outputting the calculation results to the storage circuit; This is achieved by a coordinate conversion device having an arithmetic circuit that outputs the coordinates of the starting point and each grid point as an external signal.

The coordinate conversion device according to the present invention has the ability to correct, convert, and display image information with geometric distortion in an extremely short time of about 2 seconds, so it can be used in digital image processing systems such as remote sensing. It is expected that this will have a significant effect on speeding up conversational processing of image analysis.

Next, the principle of the present invention will be explained.

In the present invention, as an example, data in a quadrilateral source area 3 determined by four points A, B, C, and D on the source memory 1 shown in FIG. 1a are transferred to the data shown in FIG. Consider the case of conversion to a rectangular destination area 4 determined by four points P, Q, R, and S on the staycation memory 2. Now, the sides of the quadrilateral shown in Figure 1a
Divide AB and CD into M (M is a positive integer) equal parts, and
Divide sides AC and BD into N equal parts (N is a positive integer), and
At the same time, connect the equally divided points of AB and side CD, and
Connect the points that equally divide AC and side BD, and as shown in the figure, find the intersection of the equally divided points on each side (indicated by a mark, the number of which is (M+1) x (N+1)). Diagram b
This corresponds to (M+1)×(N+1) lattice points indicated by * marks formed by performing similar processing on the rectangle PQRS shown in .

Next, the quadrilateral ABCD that constitutes source area 3
As shown in Figure 2, in the direction of dividing sides AB and CD into M equal parts, horizontal scanning similar to TV horizontal scanning is performed, and in the direction of dividing sides AC and BD into N equal parts, TV
Vertical scans So to Sj to S _N similar to vertical scans are sequentially performed. In one horizontal scan,
Perform M+1 transformations in the direction from side AC to side BD. In other words, the above (M+1)×(N
Find the address (coordinate) signals of +1) grid points, read out the image information stored at the corresponding address in the source memory 1 according to the address signal, and write it to the corresponding address in the destination memory 2. For example, address or coordinate transformation of information can be performed.

Here, as shown in FIG. 3, the coordinates of the four points A, B, C, and D in the source area 3 are A(Xo, Yo),
Let B (X ₁ , Y ₁ ), C (X ₂ , Y ₂ ), D (X ₃ , Y ₃ ), and let the rate of change due to the coordinates (X ₁ , Y ₁ ) be △X ₁ , △
Y ₁ , the rate of change due to the coordinates (X ₂ , Y ₂ ) is △X ₂ , △
Y ₂ , the rate of change due to the coordinates (X ₃ , Y ₃ ) is △X ₃ , △
If Y ₃ , △X ₁ =X ₁ -X ₀ /M, △Y ₁ =Y ₁ -Y ₀ /M...(1
) △X ₂ =X ₂ -X ₀ /N, △Y ₂ =Y ₂ -Y ₂ /N...(2
_{) △ X 3 = _ _ _ _ _} i=0, 1, 2...M)
Coordinate SXij of column and row j (j=0,1,2...N)
(S is a suffix that means source area) is the following formula
Given in (4) and (5).

SXij=X ₀ +X ₁ −X ₀ /M・i+X ₂ −X ₀ /N・j
_{+ X 3} -X _{2 -X 1 + X 0 /M.N.ij} = _{△ X 1 + △ _} =SYj+△Yj・i...(5) However, SYj=Y ₀ +△Y ₂・j △Yj=△Y ₁ +△Y ₃・j In the above equations (4) and (5), SXj, SYj represents the X component and Y component of the coordinates of the scan start point of the j-th (j-th row) horizontal scan Sj, and △Xj and △Yj represent the X rate of change between grid points in the horizontal scan Sj. component and Y component are shown respectively. Therefore, since the starting point and rate of change of the 0th scan So are X ₀ , Y ₀ , △X ₁ , △Y ₁ , they are input from the outside as parameter data, but after the 1st scan S ₁ It is necessary to calculate the starting point and rate of change using an internal arithmetic circuit.

Figure 4 is a diagram showing the storage state of coordinates and data in the source area 3, where the * marks are the coordinates SXij, SYij calculated by the above formulas (4) and (5), and the ○ marks are the actual data. The stored coordinates are the coordinates SXij,
The coordinates closest to SYij that are actually accessed are shown respectively.

The parameter data includes the coordinates X ₀ and Y _{0 of point A in the source area 3 as the starting point SX 0} of the first or 0th horizontal scan So, and the above _- mentioned rate of change ΔX ₁ ,
There are △Y ₁ , △X ₂ , △Y ₂ , △X ₃ , △Y ₃ , among which X ₀ and Y ₀ are positive numbers, for example, 16 bits, △X ₁ to △
_Y3 is a two's complement number, for example, as shown in FIG. 5, assuming a fixed point system with a 16-bit integer part and a 24-bit decimal part.

Next, a most preferred embodiment of the present invention will be explained in detail with reference to the drawings.

FIG. 6 is a block diagram showing an embodiment of the coordinate conversion device according to the present invention. In the figure, one embodiment of the present invention has parameter data X ₀ , Y ₀ , △X ₁
~△ _Y3 and a selection circuit 10 that selects the calculation output;
A timing generation circuit 11 configured by, for example, a gate circuit, which inputs a parameter clock signal 100 and generates a sequence signal 101 and a clock signal 102 when the sequence becomes 8 or more, and the parameter data and the calculation result. For example, P-, which generates address signals AA and BA for memories A and B,
Address control circuit 12 composed of ROM etc.
and the write timing signal AW for memories A and B,
BW, selection signal SEL, SX set signal 103, SY
For example, the P-
Write/read control circuit 13 that can be configured with ROM etc.
and an AND circuit 14 that prohibits output of B data.
and an arithmetic circuit 15 that calculates the above equations (4) and (5),
A register 16 that sets and outputs the calculation result 200 (SX), a register 17 that sets and outputs the calculation result 200 (SY), and a register 17 that sets and outputs the calculation result 200 (SY).
Register 18 that latches and outputs (SX, SY)
It is composed of

Next, the operation of the circuit shown in FIG. 6 will be explained with reference to the time charts in FIGS. 7 and 8, the processing flow charts in FIGS. 9 and 10, and the hardware processing sequence. Parameter data from electronic computer X ₀ , Y ₀ , △X ₁ , △
Y ₁ , ΔX ₂ , ΔY ₂ , ΔX ₃ , and ΔY ₃ are input to the selection circuit 10, and the parameter clock signal 100 is input to the timing generation circuit 11. The sequence signal 101 from the timing generation circuit 11 is incremented by 0, 1, . . . 7, 8 according to the parameter clock signal 100. A selection signal SEL is input to the selection circuit 10 from the write/read control circuit 13 during the time period in which the sequence signal 101 is 0 to 7, and the selection circuit 10 selects the parameter data and outputs the memory A, Input it into memory B. The sequence signal 101 causes the address control circuit 12 to
is address signal AA for memory A, memory B
The write/read control circuit 13 also generates a write timing signal AW for memory A and a write timing signal BW for memory B. Here, address 0 of memory A,
Address 1, ... Address 7 and its memory contents as A0,
A1, ...A7, similarly, addresses 0, 1, ...7 of memory B and their stored contents are B0, B1, ...
...B7, each of the above parameter data is a signal
It is set in memory by AA, BA, AW, and BW as shown below.

X ₀ →A0 Y ₀ →A1 △X ₁ →A2 △Y ₁ →A3 △X ₂ →B4 △Y ₂ →B5 △X ₃ →B6 △Y ₃ →B7 This is also described in FIG. 9b and FIG. 10.

When the sequence signal 101 becomes 8 or more, a clock signal 102 is generated in the timing generation circuit 11, and the sequence signal 101 becomes 8, 9, 10, 11, 10, 1 by the clock signal 102.
1, etc. When the number reaches 9 or more, repeat steps 10 and 11. That is, when the sequence signal 101 is 8, as shown in the hardware processing sequences of FIGS. The calculation ₀ + 0 = X ₀ is performed, and the calculation result 2
00 is stored at address 0 of the memory B through the register ₁₈ and the selection circuit 10, and at the same time, the X component of the coordinates of the starting point in the 0th horizontal scan S ₀
It is output from the register 16 as . Similarly, when the sequence signal is 9, A1+0=A1, that is, Y ₀ +0
The calculation of =Y ₀ is performed, and the calculation result 200 is
At the same time as being written to address 1 of memory _B , the Y component of the coordinates of the starting point in the 0th horizontal scan S ₀
is output from register 17 as . When the sequence signal is 8 or 9, the B data prohibition signal 105 (“0” signal) is input to the AND circuit 14, and the memory B
Prohibit output of data from.

Similarly, the sequence signal 101 is 10,1
At time 1, the coordinates of the next grid point within one scan (in this case, the 0th horizontal scan S ₀ ) are calculated. That is, when the sequence signal is 10,
The calculation of A2 + B0 is performed, and the calculation result is 200
is the 0th horizontal scan S ₀ through register 16
The X component of the coordinates of the corresponding grid point is output as SXi ₀ , and is also written to address 0 in memory B. When the sequence signal is 11, the calculation A3+B1 is performed, and the calculation result 200 is passed through the register 17 to the Y coordinate of the corresponding grid point of the 0th horizontal scan _S0 .
It is output as component SYi ₀ and simultaneously written to address 1 of memory B. Therefore, the sequence signal 101 is 8, 9, 10, 11, 10, 11, . . .
Each time, the contents of memory B at addresses 0 and 1 are accessed and updated, and sequence 1
When the repetition of 0 and 11 is executed M times, a MEND signal 110 indicating the end of one scan is input to the timing generation circuit 11.

MEND signal 110 is timing generation circuit 11
, the sequence signal 101 changes from 11 to 12, 13, 14, 15, 8, and 9.
At times when the sequence signals are 12 and 13, the starting points SXj and SYj of the next scan Sj (in this case, the starting points SX ₁ =X ₀ +△X ₂ ) of the first horizontal scan S ₁ (j= ₁ ),
SY ₁ = Y ₀ + △Y ₂ ), and at time 14 and 15, the rate of change △Xj, △Yj between the points of the next scan Sj, that is, the first horizontal scan S ₁ (j= ₁ ) Rate of change between grid points within △X _j=1 = △X ₁ + △X ₃ , △Y _j=1 = △Y ₁
Calculate +△Y ₃ . That is, the sequence signal is 1
2, data A0 (=
X ₀ ) is data B4 (=△
X ₂ ) are read out, and they are converted into A0+ by the arithmetic circuit 15.
B4 is calculated, and the calculation result 200 is written as A0 to address 0 of memory A via the register 18 and selection circuit 10 as the X component SX ₁ of the coordinates of the starting point of the first horizontal scan S ₁ . It can be done. Similarly, if the sequence signal is 13, A1+B5, that is, Y ₀
+△Y ₂ calculation is performed, and the calculation result is 200
is written as A1 in address 1 of memory A as Y component _SY1 of the coordinates of the starting point of scan _S1 .

Furthermore, when the sequence signal 101 is 14, A2
+B6, that is, △X ₁ +△X ₃ , is calculated, and the calculation result 200 is stored in the memory A as the X component △X _{j = 1} of the rate of change between the grid points of the first horizontal scan _S1 .
is written to address 2 as A2. Also, when the sequence signal is 15, A3 + B7, that is, △Y ₁ +
The calculation of △Y ₃ is performed, and the calculation result is the Y component △Y of the rate of change between the grid points of the first horizontal scan S ₁ .
With _j=1 , it is written to address 3 of memory A as A3.

As the sequence progresses further and passes 14 and 15, it returns to 8, 9, 10, 11, 10, 11,
..., and when the sequence signal 101 is 8 and 9, the X component SX ₁ and Y component SY ₁ of the starting point of the first horizontal scan S ₁ calculated in sequences 12 and 13 are output. When the sequence signal 101 becomes 10 and 11, the calculations A2+B0 and _A3 +B1 are performed as in the case of the 0th horizontal scan S0 described above, and the results of these calculations are passed through the registers 16 and 17 to the first horizontal scan. They are output as X component SXi ₁ and Y component SYi ₁ of the corresponding grid point of S ₁ , respectively, and simultaneously written to addresses 0 and 1 of memory B as B0 and B1, respectively. Thus, the above operations of sequences 10 and 11 are repeated M times, and the second horizontal scan _S2 is executed again by inputting the MEND signal 110.

As mentioned above, the horizontal scanning is S ₀ , S ₁ , S ₂ , ... S _j
...and 1 in N+1 horizontal scans up to S _N
This means that the second vertical scan has been completed, that is, the entire source area 3 has been scanned. Figures 7 and 8
As can be understood from the figure, the sequence signal 10
When 1 is 9 or 11, a memory request signal 120 is output from the timing generation circuit 11, and this signal 1
20 is the coordinate signal SXij from registers 16 and 17;
It is synchronized with the output of SYij. Therefore, the data stored in the source area 3 on the source memory 1 is read out using the coordinate signals SXij and SYij, and the data is transferred to the area 4 on the destination memory 2.
can be written to the corresponding address. In other words, the coordinates of the source area 3 are converted to the coordinates of the destination area 4.

As explained above, according to the present invention, the quadrilateral source area 3 defined by the four points A, B, C, and D as shown in FIG. It is now possible to convert to the rectangular area 4 determined by PQRS in Figure 1b. Therefore,
To accurately correct and display image information having geometric distortion into desired image information at a speed corresponding to the writing speed of an image memory used in a television display device, etc., using a relatively simple configuration. It is now possible to expect a significant improvement in the responsiveness of interactive image processing related to image correction and display.

Although the present invention has been described above with reference to one preferred embodiment thereof, it is needless to say that this is merely an example and does not have a restrictive meaning. Accordingly, the present invention can be practiced with various modifications without departing from the spirit of the invention. For example, the embodiment described above is for converting area 3 shown in FIG. 1a to area 4 shown in FIG. 1b, but the shape and dimensions of area 3 may be arbitrary. , the shape and dimensions of area 4 to be converted corresponding to area 3 can be set arbitrarily, and the given coordinates can be corrected, enlarged, reduced, etc.
All transformations such as rotation are possible. In addition, in the embodiment shown in FIG. 6, two memories A and B are used, but only one memory may be used, but there is a disadvantage that access time becomes longer if only one memory is used. . Although various other modifications may be made to the present invention, all of the above and their modifications and changes are included within the scope of the claims of the present application.

[Brief explanation of the drawing]

Figure 1 a, b, Figure 2, Figure 3, Figure 4, Figure 5
The figure is a diagram for explaining the principle of the present invention, Figure 6 is a block configuration diagram showing one embodiment of the coordinate conversion device according to the present invention, and Figures 7 and 8 are one embodiment of the coordinate conversion device shown in Figure 6. An example operation time chart, FIG. 9a is a processing flowchart of the present invention, FIG. 9b is a processing flowchart of the present invention implemented in hardware, and FIG. 10 is a diagram showing a processing sequence of the hardware. 1... Source memory, 2... Destination memory, 3... Source area, 4... Destination area, 10... Selection circuit, 11...
Timing generation circuit, 12... Address control circuit, 13... Write/read control circuit, 14... AND circuit, 15... Arithmetic circuit, 16, 17, 18...
Register, A...Memory A, B...Memory B, 1
00...Parameter clock signal, 101...Sequence signal, 102...Clock signal, 103
...SX set signal, 104...SY set signal,
105...B data prohibition signal, 106...Arithmetic result latch signal, 120...Memory request signal, 20
0...Calculation result, SEL...Selection signal, AA, BA...
...Address signal, AW, BW...Write signal.

Claims (1)

[Claims] 1. In a device that converts a quadrilateral image made up of arbitrary four points into a rectangular image made up of four points,
a timing generation circuit that generates a sequence signal based on a first clock signal and generates a second clock signal when the sequence signal reaches a predetermined value; and an address control circuit that generates an address signal based on the sequence signal. , a write/read control circuit that generates a write/read timing signal based on the sequence signal; and a write/read control circuit that stores parameter data under the control of the write/read control circuit and the address control circuit; A storage circuit in which a part of the parameter data is updated; and a storage circuit that updates the memory of a part of the parameter data, and stores data at the start point of the scan and each scan line for each scan of the source area to be converted based on the parameter data read from the storage circuit and the updated data. The rate of change between lattice points and the coordinates of each lattice point on the scanning line are calculated by the sequence signal controlled by the second clock signal, and the calculation results are output to the storage circuit, and at the same time the starting point and each coordinate are calculated. A coordinate conversion device comprising: an arithmetic circuit that outputs coordinates of lattice points as an external signal.