JPS6295581A - Video display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a video display device, and particularly to a video display device that projects different or the same images on two CRT screens, such as a stereoscopic image display device. Regarding.

(Prior Art) FIG. 5 shows an outline of the configuration of a three-dimensional image display device, which is an example of this type of video display device. This device has images for the left eye (CRTI that displays an elephant) and CTI that displays images for the right eye.
There is RT 2. The image data given to each of these CRTIs and 2 is stored in separately provided image data memories 3.4. The image data in each image data memory 3.4 is stored in the image control circuit 5.6.
to each CRT 1.2 via.

(Problem to be Solved by the Invention) However, in the case of the conventional example having such a configuration, since the image data for the left eye and the image data for the right eye are stored in separate image data memories, However, there is a problem in that the number of image memories increases, which increases the manufacturing cost of the device.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a video display device in which only one image memory is required instead of the two used in such video display devices. The purpose is

(Means for Solving the Problems) FIG. 1 is a block diagram schematically showing the configuration of a video display device according to the present invention.

That is, the video display device according to the present invention displays two
It is equipped with two indicators 11 and 12. A pair of video memories 13.14 corresponding to the display device 11 and another pair of video memories 15.16 corresponding to the display device 12 are provided. The image data memory 17 includes the video memory 13
Image data of characters given to 16 to 16 are stored.

Further, a specimen memory 18 provided in association with the image data memory 17 stores data for selecting a character stored in the image data memory 17, data for determining the position of the character on the screen, the color of the character, etc. I remember.

The image data memory 17 and the specimen memory 18 are connected to an image memory I3.14 via switches SW+ and SW2, and to an image memory 15.16 via switches SW1 and SW3. In addition, the video memories 13 and 14 are connected to the display 1 via the switch SW4.
Connected to 1. Video memories 15 and 16 are connected to display I2 via switch SW5. The switches SWI to SW5 symbolically represent data transmission control means that determines the timing of writing and reading data into each video memory.

(Function) The function of the video display device will be explained with reference to FIG.

FIG. 5A shows the timing of horizontal scanning lines. As shown in the same figure (b), the switch SWI is ! In the first half of the horizontal scanning period, it is connected to contact point (2), and in the second half, it is connected to contact point (2). In addition, switches SW2 and S
W3 is switched between contact (2) and contact (2) for each horizontal scan. The switch SW4.5 is the switch SW2.3.
On the contrary, the contact point (2) and the contact point (2) are switched for each horizontal scan.

Therefore, in the first half of one horizontal scanning period, the image data memory I
Image data outputted from 7 and the specimen memory 18 are applied to the video memory 14 via switches SWI and SW2, and written into this memory. On the other hand, in the second half of the one horizontal scanning period, the image data output from the image data memory 17 and the specimen memory 18 are transferred to the switch S.
The signal is applied to the video memory 16 via WI and SW3 and written into this memory.

Further, during the horizontal scanning period during which data is written in the video memories 14 and 16, the video data in the video memory 13 is given to the display=+X via the switch SW4. Also,
During this period, the video data in the video memory 15 is applied to the display 12 via the switch S Vv' 5.

In the next horizontal scanning period, switches SW2 to SW5 are switched, writing to the video memory 13.15 is performed, and video data from the video memory 14.16 is read and applied to the display devices 11.12. It will be done.

(Example) Hereinafter, the present invention will be described in detail based on an example shown in the drawings. FIG. 3 is a block diagram schematically showing the configuration of a video display device according to an embodiment of the present invention. In the same figure,
The same parts as in FIG. 1 are indicated by the same reference numerals.

The object memory 18 is composed of a object memory for left eye display and a object memory for right eye display.

The object memory 18 determines which character's image data is to be selected from the data DI that determines the vertical position of the character on the screen and the image data of a plurality of characters stored in the image data memory 17. data D2, data D3 that specifies the color of the character on the screen, and data D that determines the horizontal position of the character on the screen.
Outputs 4. The timing of these data outputs is
It is determined by the control signal Sl of the data transmission control circuit 20.

The data Di-D3 is individually given to latch circuits 31 to 33, respectively. Data D4 is provided to horizontal position counters 41 and 42, respectively.

The output of the latch circuit 31 is given as one input of the comparison arithmetic circuit 50. The vertical scanning synchronizing pulse V is applied as the other input of the comparison arithmetic circuit 50. The vertical line signal which is the output of this comparison arithmetic circuit 50 is given as one input of the image data memory 17. The output of the launch circuit 32 is given as the other input of the image data memory 17.

The image data read out from the image data memory 17 is
The signal is applied to a parallel-to-serial conversion circuit 60. The outputs of the parallel-to-serial conversion circuit 60 are given to the video memories 13 to 16, respectively. Further, the output of the latch circuit 33 is given to the video memories 13 to I6. On the other hand, clock pulse C
The count output of the horizontal position counter 41 that performs a counting operation in response to P is given to the video memory 13.15, and the count output of another horizontal position counter 42 that performs a counting operation in response to the clock pulse CP is similarly applied to the video memory 13.15. is applied to the video memory 14.16.

The video data in the video memories 13 and 14 is transferred to the switching circuit 71.
are given to each separately. The output of the switching circuit 71 is given to the coloring circuit 81, and the output of the coloring circuit 81 is C
Given to RTII. On the other hand, the video data in the video memories 15 and 16 are recorded individually in each of the switching circuits 72. The output of the switching circuit 72 is applied to a coloring circuit 82, and the output of the coloring circuit 82 is applied to the CRT 12.

Next, the operation of this embodiment will be explained.

When the data transmission control circuit 20 is given the horizontal counter signal H shown in FIG. 4(a),
A data output control signal Sl shown in is applied to the specimen memory 18. As a result, in the first half of one horizontal scanning period of the specimen memory 18, the data DI-
Output D4.

The comparison circuit 50, which is supplied with the data D1 via the launch circuit 31, determines the number of characters displayed on the CRT screen based on the comparison between the number of vertical counter signals V, which is supplied as the other input, and the data DI. A vertical line signal that determines the vertical length is given to the image data memory 17.

Further, by applying data D2 to the image data memory 17 via the latch circuit 32, image data of a character to be displayed on the CRTII is selected.

The image data of the character selected in this way is
After the data is array-converted by the parallel-serial conversion circuit 60, it is applied to the video memories 13-16. At this time, as shown in FIGS. 4(C) to 4(r), a control signal 8 is sent from the data transmission control circuit 20 to each video memory 13 to 16.
2 to S5 are given. As a result, in the first half of the horizontal scanning period (IH) for the first grain shown in FIG. It is in. Therefore, the image data output from the image data memory 17 is written into the video memory 14.

Furthermore, (the data D3 output from the vote body memory 18 is
The signal is applied via the latch circuit 33 to the video memory 14 in the data writing state. As a result, data regarding the color to be added to the character written in the video memory 14 is written to the video memory 14.

Furthermore, the horizontal position counters 41 and 12, which are given the data D4 output from the specimen memory 18,
Determine the horizontal position of the image data given to T. The horizontal address data output from the horizontal position counter 42 is given to the video memory 14.

On the other hand, in the second half of the horizontal scanning period (IH) of the first grain, as shown in FIG.
The video memory 16 for the right eye, to which the control signal S5 is applied, enters a write state, and the video memory 14 enters a write-inhibited state. At this time, the specimen memory 18 outputs data DI-D4 for the right eye. Therefore, with these data, the image data of the character to be displayed on the right eye CI'' (TI2) selected from the image data memory 13, color data, horizontal and vertical address data are transferred to the image memory as described above. given to 16.

Further, as shown in FIGS. 4(C) and 4(e), when the video memory 14 and the video memory 16 are in the writing state,
The video memories I3 and I5, which are individually given control signals S2 and S.1 from the data transmission control circuit 20, are in the state of reading the video data written therein, respectively.

As shown in Figure 4(a), the horizontal scanning line (2
When H) is drawn, the first half is the video memory 13 to which the control signal S2 is applied from the data transmission control circuit 20.
or enters a writing state. Therefore, based on the data Di-D4 of the object memory for the left eye that is output during this period, image data for the left eye, etc. similar to those described above are written into the video memory 13. Further, the second half of the horizontal scanning line of the second main port is connected to the video memory 1 to which the control signal S4 is applied from the data transmission control circuit 20, as shown in FIG. 4(e).
5 enters the writing state, and image data for the right eye and the like are written into this memory.

On the other hand, during the horizontal scanning period (21-1) of the second main port, as shown in FIGS. 4(d) and (f), the left eye The video memory 14 and the video memory 16 for the right eye are in a read state. Therefore, the data written to the video memories 14, 16 during the first main grain scanning period of mB will be read from these memories during the second main grain scanning period. The data read from the video memory I4.15 is individually applied to switching circuits "M" and 72, respectively.

Since these switching circuits 71 and 72 correspond to the switches SW4 and SW5 in FIG. 1, the data transmission control circuit 20 switches the contacts at the timing shown in FIG. 4(g).

Therefore, during the scanning period (IH) of the first main opening, the video data in the video memory 13 and the video data in the video memory 15 are respectively read out. Further, during the scanning period (2H) of the second main entrance, the video data in the video memory 14 and the video data in the video memory 16 are respectively read out.

Thereafter, the video data of the paired video memories are read out alternately in the same manner as described above.

The video data output from the switching circuits 71 and 72 is
Each of the coloring circuits 81 and 82 is individually provided. Coloring circuits 81 and 82 convert color data in video data into RGB
Convert to signal. The outputs of the coloring circuits 81 and 82 are individually applied to the CRT II and 12, so that a predetermined image is displayed on each CRT screen.

In the description of the embodiments, a three-dimensional image display device was used as an example, but the present invention is not limited to this and can be applied to various video display devices that display different images on two CRTs.

Further, the present invention selects an arbitrary character from a plurality of characters stored in one image data memory,
Since it is displayed on two CRTs, two CRTs are used.
Of course, either the same or different images can be displayed.

(Effects) As described above, the video display device according to the present invention selects image data in the image data memory separately for the first half and the second half of one horizontal scanning period, and selects the image data for each of the two display devices. It is applied individually to the paired video memories, and the paired video memories are alternately written and read for each horizontal scan, and the video data read out from each of the paired video memories is are given individually to each display unit.

Therefore, according to the present invention, a desired image can be displayed on a 2g display using one image data memory, so unlike the conventional device, separate image memories are required for each of the two displays. Compared to the conventional method, the number of image memories is halved, and the device can be manufactured at a lower cost.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an outline of the configuration of a video display device according to the present invention, FIG. 2 is an operation timing diagram of the device shown in FIG. 1, and FIG. 3 is a schematic diagram of the configuration of an embodiment of the present invention. 4 is an operation timing chart of the device shown in FIG. 3, and FIG. 5 is a block diagram showing an outline of the configuration of the conventional device. 11.12・CRT, 13-16...Video memory, 17
- Image data memory, 18... specimen memory.

Claims (1)

[Claims] (1) two display devices that display images; a pair of video memories that are provided corresponding to each of the display devices and that store video data that is provided to each of the display devices; and video data that is provided to each of the video memories. an image data memory that stores image data of the character; and a specimen memory that stores data that selects the image data stored in the image data memory, the position of the character on the screen, and the data that determines the color of the character. and, during the first half of one horizontal scanning period, the image data memory is stored in one pair of video memories among the video memories, and during the second half of one horizontal scanning period, the image data memory is stored in another pair of video memories among the video memories. and the sample memory respectively, and alternately read video data from each pair of video memories for each horizontal scan, and provide the data to the corresponding display device. A video display device comprising: data transmission control means for controlling each of the memories.