JPS6277651A - Branch processing system for data flow type computer - Google Patents

Branch processing system for data flow type computer

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Publication number
JPS6277651A
JPS6277651A JP21835385A JP21835385A JPS6277651A JP S6277651 A JPS6277651 A JP S6277651A JP 21835385 A JP21835385 A JP 21835385A JP 21835385 A JP21835385 A JP 21835385A JP S6277651 A JPS6277651 A JP S6277651A
Authority
JP
Japan
Prior art keywords
data
processes
circuit
branching
synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21835385A
Other languages
Japanese (ja)
Inventor
Takeshi Kikuchi
剛 菊池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP21835385A priority Critical patent/JPS6277651A/en
Publication of JPS6277651A publication Critical patent/JPS6277651A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To perform judgment branching and respective branching processes on a pipeline basis and to perform the processes at a high speed by providing a synchronous data branching circuit and plural queuing circuits in addition to a data branching circuit and attaining synchronization after branching processes. CONSTITUTION:The data branching circuit 4 inputs judgment data 2 to judge which of processes T6 and F7 input data 1 is to be branched to. The processes 6 and 7 are performed on the pipeline basis without waiting for a succeeding input data sequence for synchronization. The outputs of the processes 6 and 7 are supplied to the queuing circuits 8 and 9 and queued for synchronization until the output (T, F) of a synchronous data branching circuit 5 is inputted. This synchronous data branching circuit 5 outputs initial data 3 for the stating one word to either of the queuing circuits 8 and 9 according to the judgment data 2 and uses output data 10 for the input of synchronous data instead of initial set data 3 as to the 2nd and succeeding words.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はデータフロー型のアーキテクチャを持つデータ
フロー型計算機の分岐処理方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a branch processing method for a data flow computer having a data flow architecture.

（従来の技術〕 従来のデータフロー型針′Ｑ機における分岐処理方式は
、分岐した処理の処理時間の違いによってデータ列の順
番が狂わないように、第４図に示すように、判断分岐の
前後で同期をとり、同時に複数の処理か走らないように
制限を加えた処理方式となっていた。ずぬわち、待ち合
せ回路１５によって出°カデータ１２と入力データｌと
の同期をとり、判断データ２によってデータ分岐回路４
で入力データ１をＴ、Ｆに分岐し、それぞれ処理Ｔ６処
理Ｆ７を行って合成して出力データ１２としていた。(Prior Art) The branching processing method in the conventional data flow type needle Q machine is based on the decision branching method as shown in FIG. The processing method was synchronized before and after, and restrictions were added to prevent multiple processes from running at the same time.First, the output data 12 and the input data l were synchronized by the waiting circuit 15, and the judgment data 2 by data branch circuit 4
The input data 1 was branched into T and F, and the output data 12 was obtained by performing processing T6 and processing F7 respectively and composing them.

〔発明か解決しようとする問題点１ 」二連した従来の処理方式では、判断分岐中の処理対象
か１データに限られてしまう為に、パイプライン処理に
よる高速化か困難になるという欠点がある。[Problem to be solved by the invention 1] In the conventional dual processing method, the processing target during decision branching is limited to one data item, so it is difficult to speed up processing using pipeline processing. be.

本発明の目的は、このような欠点を除き、判断分岐と分
岐処理とをパイプライン的に実行することにより、高速
処理をできるようにしたデータフロー型計算機の分岐処
理方式を提供することにある。An object of the present invention is to eliminate such drawbacks and provide a branch processing method for a data flow computer that enables high-speed processing by executing decision branches and branch processing in a pipeline manner. .

〔問題点分解法するだめの手段〕[Means to avoid problem decomposition method]

本発明のチータフロー型計算機の分岐処理方式の暢成は
、入力データに基づいてデータの行先を変えるデータ分
岐回路と、判断データに基ついて同期データの行先を変
える同期データ分岐回路と、面記データ分岐回路の各出
力をそれぞれ処理する処理部と、この処理部の各出力を
前記同期データ分岐回路の出力で同期待ちの制御を行な
う待ち合わせ回路とを備えることを特徴とする。The structure of the branch processing method of the Cheetah flow computer of the present invention consists of a data branching circuit that changes the destination of data based on input data, a synchronous data branching circuit that changes the destination of synchronous data based on judgment data, and The present invention is characterized by comprising a processing section that processes each output of the data branching circuit, and a waiting circuit that performs synchronization wait control for each output of the processing section with the output of the synchronous data branching circuit.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例のプロ・ツク図である。FIG. 1 is a block diagram of one embodiment of the present invention.

入力データ１は判断データ２の入力により、データ分岐
回路４において処理Ｔ６．処理Ｆ７のいずれに行くかを
決定される。これら処理６および７は、連続する入力デ
ータ列（１）に対して同期待ちを行なう事なく、パイプ
ライン的に実行される。Input data 1 is processed in data branch circuit 4 by processing T6. It is determined which process to proceed to in process F7. These processes 6 and 7 are executed in a pipeline manner without waiting for synchronization with respect to the continuous input data string (1).

これら処理６．７の出力は、それぞれ待ち合わせ回路８
．９の人力となり、同期データ分岐回路５の出力（Ｔ、
Ｆ）が入力するまで同期待ちを行なう。The outputs of these processes 6.7 are each output from the waiting circuit 8.
．． 9 becomes the human power, and the output of the synchronous data branch circuit 5 (T,
Wait for synchronization until F) is input.

この同期データ分岐回路５は、最初の１語については、
初期設定データ３を判断データ２の入力に従って待ち合
わせ回路８．９のいずれかに出力する。２語口以後につ
いては初期設定データ３の代りに・出力データ１０を同
期データの入力として用いている。This synchronous data branch circuit 5, for the first word,
Initial setting data 3 is outputted to one of the waiting circuits 8.9 in accordance with the input of judgment data 2. For the second and subsequent words, instead of the initial setting data 3, the output data 10 is used as the input of synchronization data.

第２図は待ち合わせ回路８，９の一例を示しているにの
回路は、ＦＩＦＯメモリ２４からなり、入力データ２１
と同期データ２２のうち先に着いたデータを記憶してお
き、ペアが揃ったら出力データ２３として送出する。こ
の動作は、第３図（ａ）〜（ｇ＞の動作例にようになる
。すなわち、第３図（ａ＞で同期データａが入力される
と、ＦＩＦＯメモリ２４に一時記憶され、第３図（ｂ）
で入力データＡが入力されると、第３図（ｃ）のように
、この入力データＡが出力される。また、第３図（ｄ）
、（ｅ）で入力データＢ、Ｃが入力され、第３図（ｆ＞
に同期データｂが入力されると、第３図（ｇ＞で入力デ
ータＢを出力する。FIG. 2 shows an example of the waiting circuits 8 and 9. The circuit shown in FIG.
The data that arrives first among the synchronized data 22 is stored, and when the pair is completed, it is sent out as output data 23. This operation is as shown in the operation examples shown in FIGS. 3(a) to (g>. That is, when synchronized data a is input in FIG. Figure (b)
When input data A is input, this input data A is output as shown in FIG. 3(c). Also, Figure 3(d)
, (e), input data B and C are input, and in FIG. 3 (f>
When synchronous data b is input to , input data B is output at (g>) in FIG.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は、データ分岐回路の他に
同期データ分岐回路と複数の待ち合わせ回路とを持ち、
分岐処理の後で同期を行なうようにした事により、判断
分岐と各分岐処理とをパイプライン的に実行し、処理を
高速化する効果がある。As explained above, the present invention has a synchronous data branch circuit and a plurality of waiting circuits in addition to the data branch circuit,
By performing synchronization after branch processing, the decision branch and each branch processing are executed in a pipeline manner, which has the effect of speeding up the processing.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例の判断分岐処理方式を示すフ
ロック図、第２図は第１図の待ち合わせ回路の一例のブ
ロック図、第３図（ａ）〜（ｇ＞は第２図の動作の一例
を説明する図、第４図は従来の判断分岐処理方式を示す
ブロック図である。 １・・入力データ、２・・・判断データ、３・・・同期
用初期設定データ、４・・・データ分岐回路、５・・・
同期データ分岐回路、６・・・判断データＴの時の処理
、７・判断データＦの時の処理、８，９．１５・・・待
ち合わせ回路、１０．１１・・・ＯＲ回路、１２・・・
出力データ、２１・・・待ち合わせ回路への入力データ
、２２・・・待ち合わせ回路への同期データ、２３・・
・待ち合わせ回路出力データ、２４・・・待ち合わせ回
路のＦＩＦＯメモリ、FIG. 1 is a block diagram showing a decision branch processing method according to an embodiment of the present invention, FIG. 2 is a block diagram of an example of the waiting circuit of FIG. 1, and FIGS. FIG. 4 is a block diagram showing a conventional judgment branch processing method. 1. Input data, 2. Judgment data, 3. Initial setting data for synchronization, 4. ...Data branch circuit, 5...
Synchronous data branch circuit, 6... Processing when judgment data T, 7. Processing when judgment data F, 8, 9.15... Waiting circuit, 10.11... OR circuit, 12...・
Output data, 21... Input data to the waiting circuit, 22... Synchronization data to the waiting circuit, 23...
・Waiting circuit output data, 24... FIFO memory of waiting circuit,

Claims (1)

【特許請求の範囲】[Claims] 判断データに基づいてデータの行先を変えるデータ分岐
回路と、このデータ分岐回路の各出力をそれぞれ処理す
る処理部と、判断データに基づいて同期データの行先を
変える同期データ分岐回路と、この同期データ分岐回路
の各出力によって前記処理部の各出力を同期待ち制御を
行なう待ち合わせ回路とを有することを特徴とするデー
タフロー型計算機の分岐処理方式。A data branching circuit that changes the destination of data based on judgment data, a processing unit that processes each output of this data branching circuit, a synchronous data branching circuit that changes the destination of synchronous data based on judgment data, and this synchronous data. A branch processing method for a data flow computer, comprising a waiting circuit that performs synchronous waiting control for each output of the processing unit according to each output of the branch circuit.
JP21835385A 1985-09-30 1985-09-30 Branch processing system for data flow type computer Pending JPS6277651A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21835385A JPS6277651A (en) 1985-09-30 1985-09-30 Branch processing system for data flow type computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21835385A JPS6277651A (en) 1985-09-30 1985-09-30 Branch processing system for data flow type computer

Publications (1)

Publication Number Publication Date
JPS6277651A true JPS6277651A (en) 1987-04-09

Family

ID=16718549

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21835385A Pending JPS6277651A (en) 1985-09-30 1985-09-30 Branch processing system for data flow type computer

Country Status (1)

Country Link
JP (1) JPS6277651A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1054320C (en) * 1994-12-12 2000-07-12 中园修三 Method for processing waste material of animality

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1054320C (en) * 1994-12-12 2000-07-12 中园修三 Method for processing waste material of animality

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