JPS6248410B2 - - Google Patents

Info

Publication number
JPS6248410B2
JPS6248410B2 JP18969281A JP18969281A JPS6248410B2 JP S6248410 B2 JPS6248410 B2 JP S6248410B2 JP 18969281 A JP18969281 A JP 18969281A JP 18969281 A JP18969281 A JP 18969281A JP S6248410 B2 JPS6248410 B2 JP S6248410B2
Authority
JP
Japan
Prior art keywords
signal
frequency
output
supplied
modulated wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18969281A
Other languages
Japanese (ja)
Other versions
JPS5890844A (en
Inventor
Hidefumi Tanaka
Tsutomu Kiuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP18969281A priority Critical patent/JPS5890844A/en
Publication of JPS5890844A publication Critical patent/JPS5890844A/en
Publication of JPS6248410B2 publication Critical patent/JPS6248410B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/04Differential modulation with several bits, e.g. differential pulse code modulation [DPCM]

Description

【発明の詳細な説明】 本発明はAD変換装置に係り、アナログ信号を
周波数変調等の角度変調をして得た被角度変調波
信号をデイジタル信号に変換することにより、デ
イジタル信号を得るときのデータ量を削減でき、
また簡単で安価な構成の回路により雑音の混入に
よる誤動作期間が短かく、正しく変換されたデイ
ジタル信号を出力し得るAD変換装置を提供する
ことを目的とする。
[Detailed Description of the Invention] The present invention relates to an AD conversion device, which converts an angle-modulated wave signal obtained by performing angle modulation such as frequency modulation on an analog signal into a digital signal, thereby obtaining a digital signal. The amount of data can be reduced,
Another object of the present invention is to provide an AD converter that has a simple and inexpensive circuit structure, has a short period of malfunction due to noise contamination, and can output correctly converted digital signals.

従来より、VTRの再生信号の時間軸変動を補
正するためのメモリに供給するため、その他種々
の用途に、映像信号等のアナログ信号をデイジタ
ル信号に変換するAD変換装置が使用される。か
かるAD変換装置の高能率符号化のため、従来、
第1図に示す如き差分パルス符号変調(DPCM)
を行なう装置があつた。同図において、入力端子
1に入来したアナログ信号eiは減算器2に供給
され、ここで復号化器9よりの1クロツク前のア
ナログ信号epと減算されて差信号eDに変換され
た後符号化器3に供給され、ここで符号化され
る。
BACKGROUND OF THE INVENTION Conventionally, AD conversion devices have been used to convert analog signals such as video signals into digital signals for supplying the reproduced signal to a memory for correcting time axis fluctuations of a VTR and for various other purposes. Conventionally, for high-efficiency encoding of such AD conversion devices,
Differential pulse code modulation (DPCM) as shown in Figure 1
I found a device to do this. In the figure, an analog signal e i inputted to an input terminal 1 is supplied to a subtracter 2, where it is subtracted from the analog signal e p of one clock before the decoder 9 and converted into a difference signal e D. After that, the signal is supplied to the encoder 3, where it is encoded.

符号化器3より取り出された符号化ビツト数n
のデイジタル信号EDは加算器4に供給される一
方、出力端子5へ出力される。加算器4はこのデ
イジタル信号EDと、1クロツク前までのデイジ
タル信号EDの加算出力を割算器7により所定の
係数で割算して得た信号E1′との加算を行ないそ
の加算出力信号E0をラツチ6に供給してラツチ
させる。ラツチ6よりデイジタル信号EDと、タ
イミングの合わせられた信号E1が取り出されて
割算器7に供給される一方、ラツチ8に供給さ
れ、これによりデイジタル信号EDとタイミング
の合わせられた信号E2が出力される。この信号
E2は復号化器9に供給されて復号化されてアナ
ログ信号epされた後、減算器2へ供給される。
Number of encoded bits extracted from encoder 3 n
The digital signal E D is supplied to the adder 4 and output to the output terminal 5. The adder 4 adds this digital signal E D to a signal E 1 ' obtained by dividing the addition output of the digital signal E D up to one clock ago by a predetermined coefficient by the divider 7, and then performs the addition. The output signal E 0 is supplied to latch 6 to cause it to latch. The digital signal E D and the timed signal E1 are taken out from the latch 6 and supplied to the divider 7, while being supplied to the latch 8, which generates the digital signal E D and the timed signal E1. E 2 is output. this signal
E 2 is supplied to the decoder 9 and decoded into an analog signal e p , and then supplied to the subtracter 2 .

上記の従来装置において、符号化器3、復号化
器9、ラツチ6,8等に供給される第2図B及び
第3図Bに夫々示す周波数cのサンプルクロツ
クに対し、入力アナログ信号eiが第2図Aに示
す如く周波数1/8cの三角波であるときは、減
算器2の出力信号eDは第2図Cに示す如き台形
波となる。一方、入力アナログ信号eiが第3図
Aに示す如く周波数が1/4cで、かつ、第2図
Aに示した三角波と同一振幅である三角波である
場合は、減算器2の出力信号波形は第3図Cに示
す如き台形波となり、またその振幅は第2図Cに
示した台形波の2倍のVとなる。
In the above-mentioned conventional apparatus, an input analog signal e is applied to a sample clock having a frequency c shown in FIGS. When i is a triangular wave with a frequency of 1/8c as shown in FIG. 2A, the output signal e D of the subtracter 2 becomes a trapezoidal wave as shown in FIG. 2C. On the other hand, if the input analog signal e i is a triangular wave with a frequency of 1/4c and the same amplitude as the triangular wave shown in FIG. 2A, as shown in FIG. 3A, the output signal waveform of the subtracter 2 becomes a trapezoidal wave as shown in FIG. 3C, and its amplitude is V twice that of the trapezoidal wave shown in FIG. 2C.

すなわち、符号化ビツト数nを第3図Cに示す
台形波の振幅Vの時最大となるよう設定すると、
周波数1/8cの三角波が入来したときに減算器
2から出力される第2図Cに示す台形波に対する
符号ビツト数は2(n-1)でよく、このため利用効
率は入力アナログ信号eiの周波数が高くなる程
良くなる。換言すれば、減算器2の出力信号の符
号化ビツト数に対する利用効率は、周波数に対し
6dB/octの特性を示す。
That is, if the number of encoded bits n is set to be maximum when the amplitude of the trapezoidal wave shown in FIG. 3C is V, then
The number of code bits for the trapezoidal wave shown in FIG . The higher the frequency of i , the better. In other words, the utilization efficiency for the number of encoded bits of the output signal of subtracter 2 is
Shows the characteristics of 6d B /oct.

そこで、既に公表されているテレビジヨン信号
の符号化では、テレビジヨン信号の周波数に対す
るレベル値が統計的にみて−6dB/octであること
を利用して第1図に示す装置を使用していた。し
かしながら、上記の統計的予測に基づかないテレ
ビジヨン信号が入来した場合は、上記の従来装置
では正確にデイジタル信号の変換並びに正しい再
生信号epが得られなかつた。すなわち、入力ア
ナログ信号eiが第4図Aに示す如くテレビジヨ
ン信号であつて、かつ、その画像情報が黒から白
へ、また白から黒へ急激に変化するような信号部
aを有している場合は、減算器2から得られる差
信号eDは信号部aのみに着目したとき、同図B
に示す如く理想的な波形とはならず、同図Cに示
す如き波形となり、このため復号化器9より取り
出される再生信号epは同図Dに示す如くにな
り、原信号aとは著しく異なつた波形となつてし
まう。
Therefore, in the encoding of television signals that has already been published, the apparatus shown in Figure 1 is used, taking advantage of the fact that the level value for the frequency of the television signal is statistically -6dB /oct. Ta. However, when a television signal that is not based on the above-mentioned statistical prediction is received, the above-mentioned conventional apparatus cannot accurately convert the digital signal and obtain a correct reproduced signal e p . That is, the input analog signal e i is a television signal as shown in FIG. , the difference signal e D obtained from the subtracter 2 is B
The waveform is not ideal as shown in Figure C, but the waveform is as shown in Figure C. Therefore, the reproduced signal e p extracted from the decoder 9 becomes as shown in Figure D, which is significantly different from the original signal a. This results in a different waveform.

また上記の従来装置は、その動作中に誤差が発
生した場合、誤差も加算されるため、定期的に誤
差を補正する手段が必要であり、回路構成が複雑
であつた。更に上記の従来装置は前記した如く、
周波数に対し、減算器2の出力信号の符号化ビツ
ト数に対する利用効率が6dB/octであり、利用効
率が悪いという欠点を有していた。
Further, in the conventional device described above, if an error occurs during its operation, the error is added, so a means for periodically correcting the error is required, and the circuit configuration is complicated. Furthermore, as mentioned above, the above conventional device
With respect to the frequency, the utilization efficiency with respect to the number of encoded bits of the output signal of the subtracter 2 is 6d B /oct, which has a disadvantage of poor utilization efficiency.

本発明の上記の諸欠点を悉く除去したものであ
り、第5図以下の図面と共にその一実施例につき
説明する。
This invention eliminates all of the above-mentioned drawbacks of the present invention, and one embodiment thereof will be described with reference to the drawings from FIG. 5 onwards.

第5図は本発明になるAD変換装置の一実施例
のブロツク系統図を示す。同図中、第1図と同一
構成部分には同一符号を付し、その説明を省略す
る。入力端子1に入来したアナログ信号eiは周
波数変調器10に供給され、ここで周波数変調さ
れて周波数変調波信号eFMとされた後、低域フイ
ルタ11により−6dB/octの割合で高周波数程減
衰された周波数変調波信号eFM′とされて減算器
2の一方の入力端子に供給される。
FIG. 5 shows a block system diagram of an embodiment of the AD converter according to the present invention. In the figure, the same components as in FIG. 1 are denoted by the same reference numerals, and their explanations will be omitted. The analog signal e i that enters the input terminal 1 is supplied to the frequency modulator 10, where it is frequency modulated to become a frequency modulated wave signal e FM , and then the low pass filter 11 converts it into a frequency modulated wave signal e FM at a rate of -6d B /oct. The higher the frequency, the more attenuated the frequency modulated wave signal e FM ' is, which is supplied to one input terminal of the subtracter 2.

第10図は低域フイルタ11の一実施例の回路
図を示す。同図に示す如く、低域フイルタ11は
入力端子12にベースが接続されているNPNト
ランジスタQ1と、トランジスタQ1のコレクタ抵
抗(抵抗値R)及びエミツタ抵抗(抵抗値R′)
と、電界効果トランジスタ(FET)Q2と、トラ
ンジスタQ1のベース及びFETQ2のゲート間と接
地間に接続されたコンデンサ(容量値C)等より
なり、トランジスタQ1のコレクタより増幅した
入力信号を取り出して容量値Cのコンデンサに供
給し、これにより生じたコンデンサの両端間の電
圧をソースホロワを構成するFETQ2によりイン
ピーダンス変換して出力端子13へ出力する構成
とされている。いま、入力端子12の入力電圧を
Vi、出力端子13より取り出される出力電圧を
V0とすると、出力電圧V0は次式で表わされる。
FIG. 10 shows a circuit diagram of one embodiment of the low-pass filter 11. As shown in the figure, the low-pass filter 11 includes an NPN transistor Q 1 whose base is connected to the input terminal 12, and the collector resistance (resistance value R) and emitter resistance (resistance value R') of the transistor Q 1 .
, a field effect transistor (FET) Q 2 , and a capacitor (capacitance value C) connected between the base of transistor Q 1 , the gate of FET Q 2 , and ground, and the input signal amplified from the collector of transistor Q 1. is taken out and supplied to a capacitor having a capacitance of C, and the resulting voltage across the capacitor is impedance-converted by FETQ 2 forming a source follower and output to an output terminal 13. Now, the input voltage of input terminal 12 is
Vi, the output voltage taken out from output terminal 13
Assuming V 0 , the output voltage V 0 is expressed by the following equation.

V0=Vi′(R・1/jωC)/(1/jωC+R) =Vi′/(jωC+1/R) ただし、上式中Vi′=Vi/R′、ω=2π、は入
力 電圧Viの周波数である。上式でjωC≫1/Rであれ ば、出力電圧V0は近似的にVi′/jωCとなるから、
− 6dB/octの低域フイルタを通したことと等価とな
る。従つて、コンデンサのインピーダンスjωC
を1/Rに比較して充分大なる値に設定することによ り簡単なR、C構成の低域フイルタ11を構成す
ることができる。
V 0 = Vi' (R・1/jωC)/(1/jωC+R) = Vi'/(jωC+1/R) However, in the above equation, Vi'=Vi/R', ω=2π, is the frequency of the input voltage Vi It is. If jωC≫1/R in the above formula, the output voltage V 0 will approximately be Vi'/jωC, so
This is equivalent to passing through a low-pass filter of −6d B /oct. Therefore, the impedance of the capacitor jωC
By setting d to a sufficiently large value compared to 1/R, it is possible to configure the low-pass filter 11 with a simple R and C configuration.

低域フイルタ11より取り出された周波数変調
波信号eFM′は第1図に示したAD変換装置と略同
様構成の回路によりデイジタル信号EDに変換さ
れて出力端子5より出力される。なお、第1図に
示した割算器7に減算器2に供給される信号がテ
レビジヨン信号のような各周波数の合成波形でな
く、単純波形であるため、特に必要はなく省略で
きる。
The frequency modulated wave signal e FM ' extracted from the low-pass filter 11 is converted into a digital signal E D by a circuit having substantially the same configuration as the AD converter shown in FIG. 1, and is outputted from the output terminal 5. Note that since the signal supplied to the divider 7 and the subtracter 2 shown in FIG. 1 is a simple waveform rather than a composite waveform of each frequency like a television signal, this is not particularly necessary and can be omitted.

このように、AD変換されるべきアナログ信号
を周波数変調して、振幅一定の周波数変調波信号
FMを得た後、予め−6dB/octで減衰した後減算
器2へ供給するようにしているから、周波数が変
化してもレベル変化のない差信号eDが得られ
る。例えば、第6図B及び第7図Bに夫々示すサ
ンプルクロツクの繰り返し周波数cとしたと
き、低域フイルタ11の出力周波数変調波信号e
FM′の周波数がc/8のときは第6図Aに示す如く大 であり、他方、周波数変調波信号eFM′の周波数
がc/4のときは第7図Aに示す如く振幅がc/8
の場 合の1/2となる。しかして、第2図A〜C及び第
3A〜Cと共に夫々説明したように、減算器2よ
り取り出される差信号eDの振幅は減算器2の入
力信号周波数に対して6dB/octの特性を示すか
ら、第6図Aと第7図Aに示す周波数に応じて−
6dB/octの振幅とされる周波数変調波信号eFM
′が減算器2に供給される本実施例の場合の差信
号eDの振幅は第6図C、第7図Cに示す如くい
ずれも同一振幅Vとなる。従つて、本実施例によ
れば符号化ビツト数が常に最大のものが使えるか
ら、利用効率は従来装置に比し大となる。
In this way, after frequency modulating the analog signal to be AD converted to obtain a frequency modulated wave signal e FM with a constant amplitude, the signal is attenuated by -6d B /oct in advance and then supplied to the subtracter 2. Therefore, a difference signal e D whose level does not change even if the frequency changes can be obtained. For example, when the repetition frequency of the sample clock is c as shown in FIGS. 6B and 7B, the output frequency modulated wave signal e of the low-pass filter 11 is
When the frequency of FM ' is c/8, the amplitude is large as shown in Fig. 6A, and on the other hand, when the frequency of the frequency modulated wave signal e FM ' is c/4, the amplitude is c as shown in Fig. 7A. /8
It is 1/2 of the case of . Therefore, as explained in conjunction with FIGS. 2A to 3C and 3A to C, the amplitude of the difference signal e D taken out from the subtractor 2 has a characteristic of 6d B /oct with respect to the input signal frequency of the subtractor 2. Therefore, depending on the frequencies shown in Figures 6A and 7A, -
Frequency modulated wave signal e FM with an amplitude of 6d B /oct
In the case of this embodiment in which the signal ' is supplied to the subtracter 2, the amplitude of the difference signal e D is the same amplitude V as shown in FIGS. 6C and 7C. Therefore, according to this embodiment, since the maximum number of encoded bits can always be used, the utilization efficiency is greater than that of the conventional apparatus.

更に、本発明ではデイジタル信号に変換する信
号を周波数変調波信号eFM′としているため、例
えばアナログ信号eiがテレビジヨン信号であ
り、正常な時は従来装置の復号化器9からは第8
図Aに示す如き正常なテレビジヨン信号が再生信
号epとして取り出され、本実施例の場合は前記
した如く第8図Bに示す如き正常な波形の周波数
変調波信号が復号化器9より取り出されることは
勿論であるが、誤動作時は従来装置の再生信号e
pが第9図Aに示す如く誤信号部分bやクリツプ
部分cを有するテレビジヨン信号であるのに対
し、本実施例における誤動作時は復号化器9より
の周波数変調波信号epは同図Bに実線で示す如
く、誤信号部分b′やクリツプ部分c′を生じるか、
その影響は周波数変調波信号epが高周波数であ
るから短かくて済む。因みに、周波数変調波信号
FM,eFM′,epの周波数帯域は、現行のVTRの
タイムベースコレクタの一部に本発明装置を用い
る場合は、現行のVTRの周波数変調映像信号帯
域程度であり、映像信号のベースバンドに比し高
周波数である。また低域フイルタ11のカツトオ
フ周波数は、例えば周波数変調波信号eFMの一次
側波帯を含めた帯域の下限周波数程度に選定され
る。
Furthermore, in the present invention, since the signal to be converted into a digital signal is the frequency modulated wave signal e FM ', for example, the analog signal e i is a television signal, and under normal conditions, the decoder 9 of the conventional device
A normal television signal as shown in FIG. Of course, when a malfunction occurs, the reproduced signal e of the conventional device
While p is a television signal having an erroneous signal part b and a clip part c as shown in FIG. As shown by the solid line in B, does it generate an erroneous signal part b' or a clip part c'?
The effect is short because the frequency modulated wave signal e p has a high frequency. Incidentally, if the device of the present invention is used as part of the time base collector of a current VTR, the frequency bands of the frequency modulated wave signals e FM , e FM ′, and e p will be approximately the same as the frequency modulated video signal band of the current VTR. Yes, the frequency is higher than the baseband of the video signal. Further, the cutoff frequency of the low-pass filter 11 is selected, for example, to be approximately the lower limit frequency of a band including the primary sideband of the frequency modulated wave signal eFM .

なお、本発明装置によりデイジタル信号に変換
されるアナログ信号eiはテレビジヨン信号に限
られるものではなく、音声信号その他のアナログ
信号に適用できることは勿論である。また周波数
変調器10の代りに位相変調器を用いてもよい。
Note that the analog signal e i converted into a digital signal by the apparatus of the present invention is not limited to a television signal, but can of course be applied to audio signals and other analog signals. Further, a phase modulator may be used instead of the frequency modulator 10.

上述の如く、本発明になるAD変換装置は、ア
ナログ信号を角度変調する角度変調器と、角度変
調器の出力被角度変調波信号の高域周波数を減衰
させて差分パルス符号変調回路に供給する低域フ
イルタとを具備するようにしたため、簡単な回路
構成により差分パルス符号変調回路内の復号化器
の出力再生信号が従来装置のような統計値に基づ
くものではなく正確に得ることができ、また差分
信号の振幅を周波数の変化によらず略一定にでき
るので、符号化ビツト数の利用効率を従来に比し
大幅に向上することができ、デイジタル化する際
のデータ量を削減でき、更に誤信号の混入があつ
ても誤動作期間が短かくて済むので、誤動作の修
正が短時間でできる等の特長を有するものであ
る。
As described above, the AD conversion device according to the present invention includes an angle modulator that angle modulates an analog signal, and attenuates the high frequency of the angle modulated wave signal output from the angle modulator and supplies it to the differential pulse code modulation circuit. Since the present invention is equipped with a low-pass filter, the output reproduction signal of the decoder in the differential pulse code modulation circuit can be obtained accurately with a simple circuit configuration, instead of being based on statistical values as in conventional devices. In addition, since the amplitude of the differential signal can be kept approximately constant regardless of changes in frequency, the efficiency of using the number of encoded bits can be greatly improved compared to conventional methods, and the amount of data when digitized can be reduced. Even if an erroneous signal is mixed in, the erroneous operation period is short, so the erroneous operation can be corrected in a short time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来装置の一例を示すブロツク系統
図、第2図A〜C、第3図A〜C及び第4図A〜
Dは夫々第1図の動作説明用信号波形図、第5図
は本発明装置の一実施例を示すブロツク系統図、
第6図A〜C、第7図A〜Cは夫々第5図の動作
説明用信号波形図、第8図A,B及び第9図A,
Bは夫々第1図と第5図の正常時と誤動作時の再
生信号波形を示す図、第10図は第5図の要部の
一実施例を示す回路図である。 1……アナログ信号入力端子、2……減算器、
3……符号化器、4……加算器、5……デイジタ
ル信号出力端子、9……復号化器、10……周波
数変調器、11……低域フイルタ。
Fig. 1 is a block system diagram showing an example of a conventional device, Fig. 2 A to C, Fig. 3 A to C, and Fig. 4 A to
D is a signal waveform diagram for explaining the operation of FIG. 1, and FIG. 5 is a block system diagram showing an embodiment of the device of the present invention.
6A-C and 7A-C are signal waveform diagrams for explaining the operation of FIG. 5, FIGS. 8A and B, and FIG. 9A, respectively.
B is a diagram showing reproduced signal waveforms during normal operation and malfunction in FIGS. 1 and 5, respectively, and FIG. 10 is a circuit diagram showing an embodiment of the main part of FIG. 5. 1...Analog signal input terminal, 2...Subtractor,
3... Encoder, 4... Adder, 5... Digital signal output terminal, 9... Decoder, 10... Frequency modulator, 11... Low pass filter.

Claims (1)

【特許請求の範囲】[Claims] 1 アナログ信号を差分パルス符号変調回路によ
りデイジタル信号に変換して出力するAD変換装
置において、上記アナログ信号を角度変調する角
度変調器と、該角度変調器の出力被角度変調波信
号の高域周波数を減衰させて上記差分パルス符号
変調回路に供給する低域フイルタとを具備したこ
とを特徴とするAD変換装置。
1. In an AD conversion device that converts an analog signal into a digital signal using a differential pulse code modulation circuit and outputs the digital signal, an angle modulator that angle-modulates the analog signal and a high frequency of the angle-modulated wave signal output from the angle modulator are provided. and a low-pass filter that attenuates and supplies the attenuated signal to the differential pulse code modulation circuit.
JP18969281A 1981-11-26 1981-11-26 Analog-to-digital converter Granted JPS5890844A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18969281A JPS5890844A (en) 1981-11-26 1981-11-26 Analog-to-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18969281A JPS5890844A (en) 1981-11-26 1981-11-26 Analog-to-digital converter

Publications (2)

Publication Number Publication Date
JPS5890844A JPS5890844A (en) 1983-05-30
JPS6248410B2 true JPS6248410B2 (en) 1987-10-14

Family

ID=16245584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18969281A Granted JPS5890844A (en) 1981-11-26 1981-11-26 Analog-to-digital converter

Country Status (1)

Country Link
JP (1) JPS5890844A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0286811A (en) * 1988-05-09 1990-03-27 Sankyo Kogyo Kk Dry deodorizing device and semidry deodorizing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0286811A (en) * 1988-05-09 1990-03-27 Sankyo Kogyo Kk Dry deodorizing device and semidry deodorizing device

Also Published As

Publication number Publication date
JPS5890844A (en) 1983-05-30

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