JPS6242354B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a storage device capable of storing necessary information and reading out the stored information, which can be detachably attached to the main body of a device such as an electronic calculator or a text creation/editing device (word processor). The present invention relates to the above storage device comprising:

In personal computers such as electronic calculators, external storage devices for storing necessary information and for reading out the stored information usually use a disk drive, a magnetic bubble, a magnetic tape, or the like. This external storage device, such as a disk drive, is very convenient to handle because the stored contents will not be lost even if it is removed. However, it is not suitable for making the device itself smaller, lighter, and labor-saving.

In view of the above points, the present invention provides an external storage device that is convenient to handle and suitable for downsizing, weight reduction, and labor saving. The external storage device of the present invention includes:
It consists of CMS RAM, which is removably installed in the main body of the device. The external storage device (hereinafter referred to as a memory cassette) is placed in a CM to ensure that its memory contents are not lost even if it is removed from the device.
This is a configuration in which the S RAM is backed up by a battery or the like. If the contents of the memory are saved using a backup means such as a battery, the handling becomes very difficult.

Therefore, according to the present invention, protective measures are taken to prevent the memory contents from being lost even if the power is turned off while the memory cassette is attached to the device, or even if the memory cassette is inserted or removed while the device is powered on. has been developed to simplify its handling.

Hereinafter, the memory cassette of the present invention will be explained in detail by exemplifying the case where the memory cassette of the present invention is applied to a word processor. Although the present invention will be explained using a word processor, it is not limited to this, and it goes without saying that it can be implemented on any device used as an external storage device.

FIG. 1 is a perspective view showing the appearance of a word processor to which the memory cassette of the present invention is applied. As shown in the figure, we have created a compact and portable word processor. In the figure, 1 is a keyboard for inputting data, 2 is a liquid crystal display device for displaying inputted information, etc., 3 is a main body of a printer unit for making hard copies, and 4 is a main body for making a memory cassette 5 according to the present invention removable. This is an opening provided in the word processor body. The keyboard 1 is foldably provided on the main body of the word processor, and especially when folded facing the liquid crystal display 2,
As shown in FIG. 2, the word processor can be made compact. Normally, in the state shown in FIG. 2, the memory cassette 5 is removed, but an opening 6 is also provided in the part of the keyboard 1 corresponding to the memory cassette 4 so that there is no problem when the keyboard 1 is folded with the keyboard 1 still attached. is forming. Further, although the word processor shown in the figure has a built-in printer 3, the printer may be removed to form the configuration shown in FIG. 3, thereby making the word processor more compact.

FIG. 4 is a block diagram showing the entire circuit configuration of the word processor shown in FIG. 1. In the figure
The CPU 11 processes text information etc. input from the keyboard 1 according to the program 12 in the program memory 7, displays it on the liquid crystal display device 2, for example, and stores the input information in the internal text memory 13. . In addition, if the input information is to be converted into kana-kanji, it is converted into kanji using the kana-kanji conversion dictionary 14, and is displayed on the display device 2 and simultaneously stored in the internal text memory 13. let Further, information is written to or read from the external memory 5 via the memory cassette interface 15 in accordance with information input from the keyboard 1. When the contents of the internal text memory 8 are to be hard-copied, the printer 3 is driven to print the text. The CPU 11 executes the above-described processing according to the program 12 in the program memory 7 in response to information input from the keyboard 1, and creates and edits sentences.

As shown in FIG. 4, the external memory, that is, the memory cassette 5, may be a memory _5-1 for storing sentences, a memory _5-2 for registering words, a memory _5-3 for converting kana-kanji suitable for the user, etc. , but not limited to these. For example, a word processor not only processes text according to the program memory 12, but also may have its programs stored in the memory cassette 5 so that it can be used as a personal computer, for example. Each cassette memory 5 may be converted and used only once, but it goes without saying that a plurality of cassette memories 5 may be installed and used at the same time.

In the memory cassette 5 of the present invention, for example, the cassette memory _5-1 for storing text, at least 1 to
Requires 8K bytes of storage capacity. With a CMS RAM having a capacity of 8K bytes, even if a backup battery is provided, the memory cassette 5 can be accommodated in a size of, for example, 60 mm x 80 mm x 10 mm. Furthermore, the memory cassette interface housed within the main body of the device does not require a large-scale controller such as a floppy disk or magnetic bubble, and can be realized with a simple interface described later. Further, the power consumption is from several μW to several mW, and the main body can be powered by a battery. Furthermore, the standby current of a memory cassette is less than a few μA, and a small lithium battery can store data for about 10 years. By using the memory cassette 5 in this manner, the word processor is much smaller, lighter and consumes less power than conventional word processors using floppy disks or the like. Incidentally, the same can be said of the other memory cassettes 5 _-2 and 5 _-3 .

The text storage memory cassette _5-1 is used to store the information stored in the text internal memory 13 after the text is created, if you want to use the text once you have created it many times, or if there is a possibility that you will use it again and again. be done.
Then, insert memory cassette _5-1 when necessary.
The information is input into the internal text memory 13. The text storage memory cassette _5-1 is used when this information is displayed on the display device 2 and a formal text is created and edited by correcting and inserting characters.

In addition, the memory cassette _5-2 for registering words and phrases is useful because when creating sentences using a word processor, the same words or phrases often appear, and in such cases it is not necessary to input long phrases or phrases each time. Since it is tedious to input the same phrase, we add a simple heading to the phrase and register it (memorize).
are doing. As a result, from now on, just by inputting the heading, the word registration memory cassette _5-2 is used to recall the word. For example, if you add the heading "WP" to "Word Processor", you can call up "Word Processor" by entering "WP" from the next time. Some of these registered words and phrases are used temporarily, but proper nouns such as addresses, names, and company names, as well as phrases such as greetings, are not temporary for one document, and are useful if they can be used later. It is. In particular, Japanese word processors that use the kana-kanji conversion method input kana characters and convert them to kanji while referring to a word dictionary.However, when inputting a word that is not listed in the word dictionary, it is necessary to input a word that is not listed in the word dictionary. It is necessary to convert each character into kanji, which is time-consuming.
In such a case, if you use the word registration and word reading functions of the memory cassette _5-2 mentioned above and register words written in kanji with kana characters as headings,
From next time onwards, you will be able to get the required kanji notation just by entering the kana characters. This kind of function is generally called a user dictionary, and has been around for a long time. Conventionally, words registered in this way are stored in internal volatile memory (RAM), so when the power is turned off, the stored contents are lost. had been lost. or,
Some devices are stored in external memory such as floppy disks, but this not only increases the size of the device, but also
There was also the problem that it took time to register and call. When the memory cassette 5 of the present invention is used,
As equipment becomes smaller, for example, CM
Since S RAM is used, there is no practical problem in access time. Furthermore, since the cassette 5 is removable, the user can use a personal word registration cassette. Another advantage is that special cassettes for personal names, company names, addresses, etc. can be made and used depending on the purpose. It should be noted that the text storage memory cassette _5-1 is also registered with a heading at the time of registration, and it is only necessary to input the heading when reading.

Next, the memory cassette _5-3 for kana-kanji conversion will be explained. The kana-kanji conversion type Japanese word processor inputs kana and converts it into kanji while referring to a word dictionary to create a document, and has a built-in dictionary 14 for conversion. The normally built-in dictionary 14 contains only basic words and everyday words, and does not contain proper nouns or specialized terms. These dictionaries vary widely depending on the users who use them, and if a dictionary that covers all of them is included, the memory capacity will increase, the device will become larger, and the cost will increase. Furthermore, if these dictionaries are stored in an external storage device such as a floppy disk, not only will the device become larger, but it will also take time to search. In the present invention, the internal conversion dictionary 1 is inserted into the above-mentioned memory cassette interface 15 by inserting an RM-format proper noun or technical term dictionary supplied by the manufacturer.
4, it is possible to realize a small and high-speed word processor.

By attaching the memory cassette 5 as described above to a word processor, writing etc. can be made easier and more convenient, and by converting the memory cassette 5, it can not only be used as a word processor, but also be used as a personal computer. It is possible. Furthermore, since the memory cassette 5 can be made smaller than conventional floppy disks, etc., the memory itself can be easily replaced and handled.

Next, the contents of the memory are protected from being lost when the memory cassette 5 of the present invention is inserted or removed.
The configuration of the interface section of the present invention will be explained.
FIG. 5 is a diagram showing the circuit configuration of the interface section. The memory cassette 5 has V _CST ,1, for connection to the main body of the word processor.
ADB,,,,DTB,
2. Has connection terminals such as GND. The above V _CST is a power supply terminal for supplying power from the main body to the memory cassette 5, and GND is a ground connection terminal.

ADB is a connection terminal of an address bus for reading from or writing to the storage section of the memory cassette 5, and DTB is a connection terminal for storing (registering) information in the addressed storage section of the memory cassette 5 or information stored in the storage section. CPU 11 or storage unit 5
a bidirectional data bus connection terminal for transmitting to 1;
or installed memory cassette 5
The connection terminal for supplying the select signal for selecting the
A connection terminal for supplying a write signal for writing data supplied via the DTB,
is a connection terminal for supplying a continuation signal for reading out information in the storage section of the memory cassette 5. Further, 1 and 2 are connection terminals for supplying a signal to detect whether or not the memory cassette 5 is inserted. The reason why these connection terminals 1 and 2 are provided at both ends of the cassette 5 is to ensure reliable insertion detection of the cassette 5. 1 and 2 on the memory cassette 5 side are connected, 2 on the main body side is connected to the ground, and 1
is connected to the S terminal of CPU11. Therefore,
If the connection between 1 and 2 is not made,
The S terminal of the CPU 11 does not fall to the ground level via the resistor _R7 , and the CPU 11 does not perform data transmission processing with the memory cassette 5.

In other words, if one of the terminals 1 or 2 is floating, it means that the memory cassette 5 has been inserted diagonally, and there is a strong possibility that the other terminals are also floating. This means that the memory cassette 5 is securely connected, and reliable insertion of the memory cassette 5 can be detected.

The memory cassette 5 is a storage section 5 for storing information.
1. It has a backup battery 52 for storing the contents of the storage section 51. In the storage unit 51, power from a battery 52 is supplied to a Vcc power terminal via a diode 57, and a connection terminal,
, the power from the battery 52 is supplied to the input terminals connected to the cassette select, write, and read terminals via resistors R8, R9, and R10, and the standby state is set. Ru. Further, address information is inputted from the connection terminal ADB through the resistor array 53 and through the address bus 54 to the storage section 51, and according to this address information,
Data is input or output from the DTB via a resistor array 55 and an address bus 56.

On the other hand, on the main body side of the word processor, the power supply + Vcc
(+5V) is connected to the connection terminal V _CST via a backflow prevention diode 60. The CPU 11 converts information input through the keyboard 1 into address data, and outputs the data to the ADB via an address bus 61 and an interface circuit 62. Also
The CPU 11 transmits the data to be stored (registered) to the DTB via the data bus 63 and the interface circuit 64, or reads the registration information from the storage section of the memory cassette 5 and transmits it to the internal text memory 13. Part of the information on the address bus 61 is input to a decoder 65, and a selection signal for selecting the installed memory cassette 5 is output. This selection signal sets the interface circuits 62 and 64 into an operating state. Further, the selection signal is supplied to one side of the gate circuit 66. Since the other input terminal of the gate circuit 66 is connected to ground, if a selection signal is output, the signal is output as is.

The CPU 11 not only inputs and outputs data such as the address data or sentences described above, but also outputs a write signal for registering and storing generated data in the storage unit 51 and a read signal for reading the stored data. These signals are input to gate circuits 67 and 68, respectively. Like the gate circuit 66, the gate circuits 67 and 68 have a selection signal supplied to one of their input terminals, so when the selection signal is output, they enter an operating state and output a write signal and a read signal. The read signal is also supplied to the interface circuit 64, and the interface circuit 6
4 is opened in the direction of transmitting information read from the storage section 51 of the memory cassette 5 to the CPU 11 side. Further, if the read signal is not output, the direction of the interface circuit 64 for transmitting data to the storage section 51 is released, and the direction of data transmission is controlled.

The outputs of the gate circuits 66, 67, 68 are supplied to the base terminals of transistors 70, 71, 72. The transistors 70, 71, 72 have their collector terminals connected to each connection terminal, .
The emitter terminal is connected to ground. Reference numeral 69 is a power outage detection circuit, which detects whether the word processor is powered on or off, or detects a power outage. The power failure detection circuit 69 includes resistors R1, R2, resistors R3, R4,
A voltage divided by resistors R5 and R6 is supplied to the bases of each transistor 70, 71, and 72. Outputs of gate circuits 66, 67, 68 are “L”
That is, if the selection signal CE is not output, even if current is supplied from the power failure detection circuit 69, the base potentials of the transistors 70, 71, and 72 will be approximately at the ground level, and the transistors 70, 7
1 and 72 are in the OFF state. Furthermore, the gate circuit 6
6, 67, and 68 use open collector outputs, and cut off the "H" output. That is, when the power failure detection circuit 69 detects a power failure or a drop in the power supply voltage Vcc, the bases of the transistors are brought to the ground level or a high impedance state, and the outputs ("H") of the gate circuits 66, 67, and 68 are used to connect the transistors 71 and 71, 72 from operating.

In order to better understand the structure of the above-mentioned interface section, its operation will be explained. This circuit operates regardless of the ON/OFF state of the main unit's power supply, even if the memory cassette 5 is inserted or removed, or if the main unit power supply is turned off with the cassette 5 inserted.
This is a circuit configuration in which the stored contents of the storage unit 51 are protected even when turned on and off. However, memory cassette 5
Read or write
If you insert or remove cassette 5 while
Since the stored contents are not guaranteed, the cassette must be locked or an indicator is provided to show whether the cassette can be inserted or removed. In other words, the transistor 72 or 71 is activated (ON) in the read or write state, and this is used to act as a lock mechanism to prevent the inserted memory cassette 5 from being pulled out, or to turn on the lamp to prevent the read or write operation. Inform the user that writing is in progress.

When the memory cassette 5 is removed from the main body, the storage section 51 consisting of CMS RAM is supplied with a power supply voltage Vcc for memory retention from the built-in battery 52. At this time, the input terminals for selecting, writing, and reading the storage section 51 are as follows.
Power from a battery 52 is applied through resistors R8, R9, and R10, respectively, and an address input terminal,
Since the data input/output terminals are grounded via the resistor arrays 53 and 55, the memory section 51
is on standby. For the battery 52, a standby voltage of about 2V and a standby current of about 1 μA are sufficient.

On the other hand, according to the word processor itself,
If a cassette is not inserted, the S terminal of the CPU 11 is not connected to the ground, so the CPU 11 does not derive address information, registration data, etc., and does not derive a cassette select signal via the decoder 65. Therefore, even if the main unit's power is turned on, the power failure detection circuit 69 detects that the transistor 7
Although the operating current is supplied to the bases of transistors 70, 72, since the outputs of gate circuits 66, 67, 68 are "L", transistors 70, 7
1 and 72 are in the OFF state, and the connection terminals , , are in the open state. Moreover, since the select signal is not output, the interface circuits 62 and 64
(Connection terminals ADB, DTB) are not set to the operating state and are in a high impedance state. Therefore, in this state, even if the memory cassette 5 is inserted or removed, the memory cassette 5 is maintained in the cassette side state.

Next, when the memory cassette 5 is inserted into the word processor main body, each connection terminal is connected. Here, if the power to the word processor itself is turned off, the memory cassette 5 is maintained in a standby state. Even if the connection terminal V _CST is connected, the battery 52 is prevented from flowing into the main body by the backflow prevention diode 60. Even if the power to the word processor is turned on, if a select signal or the like is not output, the memory cassette 5 inserted as described above remains in the cassette side state. Here, when the memory cassette 5 is inserted correctly and the connection terminals V _CST and GND are connected, the power supply Vcc on the main body side is higher than the voltage supplied from the battery 52 in the cassette, so the subsequent power supply is is supplied from the main unit. At this time, the operating voltage +5V is applied to the Vcc terminal of the storage section 51 of the memory cassette 5.
is supplied, and diode 57 prevents current from flowing back to battery 52. When the memory cassette 5 is inserted, the S terminal of the CPU 11 becomes ground level through 1 and 2 arranged near both ends of the connector (when no cassette is inserted, the S terminal is connected to the power supply Vcc via the resistor R7). (The signal becomes "H" because the cassette 5 is inserted.) It is possible to detect that the cassette 5 is inserted.

The CPU 11 enables data transmission with the memory cassette 5 by connecting the S terminal to the ground. In other words, if the information input using the keyboard 1 is for reading out registered text etc. from the inserted memory cassette 5, the CPU 11 reads the information from the memory cassette 5, especially the memory, according to the program in the program memory 12. Part 51
Address information specifying the storage area of the text (data) registered in is derived through the address bus 61. Part of this address information is sent to a decoder 65, and a select signal for selecting a cassette is output. One of the inserted memory cassettes is selected by this select signal,
Interface circuits 62 and 64 are set to an operational state. Also, the output of the gate circuit 66 is “L”
The select signal is inverted from "H" to "H", and the transistor 70 is turned on. A select signal is supplied to the select terminal of the storage section 51 of the memory cassette 5. In other words, storage unit 5
1 is set to be readable and writable. Then, the address information output from the CPU 11 is
It passes through the interface circuit 62 and the address bus 54 on the memory cassette 5 side, and then connects to the storage section 5.
1. In this state, an area corresponding to the address information is specified in the storage unit 51.

Next, when the CPU 11 outputs a command for reading, that is, a read signal, the transistor 72 is turned on, and the read signal is supplied to the read terminal of the storage section 51. As a result, the text (data) in the area specified by the address information is read from the storage section 51 and supplied to the main body via the data bus 56 and the resistor array 55. At this time, the interface circuit 64 enables signal transmission from right to left in the figure using a read signal, and the read text is sent to, for example, the internal text memory 13 via the CPU 11 and stored. .

Further, when it is desired to record a sentence or phrase, the information (heading, etc.) is input from the keyboard 1, and the CPU 11 outputs address information specifying the registration area according to the heading.
outputs a signal for selecting the inserted cassette 5. The CPU 11 transfers data (sentences, words, etc.) stored in the internal text memory to the data bus 6.
3 and outputs a write signal for writing.

On the other hand, on the memory cassette 5 side, the storage area of the storage section 51 is specified by the transmitted address information, and the write signal is supplied, so that the data transmitted via the data bus 56 is transferred to the storage section 51.
1 in the specified area.

Writing or reading data is executed in the manner described above. Here, if the cassette 5 is pulled out during reading or writing, the stored contents of the storage section 51 are not guaranteed, but since the transistor 71 or 72 is ON during reading or writing, this prevents the pulling out of the memory cassette 5. Just prevent it.

Next, a description will be given of the effect of protecting the stored contents of the storage section 51 in the memory cassette when the power of the main body is turned on and off with the memory cassette 5 inserted. The power to the main unit is turned off and the power is turned off.
When the voltage of Vcc decreases, the power failure detection circuit 6
9 is activated, bringing its output to ground or a high impedance state. As a result, the gate circuit 66,
Since 67 and 68 are open collector outputs, the transistors 70 and 68 are output from the power failure detection circuit 69.
If no current is supplied to the bases of transistors 71, 72, even if the gate circuits 66, 67, 68 are in the "H" state, the transistors 70, 71, 72 will be OFF, and their respective outputs, .

becomes open. Therefore, memory cassette 5
Since the voltage of the battery 52, for example, is supplied to the select, write, and read terminals via resistors R8, R9, and R10 on the side, the storage section 51 is in a standby state. Conversely, even when the main unit's power is turned on, the output of the power failure detection circuit 69 is grounded or open until the power supply Vcc reaches the specified voltage (5V), and the output of the memory cassette 5 remains in the ground or open state, just like when the power is turned off. The storage unit 51 enters a standby state. and
When Vcc reaches a specified voltage and the CPU 11 and other circuit elements on the main body side begin to operate normally, the output of the power failure detection circuit 69 begins to supply current via resistors R1, R3, and R5. Thereafter, the memory cassette 5 can be read and written under the control of the CPU 11.

As explained above, in the present invention, a storage device that stores data necessary for a device or stores data that can be read out using a backup battery power source can be freely attached to and detached from the device. A select signal terminal, a write signal terminal, and a read signal terminal of the storage device, each indicating that the storage section is selected, are connected to the backup battery power source and the device side power source when connected to the device. The standby state is set by applying a predetermined signal to each terminal by connecting the terminal via a resistor, and
Regarding each signal of a select signal, a write signal, and a read signal that are output in response to the detection by the detection means that detects the attachment of the storage device to the device on the device side and enables data transmission between the storage section and the device. The standby state is released from the select signal terminal, the write signal terminal, and the read signal terminal of the storage device by performing a logical product with the output signals from the respective power failure detection circuits, and the select signal, write signal, and read signal are respectively sent to the select signal terminal, write signal terminal, and read signal terminal. The configuration includes a control circuit that applies voltage to each of the select signal terminal, write signal terminal, and read signal terminal of the storage device during power outage of the device, including when the storage device is connected to and removed from the device and when the device power is turned off. To,
Since the backup battery power source or the device side power source is always connected and the device is set to standby state with a predetermined signal applied, even if noise etc. enters the terminal for some reason when it is connected or disconnected, it will not be memorized. Data is reliably protected, and since the standby state is canceled by the output from the control circuit in a state where data can be transmitted after the storage device is installed in the device, read/write operations can also be performed by the device. The standby state can be set in a stable state, and the standby state can be set using a simple configuration in which a signal of a predetermined voltage is applied to each terminal using the backup battery power source equipment side power source. .

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing the external appearance of a word processor using a removable storage device according to the present invention, FIG. 2 is a perspective view showing the word processor of FIG. 1 in a folded state, and FIG. FIG. 4 is a perspective view showing another embodiment of the word processor, FIG. 4 is a block diagram showing a schematic configuration of the word processor, and FIG. FIG. 3 is a circuit configuration diagram showing a specific example. 1: Keyboard, 2: Display device, 3: Printer, 4: Opening, 5: Memory cassette, 51: Storage section, 52: Battery, 11 CPU, 65: Decoder for cassette selection, 66, 67, 68: Gate circuit , 69: Power outage detection circuit, 70, 71, 7
2: Transistor, 1, 2: Connection terminal for detecting cassette insertion,
,: Connection terminal for writing/reading of the storage section, etc.

Claims (1)

[Claims] 1. A storage device that is removably attached to the device is provided with a storage unit that can store or read data necessary for the device and retains the stored data using a backup battery power source. A select signal terminal indicating that the storage section is selected, a write signal terminal, and a read signal terminal are connected to the backup battery power source and the device side power source through resistors when connecting to the device, respectively, and The device is configured to set a standby state by applying a predetermined signal to the device, and the device side detects attachment of the storage device to the device and responds to the detection by the detection means that enables data transmission between the storage unit and the device. The output signals of the select signal, write signal, and read signal are logically ANDed with the output signal from the power failure detection circuit, respectively, and outputted to the select signal terminal, write signal terminal, and read signal terminal of the storage device. A removable storage device comprising a control circuit that cancels the standby state and applies a select signal, a write signal, and a read signal, respectively.