JPS62281575A - Contrast and brightness adjusting circuit - Google Patents

Abstract

PURPOSE:To obtain a picture having no white collapse and black collapse by correctly obtaining the average value of the amplitudes of digital luminance signals during several field periods, the maximum value and the minimum value of the periods and adjusting the contrast and the brightness based on the output. CONSTITUTION:The luminance signal separated from a digital video comes to a luminance signal input terminal 1. The second average value circuit 5 divides the output of an integrating circuit 4 by the number of scanning lines during its cumulative addition period to obtain the average value. A maximum value detecting circuit 7 detects the maximum value during the prescribed period of the luminance signal incoming to the input terminal 1 and the second comparator 8 compares the output of the maximum value detecting circuit 7 with an upper limit set value in the vicinity of a white peak. A minimum value detecting circuit 9 detects the minimum value during the prescribed period of the luminance signal incoming to the input terminal 1 and the third comparator 10 compares the output of the minimum value detecting circuit 9 with a lower limit set value in the vicinity of a black peak. A control circuit 11 automatically determines the contrast adjusting value 16 and the brightness adjusting value 15 from the outputs of the first, the second, and the third comparators 6, 8, 10.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention provides image flyback and This invention relates to a contrast/brightness adjustment circuit that adjusts the contrast by 9j3m.

[Conventional technology]

FIG. 8 shows a conventional contrast/brightness adjustment circuit disclosed in, for example, Japanese Unexamined Patent Publication No. 59-23978. In the figure, 1 is a luminance signal input terminal, and 2 is a first 3 is a first average value circuit that uses the output of this integration circuit 2 manually; 17 is a subtracter that uses the input of the first integration circuit 2 and the output of the first average value circuit 3 as inputs. It is.

1 is a brightness adjustment value register, 12 is an adder that receives the output of the first average value circuit 3 and the output of the brightness adjustment value register 18, 19 is a contrast adjustment value register, and 13 is the output of the subtracter 17. 20 is an adder that receives the output of adder 12 and the output of multiplier 13 as input; 14 is the output of adder 20 and is a brightness signal output terminal; .

Next, the operation will be explained.

The luminance signal separated from the digital video signal arrives at the luminance signal input terminal 1. The first integrating circuit 2 integrates the luminance signal arriving at the input terminal 1 over a predetermined period To, for example, one horizontal period excluding the flyback period, and applies the integration result to the next period of TI, for example. 1
It is output over a horizontal period.

Here, as shown in FIG. 2, the first integrating circuit 2 includes an adder 21 . The adder 21 adds the luminance signal arriving at the input terminal l and the output signal of the launch 22, and supplies the addition result to the launch 220 input. The latch 22 latches the input signal in synchronization with the digital data of the luminance signal arriving at the input terminal 1 or at the timing of the sample clock 25, and the output is cleared to zero during the flyback pulse 240 period. Further, the flyback pulse 24 clears the latch 22 and is simultaneously supplied to the latch 23 as a latch pulse. Therefore, the integration result is latch 2
3, and this is input to the first average value circuit 3. Then, the average value circuit 3 divides the integrated value of the output of the integrating circuit 2 by the integration time TO to obtain an average value. Here, the integration time can be considered to be the number of additions NA performed by the adder 21 during this period. NA is NA = (T H - T F B ) / T ST
H: 1 horizontal period TFB: Flyback period TS: Given by sampling period. Therefore, in the average value circuit 3, the integrating circuit 2
It is sufficient to divide the integral value of the output by NA.

In actual circuits, in order to save the amount of hardware, “NA”
``Instead of dividing by 2-Z + 2-1+2-'=L/NA) c, y, and z are positive integers, and an operation using X<y<z is performed.

Specifically, as shown in FIG. 3, the integral value of the output of the integrating circuit 2 is calculated as an "approximate value of NA" using power-of-2 multipliers 26, 27° 28 and adders 29, 30. It's dividing.

Multipliers 26, 27, and 28 each multiply the integral value of the output of the integrating circuit 2 by 2. 2. It is multiplied by 2 and output.

In this way, by the above-described calculation in the average value circuit 3, the average value of the ri degree multiplied signal image portion arriving at the input terminal 1, that is, the DC component, is obtained at the output of the average value circuit 3.

Next, the DC component of the output of the average value circuit 3 is subtracted from the luminance signal arriving at the input terminal 1 in the subtracter 17, and the AC component of the image portion of the luminance signal is obtained at the output of the subtracter 17. The DC component that is the output of the average value circuit 3 corresponds to the brightness of the image, and the AC component that is the output of the subtractor 17 corresponds to the contrast and sharpness, respectively.

The output of the average value circuit 3 is input to the adder 12 and added to the set value of the brightness adjustment value register 18, thereby performing brightness adjustment.

The output of the subtraction 2517 is input to the multiplier 13 and multiplied by the set value of the contrast adjustment value register 19, thereby performing contrast adjustment. The output of the adder 12 and the output of the multiplier 13 are added by an adder 20 and output to the luminance signal output terminal 14. In this way, contrast and brightness are individually set to 1! i! It can be arranged.

[Problem that the invention seeks to solve]

Since the conventional contrast/brightness adjustment circuit is configured as described above, the contrast/brightness adjustment values are fixed once determined. Therefore, the contrast ratio corresponding to the temporal change in the amplitude of the input luminance signal
There was a problem in that it was difficult to optimally adjust brightness.

This invention was made to solve the above problems, and corresponds to the temporal change in the amplitude of the input luminance signal.
It is an object of the present invention to provide a contrast/brightness adjustment circuit that can automatically adjust the contrast/brightness to the maximum value.

[Means for solving problems]

The contrast/brightness adjustment circuit according to the present invention manually generates a luminance signal separated from a digital video signal, integrates this signal over a predetermined period TO (period excluding the flyback period in one horizontal period), and a first integrating circuit that outputs the integration result over a period TI (one horizontal period); a first average value circuit that calculates and outputs the average value of the output signal of the first integrating circuit over a period TO; The output signals of the first average value circuit are cumulatively added for each period TI over a predetermined period T2 (period excluding the vertical retrace period from the several field period), and the addition result is added for the period T3.
a second integrating circuit that outputs an output signal over a period T2 (several field periods); a second average value circuit that calculates and outputs an average value of the output signal of the second integrating circuit over a period T2; A first comparator that compares the output signal of the circuit with a first set value, which is an optimal average value that effectively utilizes the dynamic range of the CRT, and a second set value that sets the maximum value of the luminance signal during period T2. a second comparator that compares the minimum value of the luminance signal in the period T2 with a lower limit value near the black peak, which is a third set value; , a control circuit that outputs an optimal brightness adjustment value and contrast adjustment value over a period T3 according to the comparison results with the first to third comparators; and a control circuit that adds the brightness adjustment value to the input luminance signal. The apparatus includes an addition circuit and a multiplication circuit that multiplies the input luminance signal by the contrast adjustment value.

[Effect]

In this invention, the average value, maximum value, and minimum value of the amplitude of the digital luminance signal over several field periods are accurately determined, and the optimum average value and the value near the white peak are calculated by effectively utilizing the dynamic range of the CRT. Since the contrast and brightness are adjusted by comparing the upper limit value and the lower limit value near the black peak, automatic adjustment of the contrast and brightness can be performed satisfactorily without any crushed whites or crushed blacks.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

In FIG. 1, 1 is a luminance signal input terminal, and 2 is the terminal 1.
3 is a first averaging circuit whose input terminal is the output of the first integrating circuit 2, and 4 is a second averaging circuit whose input is the output of the first averaging circuit 3. an integrating circuit; 5 is a second average value circuit that receives the output of the second integrating circuit 4;
6 is a first comparator which receives the output of the second average value circuit 5 as an input.

7 is a maximum value detection circuit for the input luminance signal; 8 is a second comparator which receives the output of the maximum value detection circuit 7; 9 is a minimum value detection circuit for detecting the minimum value of the input luminance signal; 10 is a minimum value detection circuit; This is a third comparator that receives the output of the value detection circuit 9 as an input.

11 is a first comparator 6° and a second comparator 8. 15 is a brightness adjustment value output from the control circuit 11; 12 is an adder that receives the input luminance signal and the brightness adjustment value 15; 16 is a control circuit; The contrast adjustment value 13 is output from the circuit 11, and 13 is the output of the adder 12 and the contrast E set value 16.
14 is the output of the multiplier 13 and is a luminance signal output terminal.

Next, the operation will be explained.

The luminance signal separated from the digital video signal arrives at the luminance signal input terminal 1. The operations of the first integrating circuit 2 and the first averaging circuit 3 are completely the same as those of the conventional example, and therefore will not be described here. The second integrating circuit 4 cumulatively adds the output of the first average value circuit 3 over a predetermined period T2, for example, several field periods excluding the vertical retrace period, every period TI, for example, one horizontal period. . Then, the addition result is output for the next T3 period, for example, several field periods.

The second average value circuit 5 divides the output of the second integration circuit 4 by the number of scanning lines in the cumulative addition period T2 to obtain an average value.

The circuit configurations of the second integrating circuit 4 and the average value circuit 5 are exactly the same as those of the conventional first integrating circuit 2 and average value circuit 3. Therefore, the output of the second average value circuit 5 is the average value (hereinafter referred to as APL) of the amplitude of the sampling data of the image in the previous few field periods of the luminance signal arriving at the input terminal 1. The first comparison D6 compares the APL value output from the second average value circuit 5 with an optimal APL setting value C1 that effectively utilizes the dynamic range of the output CRT.

Further, the maximum value detection circuit 7 detects the maximum value in a predetermined period T2 of the luminance signal arriving at the input terminal 1, and the second comparator 8 detects the output of the maximum value detection circuit 7 and the upper limit value near the white peak. Compare with set value C2. On the other hand, the minimum value detection circuit 9
detects the minimum value of the luminance signal arriving at the input terminal 1 during a predetermined period T2, and the third comparator 10 compares the output of the minimum value detection circuit 9 with a lower limit set value C3 near the black peak.

The control circuit 11 is the first. Second. Third comparator 6°8.10
The contrast adjustment value 16 and the brightness adjustment value 15 are automatically determined from the output of , and the detailed operation thereof will be explained below.

1st. Second. The output signal patterns of the third comparator 6.8.10 are eight patterns a to h shown in FIG. Here, H indicates an output signal of each comparator when the set value is exceeded, and L indicates an output signal of each comparator when the set value is not exceeded. Input luminance signal and setting values of each comparator 6.8.10 in case of a - h C1, C2,
The relationship with C3 is shown in Figure '5A4.

First, when the output of the first comparator 6 is L (a.

Cases b, c, and d) will be explained. In this case, A
Since the value of P L is smaller than the optimum value, a visually preferable image can be obtained by increasing the values of contrast adjustment value 15 and brightness adjustment value 16. However, if the output of the third comparator 10 is 1 (or the output of the third comparator 8 is H
In the case (cases b, c, and d), data near the black peak and data near the white peak exist, so increasing the value of the contrast adjustment value 16 causes crushed blacks and crushed whites. Therefore, no contrast adjustment is performed in this case. Similarly, when the output of the second comparator 8 is H (c,
In the case of d), there is data near the white peak, so
Increase the value of brightness adjustment value 15 (this will cause white collapse. Therefore, in this case, brightness adjustment is not performed.

Next, if the output of the first comparator 6 is I] (e, f.

g, h) will be explained. In this case, since the value of APL is larger than the optimum value, a visually preferable image can be obtained by reducing the values of brightness adjustment value 15 and contrast adjustment value 16. However, the output of the third comparator 10 is H
In the case of (f, h), there is data near the black peak, so if the value of the brightness adjustment value 15 is decreased, black-out occurs. Therefore, in this case, brightness adjustment is not performed. Here, if the contrast is not adjusted, the value of the contrast adjustment value 16 must be "1", and if the brightness is not adjusted,
The value of brightness adjustment value 15 must be "0".

The above results are shown in FIG. The result of FIG. 7 shows that the first logic circuit 32. Second logic circuit 33
．． Third logic circuit 35. Up/down counter 34.3
It can be composed of 6. The first logic circuit 32 is connected to the first logic circuit 32 according to FIG. Second. From the output of the third comparison g56.8.10, the brightness adjustment value "0" is output 37. Brightness adjustment amplifier down output 38. A contrast adjustment value "1" output 39 and a contrast adjustment value up/down output 40 are determined. The vertical synchronization signal 31 outputs the output 38, 39 for a period T
This converts the up/down counters 34 and 36 into clocks that count at the beginning of 3. Then, the second logic circuit 33 determines whether the brightness adjustment value 15 should be the output of the up/down counter 34 or O based on the value of the brightness adjustment value "0" output 37. Third
Based on the value of the contrast adjustment value "1" output 39, the logic circuit 35 determines whether the value of the contrast adjustment value 16 is to be the output of the up/down counter 36 or . Note that the judgments a, e, and f in FIG. 7 were made based on the fact that a visually preferable image can be obtained with a larger contrast.

When the brightness adjustment value 15 and the contrast adjustment value 16 are determined by the control circuit 11, the brightness adjustment value 15 is added to the brightness signal arriving at the input terminal 1 by the adder 12 for brightness adjustment, and the multiplier 13 performs contrast adjustment. Contrast adjustment is performed by multiplying by a value of 16, and a contrast/brightness adjusted digital brightness signal is obtained at the brightness signal output terminal 14.

〔Effect of the invention〕

As described above, according to the present invention, the average value of the amplitude of the digital luminance signal over several field periods and the maximum and minimum values for that period are accurately determined, and the contrast and brightness are calculated based on the output. Since the adjustment is performed, there is an effect that automatic adjustment of contrast and brightness can be carried out effectively without blown-up whites or blown-up shadows.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a contrast/brightness adjustment circuit according to an embodiment of the present invention, FIG. 2 is a block diagram of an integrating circuit in the circuit, and FIG. 3 is a block diagram of an average value circuit in the circuit. 4 is a diagram showing the correspondence between the input luminance signal and all the output turns of the three comparators in the circuit of FIG. 1, FIG. 5 is a block diagram of the control circuit in the circuit of FIG. 1, and FIG. FIG. 7 is a diagram showing the pattern of the output signals of the three comparators in the circuit of FIG. 1, and FIG. 7 is a diagram showing the correspondence between the pattern of the output signals of the comparators and contrast/ply-ness adjustment. FIG. 8 is a diagram showing the prior art. FIG. 2 is a configuration diagram of a contrast/brightness adjustment circuit according to FIG. 2.4... 1st. second integration circuit, 3.5...first
゜Second average value circuit, 6, 8.10... 1st. 2nd degree third comparator, 7... Maximum value detection circuit, 9... Minimum value detection circuit, 11... Control circuit, 12... Adder,
13... Multiplier, 15... Brightness adjustment value, 1
6...Contrast adjustment value. Note that the same reference numerals in the figures indicate the same or equivalent parts. Figure 2 Broom 3 Figure Broom 4 Figure C3 (3 Figure 5 Figure 6

Claims (1)

[Claims] (1) In a television receiver that performs signal processing after digitizing a video signal, the luminance signal separated from the digital video signal is input, and this signal is transmitted during one horizontal period excluding the flyback period. a first integrating circuit that integrates over T0 and outputs the integration result over one horizontal period T1; and a first average value that calculates and outputs the average value of the output signal of the first integrating circuit over the period T0. The output signal of the first average value circuit is transmitted over a period T obtained by subtracting the vertical retrace period from the several field period T3 for each period T1.
a second integrating circuit that performs cumulative addition over the period T2 and outputs the addition result over the period T3; and a second averaging circuit that calculates and outputs the average value of the output signal of the second integrating circuit over the period T2. a value circuit; a first comparator that compares the output signal of the second average value circuit with a first set value; and detects the maximum value of the luminance signal during the period T2 and outputs it over the period T3. a maximum value detection circuit; a second comparator that compares the output signal of the maximum value detection circuit with a second set value; and detects the minimum value of the luminance signal during the period T2 and outputs it over the period T3. a minimum value detection circuit; a third comparator that compares the output signal of the minimum value detection circuit with a third set value; a control circuit that outputs the brightness adjustment value and contrast adjustment value over the period T2 over the period T3; an addition circuit that adds the brightness adjustment value to the input brightness signal; and a multiplication circuit that multiplies the brightness signal by the contrast adjustment value. A contrast/brightness adjustment circuit characterized by comprising: