JPS62233983A - Eraser - Google Patents

Abstract

PURPOSE:To eliminate the necessity for deciding an erasing range by a manual operation and to improve an operability, by controlling the erasing range of a recording medium according to the discriminating result of the type of recorded information. CONSTITUTION:A CPU40 discriminates whether a video signal recorded on a track is a field video signal or a frame video signal when the output of a level detection circuit 7 for detecting the average value of an output signal from a reproducing amplifier 6 is H level, controls switches 2, 3 and connects at least one of heads 3-1, 3-2 to a recording amplifier 16. The CPU40 controls an erasing signal generator 85 to generate the erasing signal and during a field reproducing mode, an erasing current passes only through the reproducing head 3-1, and one track os erased. When the frame reproduction is selected, the erasing current passes through both the heads 3-1, 3-2 simultaneously, and the video signals of the two tracks adjacent to the one frame are erased.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an erasing device for erasing information recorded on a recording medium.

<Prior Art> Recording and reproducing apparatuses for recording and reproducing, for example, still image information on recording media such as magnetic disks have been developed in recent years.

As such a device, a device that uses a recording/reproducing head to record, reproduce, and erase one track at a time is considered.

<Problems to be solved by the invention> Using a conventional recording/reproducing head, recording one track at a time,
In a recording/reproducing apparatus having the function of performing reproduction and erasing, the unit of erasing is one track at a time. Therefore, for example, a frame video signal recorded on a magnetic disk in which one field video signal is recorded on one track, and two field video signals constituting one frame video signal are recorded on two adjacent tracks, respectively. When deleting, manually delete each track 2 times.
There was a problem in that it was necessary to perform the process multiple times, and the operability was not necessarily good.

This problem occurs not only in devices that erase a recording medium on which a video signal is recorded as described above, but also in devices that erase one track at a time.

The present invention aims to solve the above-mentioned problems.

Means for Solving the Problems> In order to solve the above-mentioned conventional problems, the present invention provides a discriminating means for discriminating the type of information recorded on a recording medium, and a discriminating means for discriminating the type of information recorded on the recording medium. The recording medium is characterized by comprising an erasing means for erasing information, and a control means for controlling an erasing range of the recording medium by the erasing means based on the determination result of the discrimination means.

<Operation> The erasing range of the erasing means is controlled based on the type of information determined by the determining means.

<Example> The present invention will be described in detail below with reference to the drawings. In the example of the present invention described below, a still image video signal is recorded on a disk-shaped recording medium, specifically, a disk-shaped magnetic sheet. A recording and reproducing apparatus that records or reproduces a recorded still image video signal will be described.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

In FIG. 1, j is a magnetic sheet on which the recording/reproducing track of the video signal, the track pitch, and the track position are determined in advance, and the tracks are formed in concentric circles, and one field of the video signal is stored in one track. In the case of a frame video signal, one field of video signal is recorded on each of two adjacent tracks to form a frame video signal. The magnetic sheet l is placed in a jacket (not shown) in advance, and the jacket is provided with a claw to prevent accidental erasure.By breaking the claw in advance, it can be used in the same way as an audio cassette (the erasing operation is prohibited). 2.
3 is a DC motor for rotating the magnetic sheet 1 at a constant speed;
-1.3-2 is an inline type head that accesses two adjacent tracks, 3-1 accesses the outer circumferential side, and 3-2 accesses the inner circumferential side. 4 is a magnetic head 3-1.3-2
5 is a magnetic head moving mechanism that moves the magnetic head 3-1 to access the track formed on the magnetic sheet 1 when the magnetic head 3-1 accesses the innermost track on the magnetic sheet 1 by the magnetic head moving mechanism 4. The state switches from off to on, and the microcomputer (hereinafter CP
(referred to as U) 40 is an innermost detection switch that outputs an I5 level signal, 6 is a reproduction amplifier for amplifying the signal detected by the magnetic head 3-1. a level detector that detects the average value of the output signal;
8 is a comparator that detects whether the output of the level detector 7 is higher than a threshold value set by a reference voltage source (not shown); 9 is a demodulation circuit that demodulates the output signal of the reproduction amplifier 6; 1;
0 is a 1/2H delay circuit that delays the output of the demodulation circuit 9 by 1/2 horizontal scanning period (hereinafter referred to as 1/2H); 11 is a horizontal synchronization signal Hs yn c from the output of the demodulation circuit 9;
A synchronization signal separation circuit 12 separates a synchronization signal such as a vertical synchronization signal Vsync, and a synchronization signal separation circuit 12 detects a predetermined data signal from the output of the reproduction amplifier 6 according to the timing of the synchronization signal separated from the synchronization signal separation circuit 11, and extracts the data. This is a data demodulator that demodulates signals. The data signal is a signal for determining what kind of information is recorded on the track, for example, whether it is a field video signal or a frame video signal, and a signal for the date set by the user. , is a signal indicating an 11-digit number freely set by the user, and is recorded in a frequency band lower than that of the video signal at a position having a predetermined relationship with the part where the synchronization signal of the track is recorded. The reason why the demodulation circuit 9 and the data demodulation circuit 12 are provided separately here is as follows. That is, the video signal recorded on the magnetic sheet I is FM modulated, but the data signals other than the video signal are DPSK modulated (Differential Ph), which is different from FM modulation.
ase 5hft Keying) is adopted. Therefore, the demodulation circuit 9 described above is an FM demodulation circuit, and the data demodulation circuit 12 is a DPSK demodulation circuit.

Reference numeral 13 denotes a monitor for reproducing and observing video signals, and reference numeral 13' denotes a printer connected to print the video signals. Note that the printer 13' starts operating when the signal at the start signal input terminal reaches level ■], and during operation, the busy signal output terminal is set to 1. level. In contrast to the data demodulator 12, 14 is a modulator that performs DPSK modulation on data output from a CPU 40, which will be described later, and converts the video signal manually inputted from the video input terminal 18 into Hsyn and Vsync, which are separated by the synchronization signal separation circuit 17. The modulated data is output to the recording amplifier 16 at the corresponding timing.

15 is F for the video signal input from the video signal input terminal 18.
This is a recording amplifier that performs processing necessary for recording such as M modulation and outputs it to the recording amplifier 16. Reference numeral 19 denotes a reference signal generator, which generates accurate reference pulses (60 Hz) for rotating the magnetic sheet 1 and an alternating signal for erasing.

Reference numeral 20 denotes a magnetic piece provided on the above-mentioned magnetic sheet l, and as will be described later, the reference signal generator 19 uses the signal from the magnetic piece 20 to generate J,
Rotation control of the DC motor 2 is performed in synchronization with No. 2
Reference numeral 1 denotes a PG coil for detecting a signal from the magnetic piece 20 when the magnetic sheet 1 is rotated by the DC motor 2.

22 is a waveform shaping circuit that shapes the waveform of the signal output from the PG coil 21, and the output of the waveform shaping circuit 22 is manually input to a CPU 40 and a motor control circuit 23, which will be described later.

Reference numeral 23 denotes a control circuit for controlling the rotation of the DC motor 2, which receives the Vsync from the synchronization signal separation circuit 17 or the output signal of the 11:1 base signal generator 19, the output of the waveform shaping circuit 22, That is, l) the rotation of the C motor 2 is controlled so that the phase relationship with the signal from the magnetic piece provided on the magnetic sort l is in a predetermined relationship, for example, the two are always out of phase by 7H; Here, magnetic head 3-1.3-2
When a recording operation is performed, SWI is switched to the synchronous 1 word separation circuit 17 side in advance, and Vsync and
The rotation of the DC motor 2 is controlled based on the signal input from the waveform shaping circuit 22, that is, the signal from the magnetic piece 20 provided on the magnetic notebook i, and the rotation of the DC motor 2 is controlled based on the signal input from the waveform shaping circuit 22, that is, the signal from the magnetic piece 20 provided on the magnetic notebook i.
When the reproducing operation is performed by 3-2, S W l is switched to the reference signal generator 19 side, and the reference signal from the reference signal generator 19 and the signal input from the waveform shaping circuit 22, that is, the magnetic The rotation of the DC motor 2 is controlled based on the signal from the magnetic piece 20 provided on the sheet l.

23' is a driver that drives a step motor 24 for controlling the position of the head 3-1, 3-2 based on a signal from Cr'U 40, which will be described later. Head 3-1.3
-Move 2.

25' is a display circuit driven by a signal from the CPU 40, and as a display element, as shown in FIG. .2-digit 7-segment display element that displays the feed speed of 3-2, P [3, LED that displays the playback mode, REC that displays the recording mode, F that displays the LED frame mode R.A.
The device 20 consisting of FIEL D, L E [) that displays the field mode is a ROM in which the CI' U〆IO program is stored.

27 is an RA where data of the CPU 110 is temporarily stored.
It is M. 28 is a timer driven by the CPU/lO, and 2 is a crystal oscillator that generates a reference clock for the CPU 40. Note that 80 is a detection circuit connected to photo couplers 81 and 82 that constitute a detection switch for detecting whether or not the magnetic sheet 1 is inserted.

83, 8 lI and SW6 are signals such as January 9,
Data signals such as signals freely set by the user (
83 is a circuit for displaying the code ID (hereinafter referred to as ID) on the monitor 13 and printer 13-, and 83 is a circuit for displaying the Vsync and Hsync of the video signal input via SW5 for adjusting the timing of the data characters to be generated. This is a synchronous separation circuit that separates the synchronous separation circuit, and has the same configuration as the synchronous separation circuit shown as 17. 84 is character generation for generating data (characters corresponding to the day number?::) in synchronization with Vsync and Hsync separated by the synchronization separation circuit 83.Monitor 13 and printer 1.
When displaying the ID signal 1-; superimposed on the video signal, the CPU 40 gives the control 11 signal, turns SW6 on, and the synchronization signal and data signal are sent to the adder shown as ■ in Figure 1. and displayed at a specific position on the monitor 13 or printer 13'. The details will be described later.

85 is an erase signal generator for erasing signals on any track of the magnetic sheet l. Note that the AC signal for erasing is provided from the reference signal generator 19.

Here, the erasure signal generator 85 has a constant amplitude period T+ and a subsequent attenuation period T, as shown in FIG. 29, for example.
2 and is connected to the recording amplifier 16.

SWI is a switch whose state is changed by a signal from the control circuit 30 that is driven based on a signal from the CPU 40. A video signal is input from the video signal input terminal 18, and ts is input from the synchronization signal separation circuit 17. y n c
is being output, and when a signal indicating that it is in recording mode is input from the CPU, the synchronization signal separation circuit 17 and the motor control circuit 23 are connected, and Hsync is output from the synchronization signal separation circuit 17. The reference signal generator 1 is not output, or a signal indicating that the CPU 40 is in the reproduction mode is input, or the reference signal generator 1 is in the erase mode.
9 and the motor control circuit 23 are connected.

SW2 is a switch whose state is changed based on a signal from the CPU 40, and is connected to the state where the head 3-1 is connected to the recording amplifier 16, the state where it is connected to the playback amplifier 6, and whether the head 3-1 is connected to the recording amplifier 16 or the playback amplifier 6. Switch between an intermediate state in which no connections are made.

Like SW2, SW3 is a switch whose state changes based on a signal from the CPU 40, and there are two states: connecting the head 3-2 to the recording amplifier 16, connecting the head 3-2 to the reproducing amplifier 6, and connecting the head 3-2 to the recording amplifier 16 and the reproducing amplifier. Switching is made between an intermediate state in which no connection is made to any of the amplifiers 6.

When reproducing a video signal from the magnetic sheet 1, the SW4 is switched to the upper position in FIG. When the head 3-1 is connected and a field video signal is reproduced using only the head 3-1, the demodulation circuit 9 is switched to the upper side and the lower side in FIG.
The state where the CPU is connected to the CPU and the state where it is connected to the 1/2H delay circuit are alternately switched for each field.
This is a switch driven by 40.

SW5 connects the monitor 13 to the video signal input terminal 18 during recording.
This is a switch driven by the CPU 40 to connect the monitor 13 to SW4 during playback.

By the way, as mentioned above, the video signal recorded on or reproduced from the magnetic sheet 1 can be a field video signal consisting of only one field, or a frame video signal consisting of two fields in a pair. However, in such a case, SW2. SW3. Switching of the states of SW4 and SW5 will be explained using FIG. 2.

Figure 2 shows SW2. SW3. SW4. It is a figure which shows the combination of the switching state of SW5.

During field playback, SW2 connects the head 3-1 to the playback amplifier 6, and switches SW3 to an intermediate state, that is, head 3-1.
-2 is not connected to either the playback amplifier 6 or the recording amplifier 16, and SW4 outputs the signal directly from the demodulation circuit 9 to the monitor 13 in odd fields, and l in even fields.
The signal is alternately switched for each field so that the signal is output to the monitor 13 via the 7211 delay circuit 10, thereby preventing the occurrence of skew distortion.

Next, in frame reproduction, SW2 connects the head 3-1 to the reproduction amplifier 6 in odd fields, and is in an intermediate state in even fields, SW3 is in an intermediate state in odd fields, and connects the head 3-2 to the reproduction amplifier 6 in even fields. Connect to. Therefore, during frame reproduction, signals from either head 3-1 or 3-2 are alternately output to the reproduction amplifier 6 for each field.

In this case, SW4 is switched to the upper side in FIG. 1, and the signal from demodulation circuit 9 is directly output to monitor 13.

In any of the above-described field reproduction and frame reproduction states, SW5 is driven so that the monitor 13 is connected to SW4.

Next, in field recording, SW2 connects the head 3-1 to the recording apparatus 16, and SW3 is in an intermediate state.

Therefore, during field recording, recording is performed by the head 3-1.

In addition, in frame recording, SW2 connects the head 3-1 to the recording amplifier 16 in odd fields, and is in an intermediate state in even fields; SW3 is in an intermediate state in odd fields, and connects the head 3-2 to the recording amplifier 16 in even fields. Connecting. In frame recording, the combination of heads 3-1 and 3-2 can also be reversed.

Further, in both field recording and frame recording, during recording, the SW 5 is switched so that the monitor 13 is connected to the video signal input terminal 18 so that the video signal to be recorded can be observed on the monitor 13. In addition, if this occurs, SW
4 may be in any state.

Next, the erase mode will be explained. In the erase standby state, which will be described later, SWI is on the reference signal generator side, SW
5 is connected to the upper side in FIG. 1, that is, it is in exactly the same state as the playback mode. At this time, a case will be described in which field erasing is performed, for example, erasing only the track on which the magnetic head is generating ilG. In this case, at the same time as erasing starts, a control signal is sent from the CPU 40 so that SW2 is placed on the recording amplifier side and SW3 is placed in an intermediate state.Furthermore, an erase signal trigger pulse is sent from the CPU 40 to the erase signal generator 85, and the erase signal trigger pulse is sent to the head 3-1. The erase signal is sent only when the

Next, a description will be given of frame erasing in which tracks being accessed by heads 3-1 and 3-2 are simultaneously erased. When erasing a frame, an erasing signal is sent to the heads 3-1 and 3-2 at the same time, so the CPU 40 sends a control signal so that SW2 and SW3 are both on the recording amplifier side. and cp
A trigger pulse from u40 generates an erase signal, which flows to both heads via the recording amplifier.

Furthermore, in this embodiment, when field erasing is performed, the erasure is performed by head 3-1, but when field erasing is performed using head 3-2, SW2 is in the intermediate state, and SW2 is in the intermediate state.
It is sufficient to control W:S so that it is on the recording amplifier side.

Next, the switches 51 to 78 shown in FIG. 1 will be explained.

In giving this explanation, the external appearance of the apparatus of this embodiment shown in FIGS. 3 and 4 will also be explained.

FIG. 3 is a front view of the apparatus of this embodiment, and FIG. 4 is a front view of a remote control device used in the apparatus of this embodiment.

The switches 51 to 79 and 72 shown in FIG. 1 are the switch group provided in the device shown in FIG. 3, the switch group provided in the remote control device shown in FIG. 1 and the remote control device shown in FIG. 1, switches having the same functions are given the same reference numerals in FIGS. 1 to 1. still,
The switch provided on the device shown in FIG. 3, which in FIG. 1 is only provided on the remote control device shown in FIG. 4, appears to be connected to the CPLI 40 via a line. Although shown in FIG. 4 for convenience, it is generated by operating a switch provided only in the remote control device shown in FIG. The information is input to the CPU 40 of the device shown in FIG. 3 via the remote control light receiving section 45 provided in the device.

It should be noted that the method of arranging the switches 51 to 79 can be considered in various other variations of this embodiment, and is not limited to this embodiment.

1 to 4, 41 is a power switch, /1
Reference numeral 2 denotes a slot for inserting the magnetic notebook 1. When the insert button 43 is turned on while the magnetic notebook 1 is inserted into the slot 42, the slot 2 is automatically opened and the magnetic sheet 1 is injected. 43 is the above-mentioned injecthotane, and 44A and 44B are each the above-mentioned 1) 11. LED, R
EC, LED, 45 is a remote control light receiving part that receives a signal from the remote control device shown in FIG. 4, 46 is an interval mode display LED that lights up when interval playback is executed, 48 is a feel], playback or recording, A display indicating whether frame playback or recording is set (LEI), 25 is the aforementioned two-digit 7-segment LIE+), 5 (IA, 5013.
50C is a program playback setting switch 58, which will be described later.
These are LEDs that display the operating states of the interval time setting switch 57 and the block track setting switch 62.

51 is a REC mode switch for setting the recording mode and checking whether the track accessed by the head in the recording mode is recorded or unrecorded; when the switch is turned on, the track accessed by the head is (If the track being accessed by head 3-1 has already been recorded during field recording, or the track being accessed by head 3-1 or 3-2 during frame recording) has been recorded), REC,
The LED flashes to indicate that the track being accessed by the head cannot be accessed twice, and if it has not been recorded, or if the control circuit 30 determines that no video signal is input, the REC, LED lights up and recording is possible 1i
1.

52 is R I that determines the timing to perform the recording operation.
ζC switch and RI/2C mote setting switch 51
When the recording mode is set by
I get hit. If continuous recording has been set in advance using the beat setting switch 56 for sending tracks (described later), the head 3 is automatically set while the switch 51 is on.
-1. :(Continuous recording is performed while -2 is shifted.

53 is an I'B mode setting switch for setting the +Jj raw mode, and when the switch 5:3 is turned on, P8, L E+ indicating "11" which is the playback mode.
) lights up.

Reference numeral 511 denotes a track U I) switch, and by operating the switch 54, the driver 23' is controlled to rotate the step motor 24, and the head moving mechanism 4 moves the head 3-1, 3-2. ＼ツ＋
:3-+, shift 3-2]・Sh1. The track that the head is accessing is changed to a more inner circumferential direction. Furthermore, when frame j2 is recorded using the field/frame setting switch 59, which will be described later, the program advances two tracks at a time.11
When live is set, track [11 switch 54
When turned on, the heads 3-1, 3-2 are shifted by 2 tracks, and the 7-segment LED 25 also displays the l track number shifted by 2 tracks instead of the track number shifted by l tracks, and the field When the track UP switch 54 is turned on when recording or playback is set, the head 3-1.3-
2 is shifted toward the inner circumferential direction one track at a time, and the shift number shifted one track at a time is also displayed on the seven segment LED 25.

In addition, when the recording mode is set and the track UP switch 54 is operated, the head 3-1°3-2
REC if the track accessed by the head 3-1.3-2 has already been recorded when the head 3-1.3-2 is shifted.

RED44B performs a blinking display. 55 is a track DOW switch which is opposite to the track UP switch 54 and is used to change the access of the heads 3-1, 3-2 toward the outer circumference.
It is an N switch.

When the switch 55 is set for frame playback in the same way as the track UP switch 54, when the switch 55 is operated and frames are being recorded on the outermost track of track 1 and the track on the outermost track of track 2. It is not the track number that has been shifted by 1 track to ED25 after 7 segments (the track number that has been shifted by 2 tracks is displayed, and when field recording or playback is set and the switch 55 is operated, The track numbers shifted one track at a time are displayed.

Also, in the case where the recording mode has been set in advance as described above with respect to the track UP switch 54, and when the head 3-1.3-2 is shifted by operating the track DOWN switch 55, REC if the track has already been recorded.

The LED 44B performs a blinking display.

56, when recording and reproducing, it automatically switches whether to perform such operations continuously or sporadically while shifting the head, and also determines how many times per second the operations are performed when performing them continuously. This is a track feed rebeat setting switch for setting the track feed speed shown.

When the switch 56 is pressed once and turned on, the track feed speed is displayed instead of the track number on the 7-segment LED 25, and in this state, the track feed speed setting switch 56 is turned on again within the predetermined time clocked by the timer 28 shown in FIG. is turned on, each time the switch 56 is turned on, the 7-segment LED 2
5 indicates, for example, "2" indicating continuous recording or playback of 2 screens per second, "S" indicating continuous recording or playback of 5 screens per second, continuous recording or playback of 10 screens per second, etc. "/ff" to indicate playback, and "a" to indicate single recording or playback are displayed cyclically.By turning on and then off the switch 56, the track number is displayed on the 7-segment LED 25. Since the track advance speed is displayed instead of , the switch 56 is not turned on again and the timer 2
When the predetermined time measurement by 8 is completed, the LED 25
returns from the state where the track feed speed is displayed to the state where the normal track number is displayed.

Furthermore, when the track feed speed is changed by the switch 56, if frame video recording is set in advance by the field/frame setting switch 59 and the REC mode setting switch 5I, continuous recording of 10 screens per second is not set. .

57 is an interval time setting switch. That is, the interval time setting switch is used to set the interval time for track forwarding when continuous playback is performed but the playback interval time is relatively long, or when program playback is set by the program track setting switch 58 described later. and
Within 10 seconds after the switch is turned on, an interval time is set using the IO main key switches shown at 63 to 72.

Incidentally, when any switch other than the IO main key switches 62 to 72 is turned on after the interval time setting switch 57 is turned on, the interval time setting is automatically canceled. Reference numeral 58 denotes a program playback setting switch for setting a program playback mode in which the order of playback tracks is programmed in advance and the playback operation is performed continuously at the interval time interval set by the interval time setting switch 57.

To determine the order of playback tracks, first turn on the switch 58 to set the program playback mode, then operate the track U'P switch 54 and track DOWN switch 55 to access the heads 3-1 and 3-2. This is done by changing the track being displayed, reproducing the video of the desired track, and while checking it on the monitor 13, turning on a program track setting switch 62, which will be described later, to memorize the number of the track being checked on the monitor 13. Reference numeral 59 denotes the aforementioned field/frame setting switch, and each time the switch is turned on, the field recording or reproduction mode and the frame recording or reproduction mode are alternately switched.

Note that when the continuous recording mode of 10 screens per second is set in advance by the REC mode setting switch 51 and the track feed speed setting switch 56, the field/frame setting switch 59 allows the frame record f, scarlet selection M
The trunk feed speed is automatically changed to 1 (the trunk feed speed is a continuous recording mode of 5 screens per second).

That is, compared to field recording, during frame recording the head 3-1.3-2 must be shifted two tracks at a time, so when recording 10 screens per second, 20 tracks per second are required. In other words, taking into account the time to record the video signal, it is necessary to perform two tracks' worth of knots in 4/60 seconds, but since such high-speed knots are cumbersome, we did not implement this method. In the example, continuous recording of frames for 10 screens per second is prohibited.

Reference numeral 60 is a start switch for performing continuous interval playback or program playback. When the start switch is turned on, if interval playback is set, the recorded tracks will be played back sequentially starting from the first track during the interval time. Interval playback is started according to the interval time set by the setting switch 57 and the ten key switches 63 to 72, and when program playback is set, program playback is started. Reference numeral 61 denotes a stop switch for stopping the reproduction operation started by the start switch 60, and when the switch 61 is turned on during program reproduction, the reproduction of the program is stopped while the track being reproduced at the time is being reproduced.

62 is the aforementioned program track setting switch.

Reference numeral 73 is a switch for starting ID setting in the recording mode and for switching whether or not to display the ID contents in the playback mode. That is, by turning on the switch 73 in the recording mode, it becomes the ID setting mode, and by turning on the switch 73 in the playback mode, it is possible to switch between displaying or not displaying the contents of the ID. 74, 75.
Reference numerals 76 denote a switch that is turned on when setting the year as the ID when the ID setting mode is entered by the switch 73, a switch that is turned on when setting the month, and a switch that is turned on when setting the day. In FIG. 1, for convenience, the switches 7ll, 75, 76 and the aforementioned switches 57, 58, and 62 are shown as independent switches, but in this embodiment, as shown in the remote control device of FIG. ,75.76
are also used as switches 58, 57, and 62, respectively. That is, the interval time setting switch 5 by the switch 57
Since the program setting by switch 8 and the program track setting by switch 62 are performed independently of the ID setting of January 9, 2015, in this embodiment, the switch is also used to reduce the number of switch members and simplify the operation. performance and reliability.

In addition, various combinations of ponds can be considered when the switch is also used.

77 is an erase standby switch for temporarily putting the device into an erase standby state when erasing information recorded on the magnetic notebook l; 78 is an erase standby switch for executing the erase operation in the erase standby state set by the erase standby switch 77; This is the erase switch. Reference numeral 79 is an all-track erase standby switch that sets a mode for erasing all tracks.

When erasing the information recorded on the port 1, first turn on the switch 77 to set the erase standby state. In such a state, the reproduction mode is automatically set, so that the image recorded on the track to be erased can be confirmed on the monitor 13 or on the printer 13' before erasure is executed.

Furthermore, by operating the IO key switches 63 to 72 in the standby state, the number of tracks to be successively erased can be designated. Next, by turning on the erase switch 78, at least one of the heads 3-1 and 3-2 is connected to the recording amplifier 16, and the information recorded on the track is erased by the erase signal shown in FIG. 32 generated from the erase signal generator 85. will be deleted. Further, by turning on the all-track erase standby switch 79 and then turning on the erase switch 78, all tracks are automatically erased.

Next, the operation of the embodiment of the present invention will be explained using the flow charts shown in FIGS. 5 to 20, 23, and 25 to 27.

First, when the power switch 41 shown in FIG. 3 is pushed in, the power of the device shown in FIG. 1 is turned on, power is supplied to each part of the circuit, and operation is started.

#l: Then, in FIG. 5, the register S described later becomes “0”.
", the PB mode flag is set, the track feed speed is initially set to 2 screens per second, and the interval time is set to 3 seconds. Therefore, when the power is turned on, continuous playback mode is automatically set in advance. Ru.

#2: Detect whether a jacket having a magnetic sheet 1 is pushed in or not. When the jacket is pushed in, the flow branches to #3, and when it is not pushed in, the flow skips #3 and branches to #4.

#3: When the jacket having the magnetic sheet 1 is being pushed in in #2, the DC motor 3 is driven.

#4: Detect whether the head 3-1 is accessing the 50th track by detecting whether the switch 5 shown in FIG. When the head 3-1 is not accessing the 50th track, the flow branches to #5, and the step motor 24 shown in FIG. 1 is driven. Then, the loop of #4 and #5 is repeated so that the head 3-1 accesses the 50th track.

#6: When the head 3-11 accesses the 50th track, the flow reaches this step, and in this step, the register N for accessing the memory (RAM 27) is set to 50.

#7: In this step, it is detected whether the DC motor 2 is being driven. When the jacket having the aforementioned magnetic sheet 1 is inserted, the DC motor 2 is being driven by executing #3, so the flow advances to step #8 and the field flag is set. When the jacket is not inserted, the flow proceeds without passing through #3, so the DC motor 2 is not driven. Therefore, the flow returns to #2 to detect whether a jacket is inserted or not.

#8: When the DC motor 4 is being driven in #7, a field flag is set. Therefore, the LED 44A indicating the field mode shown in FIG. 3 lights up, and a display indicating the field mode is performed. That is, in this embodiment, when the power is turned on and the jacket is inserted, the field mode is automatically set.

#9: Detect the output of the level detection circuit 7 shown in FIG. 1 to determine whether the track being accessed by the head 3-1 is a recorded track or not.

Here, since the track that the head 3-1 is accessing has already been recorded, when the output of the level detection circuit 7 becomes H level, the flow is #l.

When the output of the level detection circuit 7 becomes L level, the flow advances to #16.

Here, #16 will be explained first.

#16: Set “oooo” to address N in memory. Here, "oooo" indicates that the track corresponding to the memory address is unrecorded.

Next, the flow from #IO onwards will be explained.

When the output of the level detection circuit 7 is at H level in #lO and #9, the signal recorded on the track is reproduced,
The ID signal is taken in from the data demodulator 12.

#11: Detect the contents of the ID signal to determine whether the video signal recorded on the track is a field video signal or a frame video signal. If it is a field video signal, the flow advances to #15, and if it is a frame video signal, the flow advances to #12.

#12: In this step, the head 3-1 determines whether the video signal of the accessed tail track is an inner track or an outer track of the frame video signal.

If it is an inside trap, the flow advances to #I4.

If it is an outside track, the flow advances to #13.

#13. If the video signal of the track that the head 3-1 is accessing is a track outside the frame video signal, address N of the memory is set to "0011". Sho #I
When proceeding to this step for the first time, N is set to 50 in #6.

#14: In the case of the frame video signal video side track, set the memory address N to "0010".

#17. Here, when the head 3-1 is shifted to the first track and it is detected that N=1, the flow is #2.
If N=1, the flow advances to #18.

#18: When it is detected in #17 that N is not 1, the l trough 2 minute head 3-1 is shifted to the outer circumferential side.

#19: When the head 3-1 is shifted toward the outer circumferential side in #I8, it is subtracted from N to obtain N.

#20: If N=1 is detected in #17, that is,
When the head 3-1 accesses the first track provided on the outermost periphery and the presence or absence of recording is set in the memory, the data at the N address of the memory, that is, the first address of the memory is read here and is "0011". ”, specifically the first
If the track is the outer track of the two tracks that make up the frame video signal, the flow advances to #21;
Otherwise, the flow proceeds to #23.

#21: If it is detected in #20 that the first track is a track outside the tracks constituting the frame video signal, the flow advances to this step. In this step, if the data at the N+1 address of the memory, that is, the second address of the memory, is read and it is "0010", specifically, the second track is the inner track of the two tracks that make up the frame video signal. If so, proceed to #22.

#22 When frame video signals are being recorded on two tracks, the first track and the second track, the flow moves to this step. Therefore, the field flag set in #8 is cleared and the field mode is changed to frame mode. Therefore, the field frame display LED 48 shown in FIG. 3 lights up to indicate the frame mode.

@23. #24: Set the register N indicating the memory address mentioned above to the 2-digit 7-segment LE shown in Figures 1 and 3.
Display it on D25.

This display allows the user to recognize the track number that the head 3-1 is accessing.

When this flow ends, the process jumps to the next flow shown in A. The flowchart shown in FIG. 6 will be explained below.

$A-1: Detects whether the REC mode setting switch 51 is turned on, and when the switch 51 is turned on, the flow calls subroutine ■ to set the recording mode, and when it is not turned on, calls # Proceed to A-2.

#A-2: It is detected whether the REC switch 57 is turned on, and when the switch 52 is turned on, subroutine (2) is called, and when it is not turned on, the process proceeds to #A-3.

#A-3: Detect whether the PB mode setting switch 53- is turned on, and when the switch 53 is turned on, call the subroutine ◎, and when it is not turned on, proceed to #A-4.

$A-4:) When the rack UP switch 54 is turned on, the flow calls subroutine (2), and when it is not turned on, the flow advances to #A-5.

#A-5 When the Nidorak DOWN switch 55 is turned on, the flow calls subroutine (2), and when it is not turned on, the flow advances to #A-6.

#A-6 When the track feed speed setting switch 56 is turned on, the flow calls subroutine [F], and when it is not turned on, the flow advances to #A-7.

#A-7: When the interval time open setting switch 57 is turned on, subroutine ◎ is called, and when it is not turned on, the process proceeds to #A-8.

#A-8 When the nib program setting switch 58 is turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-9.

#A-9+When the program track setting switch 62 is turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-10.

#A-10+When the field frame setting switch 59 is turned on, the subroutine is called, and when it is not turned on, the process advances to #A-11.

#A-11. When the start switch 60 is turned on, subroutine (2) is called, and when it is not turned on, the process proceeds to #A-12.

#A-12 When the stop switch 61 is not turned on, subroutine 0 is called, and when it is not turned on, the process advances to #A-13.

#A-13: When the jacket detection switch (φ corresponding to the detection circuit 80 in Fig. 1) is turned on, jumps to subroutine ■, and when it is not turned on, jumps to #A-14.
Proceed to.

#A-14 Clear the program playback mode flag and program playback execution flag.

#A-15: When any of the to main key switches 63 to 72 is turned on, subroutine (2) is called, and when it is turned on, the process proceeds to #A-16.

#A-16: When the ID switch 73 is on, call subroutine 0, and when it is on, call #A
Proceed to -17.

#A-17+ When the year setting switch 74 is on, subroutine ■ is called, and when it is on, #
Proceed to A-18.

#A-18: When the month setting switch 75 is on, subroutine ■ is called, and when it is on, #
Proceed to A-19.

#A-19: When the date setting switch 76 is turned on, subroutine ■ is called, and when it is turned on, #
Proceed to A-20.

#A-20: When the erase standby switch 77 is turned on, subroutine (2) is called, and when it is turned on, the process advances to #A-21.

#A-21: When the all-track erase standby switch 79 is on, subroutine (2) is called, and when it is on, the process advances to #A-13.

As explained above, after the head 3-1 has accessed the first track of the magnetic note by executing the flow shown in FIG. 5, the flow jumps to the flow shown in FIG. While detecting the state of each switch shown in Figures 3 and 4, the flow shown in Figure 4 until the state of each switch changes is executed repeatedly, and a subroutine corresponding to the operated switch is called. .

Here, the subroutine [F] called when the track setting feed speed switch 56 is turned on will be explained using FIG.

FIG. 7 is a flowchart showing a subroutine executed when the switch 56 for changing the track setting feed speed is turned on.

#F-1. #F-2: The set value of the track feed speed is read from the memory, and the set value is set in a track number display buffer (not shown).

Therefore, the two-digit 7-segment LE shown in Figure 3
The track feed speed is displayed on D25. If the flow comes to this step for the first time, the flow rate is 2 per second at #l.
Since the track advance speed on the screen is set, select “2”.
” is displayed.

#F-3 When the track feed speed setting switch 56 is on, the flow repeats #F-3, and when the switch 56 is turned off, the flow moves to #F-4.

As mentioned above, once the track feed speed setting switch 56 is turned on, the two-digit 7-segment LED 25 shown in FIG. 3 switches from displaying the track number to displaying the track feed speed.
Next, the track feeding speed is changed by turning on the switch 56 again.

#F-3 is provided so that the track feed speed is switched only when the switch 56 is turned on, once turned off, and then turned on again as described above.

#F-4, 5F-5. #F-6. #F-7=In these steps, the track feed speed setting switch 56 is turned on and the 2-digit 7-segment LED 25 shown in FIG.
If the switch 56 or the pond switch is not turned on within a predetermined period of time (2 seconds) after the display changes from the track number display to the track feed speed display, the setting of the track feed speed is canceled. These steps are designed to help you.

Predetermined time (2 seconds) after timer 1 starts counting
When the track feed speed setting switch 56 is turned on during this period, the flow progresses from #F-7 to #F-10, and when timer 1 completes timing, or when another switch is turned on, the flow advances from #F-7 to #F-10. The flow advances from -6 to #F-8.

#F-8: Clear the count value of timer 1.

#F-9: Contrary to #F-1, the display of the two-digit 7-segment LED 25 shown in FIG. 3 is returned to displaying the track number.

#F-1o+Clear the count value of timer 1.

#F-11 The setting value of the track feed speed is single (once recorded or played back, the head is softened by 1 track in field mode, and 2 tracks in frame mode)
If the head is shifted by a track and stopped), the flow proceeds to #l-12 if it is a shinkle, and to #F-13 if it is not a shinkle.

As described above, when the flow reaches this step after the power switch 41 is turned on, the rack feeding speed is set in advance at #l to 2 screens per second.

#F-12 = If the track feed speed setting value is single, change the setting value to 2 screens per second, return to #F-1, display the changed track feed speed, and return to # above.
Execute F-3 to #F-7.

#F-13 It is detected whether the NiDrac feed speed setting value is 2 screens per second, and if it is 2 screens per second, the flow proceeds to #F-14, and if it is not 2 screens per second, the flow proceeds to #F-15.

#F-14:) Change the rack feed speed setting value to 5 screens per second, return to #F-1, display the changed track feed speed, and execute the above steps #F-3 to #F-7. .

#F-+5: Detects whether the I-rack feed speed setting value is 5 screens per second, and if it is 5 screens per second, goes to #F-16; if it is not 5 screens per second, that is, 10 screens per second is set. If so, the flow advances to #F-17.

#F-16: Determine whether the PB mode flag is set. If the PB mode flag is set, that is, if the playback mode is set, #F-18
If the PB mode flag is reset, that is, if the recording mode is set, the flow advances to #F-19.

#F-17: Change the l-rack feed speed setting value to single, return to #F-1, display the changed track feed speed, and execute the above-mentioned steps #F-3 to #F-7.

#F-18: In the playback mode, regardless of whether the video signal recorded on the track of the magnetic sheet l is a field video signal or a frame video signal, field playback is performed during continuous track feeding. Therefore, in such a case, change the track feed speed setting value to 10 screens per second and the flow will be #
Return to F-1.

#F-19: Detects whether or not the field flag is set, and if the field flag is set, that is, if track advance is set at 5 screens per second in recording mode and in field mode, #F is detected. The flow branches to -18.

Also, if the field flag is not set, that is, the track feed speed setting value of 5 screens per second is set in recording mode, and in frame mode, #F-17
The flow advances to change the track feed speed setting to single.

Therefore, in the above-mentioned subroutine [F], when the track feed speed setting switch 56 is turned on, the track feed speed is displayed on the two-digit 7-segment LED 25 shown in FIG. 3 for a predetermined period of time (2 seconds). The track advance speed is changed by turning on the switch 56 again within the time.

In addition, there are three types of change ranges: single, 2 screens per second, and 5 screens per second when in frame recording mode, and single, 2 screens per second, and 5 screens per second when in other than frame recording mode.
There are 4 types of screens, 10 screens per second.

The scope of this change is head 3-1.3-2 shown in FIG.
This is related to the track shifting ability of the moving mechanism, etc., and is set in advance to an appropriate range depending on the track shifting ability.

Next, using FIG. 8, while executing the subroutine shown in FIG. 6, the track UP switch 54. TRACK DOWN
The subroutine O9■ called when the switch 55 is turned on will be explained. First, a flow called when the track UP switch 54 is turned on will be described.

, tl)-1: When the flow reaches this step, it is detected whether the track being accessed by the head 3-1 is the innermost track or not and whether the register N is 50. Distinguish by this.

As a result, if N is not 50, go to #D-2;
If it is 0, the flow advances to #D-34, which will be described later.

#[)-2: Determine whether the PB mode flag is set. When the PB mode flag is set, that is, in playback mode, #D-8; when the PB mode flag is not set, that is, in recording mode, #D-8
The flow advances to -3.

#D-3: Detects whether the N+1 address of the memory is "0000", that is, the N+1 track is unrecorded. If it is unrecorded, it is set to #D-4. If it is already recorded, it is #D-7. Flow branches.

#D-4/N+1) - If it is determined in #D-3 that the rack has not been recorded, it is determined in this step whether the field flag is set and if it is set. If it is not set, the flow advances to #D-5.

#D-5: When it is determined in #D-4 that the field flag is not set and the mode is frame mode, this step is reached. In this step, it is detected whether the N+2nd content of the memory is "0000", and if it is "oooo", that is, the N+
If 2 tracks are unrecorded, go to #D-6 and “0”.
000'', that is, if the N+2 track has already been recorded, the flow advances to #D-7.

By executing Steplap from #D-3 to #D-5, if both consecutive two tracks are unrecorded in frame mode, the step will be changed to #D-6, and the step number ( If both have already been recorded, #D
The flow advances to -7.

#D-6: Track accessed by head 3-1 in felt mode, track accessed by head 3-1 in frame mode, and l track inner circumferential side of the track When the track being accessed by the head 3-2 is unrecorded, that is, when it is recordable, the flow reaches this step, and the RECLED shown in FIG.
44B lights up.

#D-7: Contrary to #D-6, when the track to be accessed and recorded by head 3-1.3-2 has already been recorded, the RECLED 44B shown in FIG. 3 is blinked ( By flashing), a warning is displayed to make the user aware that recording is not possible.

#D-8: If the PB mode flag is set in #D-2, the flow reaches this step and the field flag is set.

For the meaning of this step, see #D-9゜#D-10.
#D=13 will be explained.

#D-9: Memo +)-117) N address power “0011”
Immediately, as explained in #13, it is detected whether or not the track that the head 3-1 is accessing is the outer track of the two tracks that make up the frame video signal.
#D-1O if the track is on the outer circumference of the track
If the track is not on the outer circumferential side, the flow advances to #D-13.

#D-10: Detects whether address N+1 of the memory is "0010", that is, the track being accessed by the head 3-2 is the inner track of the two tracks making up the frame video signal. , if the track is on the inner circumferential side of the two tracks, the flow proceeds to #D-11, and if it is not on the outer circumferential side, the flow proceeds to #D-13.

That is, if the inner track of the two tracks making up the frame video signal is erased, or if a new video signal is recorded after erasing, the track accessed by head 3-t will make up the frame video signal. Even if it is the outer track of the two tracks, the head 3
It happens that the track being accessed by -2 is not the inner track of the two tracks. Therefore, in this case, when softening the heads 3-1 and 3-2 toward the inner circumference, it is necessary to soften only the first track and play back the track on which the video signal was newly recorded after it was erased or erased. There is.

However, in such a case, the head 3-1°3-2 is
When only the track is shifted to the inner circumferential side, the head 3
A frame video signal is not necessarily recorded on the track accessed by -1.3-2, and completely different field video signals may be recorded thereon. In this case, if the field flag is reset, a problem arises in that two separate field video signals are reproduced as frame video signals. The above #D-
In this embodiment, by providing 8 steps, when the head is shifted to the inner circumferential side, a field flag is set in advance in this step to set the field mode, and even in the above case, a completely different field video signal is generated. It is possible to solve the problem that the video signal is reproduced as a frame video signal.

#D-11; In this step, it is detected whether register N is 49 or not, and if N is 49, #D-11;
If N is not 49, the flow branches to #D-12.

#D-12: The flow reaches this step when frame video signals are being recorded on the two tracks accessed by the heads 3-1 and 3-2. If such a record has been made, when the I/Rack UP switch is turned on, the driver 23 is driven to shift the heads 3-1, 3-2 by 92 minutes in this step, and then #D- At step 13, the l track head 3-1.3-2 is further shifted. Further, as described above, N is updated by l each time the heads 3-1, 3-2 are shifted.

#D-13; Similar to #D-12, head 3-1.3
-2 by one track.

#D-14; Similarly to #23, display N on the 2-digit 7-segment LED 25 shown in FIG.

In this embodiment, these steps are #D-12 and #D-13.
Heads 3-1 and 3-
When a frame video signal is recorded in the accessed track 2, the track number displayed on the LED 25 is updated by 2, and when a field video signal is recorded, the track number displayed on the ED 25 is updated. The current track number is updated one by one, and it is possible to display on the magnetic sorter whether a field video signal or a frame video signal is recorded.

Also, if this step is provided between #D-12 and #D-13, if frame video signals are recorded on the two tracks accessed by heads 3-1 and 3-2, Even if there is, when the track UP switch 54 is turned on, the track number displayed on the LED 25 will be updated one by one.

#D-15; Determine whether the PB mode flag is set. #D-16 if set
If it is not set, the flow branches to #D-19.

If set, branch to #D-15-1.

$D-15-1; Here, the CPU 40 converts the reproduction ID signal outputted from the data demodulator 12 to the data demodulator 2 in FIG.
Import into M27. The flow advances to #D-15-2.

#D-15-2. Here, it is determined whether or not the mode is one in which 10 is superimposed on the image signal and monitored. Details of this mode will be explained using FIG. 20. If it is in this mode, proceed to #D-15-3; otherwise, proceed to #D-15-4.

#D-15-3: When the flow reaches this step, the mode is in which the ID is superimposed on the video signal and monitored, so the CPU reads out the reproduced ID signal from the RAM 27 and controls the character generator 40 to generate the character pattern. is generated and superimposed on the playback video signal on the monitor. The flow advances to #D-15-4. That is, at this point, the [)DATA signal recorded in the currently accessed track is displayed on the monitor.

#D-15-4; If the automatic track feed flag is not set, the flow branches to #D-20, and if it is, the flow branches to #D-16.

#D-16; Address N of the memory is "0011" Determine whether the track being accessed by the head 3-1 is a track toward the outer circumference of the tracks on which the frame video signal is recorded. Here, N corresponds to the number of the track that the head 3-1 is accessing after the heads 3-1 and 3-2 have already been moved, as repeated above. Here, the content at address N of the memory is “001”.
1”, the flow goes to #D-17 “0011”
If not, the flow branches to #D-19.

#D-17, the contents of memory address N+1 are “0010”
”, that is, it is determined whether the track being accessed by head-3-1 is the inner track of the two tracks on which frame video signals are recorded.

Here, if the memory address N+1 is "0010", the flow branches to #D-18, and if it is not "00IO", the flow branches to #D-19.

If the flow reaches this step via #D-18, 8D-16, and #D-17, frame video signals are recorded on the two tracks accessed after the head 3-1 and 3-2 move. Therefore, the field flag set in #D-8 is cleared and the frame playback mode is set. Note that this step is executed only if the automatic track advance flag is set. (If the automatic track feed flag is not set, #D
Since the flow branches from -15-4 to #D-20, #D
Since the field flag remains set at -8, field reproduction is performed. ) #D-19, In this step, it is determined whether or not the automatic track feed flag is set, and if it is set, the process returns to #D-20, and if it is set, the process returns from this subroutine ( RTS).

The automatic track advance flag is a flag that is set in the subroutine ■ described later, and when calling the subroutine ■ or ■ described later while running a program that repeats playback while automatically advancing tracks, the automatic track advance flag is set by the subroutine ■, which will be described later. , ■ is provided for extraction.

aD-2o; Load the track feed speed setting value from memory.

#D-21; Determine whether or not the track feed speed setting value is single, and if it is single, #D-21;
34, if it is not single, the flow branches to #D-22.

#D-22; Determine whether or not the track feed speed setting value is 2 screens per second. The flow branches.

#D-23, WAIT TIME in CPU40
Set the R register to 28.

#D-24; l-Determine whether the rack feed speed setting value is 5 screens per second, and if it is 5 screens per second,
If there are not 5 screens per second, the flow branches to #D-26.

#D-25, WAIT TIMER Set to Renstaren O.

#D-26: If 10 screens per second is set as the track feed speed setting value, the flow reaches this step and the WAIT TIMER register is set to 4.

In addition, the WAIT TIMER is used to control the rack feed speed set in #D-23, #D-25, and #D-26, and #D-3 will be described later.
1° #D-32 is subtracted every time the magnetic sheet l is rotated once by the DC motor 2.

#D-27; Determine whether or not the REC execution flag is set, and if it is set, #D-28;
If not set, the flow branches to #D-31. Here, the REC execution flag is a flag that is set in subroutine ◎, and is a WAIT flag that is set when subroutine ◎ is called while running a program that repeats recording while automatically sending tracks.
This is provided to obtain the time equivalent to the time required for recording by subtracting 2 or 5 from the TIMER register in #D-29 and #D-30. That is, in the recording mode, the rotation state of the magnetic sheet l is detected from the PG coil 21 to determine the timing for recording the signal to be recorded from a predetermined position on the magnetic sheet, and the signal is recorded on the magnetic sheet l. It is set up for the purpose of

Subtract 2 from the TIMER register, and if not set, subtract 5 from the WAIT TIMER register. Here, if the track feed speed is set to 10 screens per second, the WAIT TIMER register is set to 4, but such a setting is possible only in field mode, so in this case, the WAIT TIMER register is set to 4.
Five is never subtracted from the TTIMER register.

#D-31, detects whether or not there is a pulse from the reference signal generator 19 shown in FIG.
If the process does not branch to D-32, repeat the flow of #D-31.

#D-32; Subtract 1 from the contents of the WAIT TIMER register.

#I')-33; WAIT TIMER Determine whether or not the lens capacity has become 0, and if it is 0, #D
34, and if it is not O, it branches to #D-31.

In steps #D-32 and #D-33, the timer for controlling the track feed speed is set to WAITTI.
A MER register and a reference signal generator 19 were used. Therefore, compared to the method of configuring a timer by subtracting the contents of the WAIT TIMER register according to the output of the waveform shaping circuit 22 that shapes the waveform of the output of the PG coil 2I, stable and more accurate clock operation can be performed. . That is, P
Although the output of the G coil 21 may include errors due to causes such as uneven rotation of the magnetic sheet 1, the output of the reference signal generator 19 is substantially free of such errors. Further, when performing interval recording, it is desirable to stop the rotation of the DC motor 2 during the interval time in order to save power consumption.

When performing such an operation, the method of subtracting the WAIT TIMER register according to the output of the waveform shaping circuit 22 is as follows.
Although it is not possible to measure the interval time over time, the method of this embodiment makes it possible to perform a stable timekeeping operation even when such an operation is performed.

#D-34; Determine whether or not the REC execution flag is set, and if it is set, return the program (RTS) after calling the subroutine ■; if not set, #D Branch to -35.

#D-35; Determine whether or not the l-rack UP switch 54 is on, and if it is on, move the tracks accessed by the heads 3-1 and 3-2 to the inner circumference side. The flow branches to #D-1 in order to be turned off, and to #D-36 when it is turned off.

#D-36; It is determined whether or not the track DOWN switch 55 is on, and if it is on, the heads 3-1, . To soften the track being accessed by 3-2 to the outer circumference side, go to #E-1 of subroutine ■, and if it is off, $1)-
It branches to 37.

#D-37, if the PB mode flag is set, go to #D-38; otherwise, go to the subroutine ■
Return to the program that called.

Clear. Then the subroutine Return to the porogram that called ■.

In the above example, #D-2 regardless of whether it passes HD +2 in PB mode or not.
If the value set in WAIT TIMER has not been changed at 3,25°26, and #D-12 has been passed for the time required to advance one track,
Although the speed of truck feeding will be delayed,
In order to match this, in #D-27, #D-1
2, the track feed speed can be adjusted without any problem by subtracting the time required to feed the head for one track from WATE TIVER.

Next, subroutine (2) executed when the track down switch 55 is turned on will be explained.

Steps #E-1 to #E-13 of subroutine (2) are similar to steps #D-1 to #D-13 of subroutine (◎), so a detailed explanation will be omitted.

However, subroutine ■ is track DOWN switch 55.
For example, #E-
1, it is detected whether N=1, and in #E-9, the memory (N-1) battery is "0010", that is, the (Nth)
-1)) Detects whether the rack is the inner track of the two tracks constituting the frame video signal, and #E-10
In #E-11, it is detected whether the memory address (N-2) is "0011", that is, the (N-2)th track is the outer track of the two tracks constituting the frame video signal. Detect whether N=2 and #E
-12, #E-13, 1 track head 3-1.3
-2 is shifted to the outer circumferential side.

Next, subroutines ① and ② called when the field/frame changeover switch 59 and the RFC mode setting switch 5I are turned on will be explained using FIG.

#J-1: When it is detected in #A-10 shown in FIG. 6 that the field/frame changeover switch 59 is turned on, the flow advances to this step, and in this step, the field flag is set. If it is set, go to #J-2, if it is not set, go to #J-4
The flow branches.

When the field flag is set in #J-2 and #J-1, the field flag is cleared in this step.

#J-3: Determine whether or not the PB mode flag is set. If it is set, the flow branches to #J-8; if not, the flow branches to #J-5.

#J-4; When it is detected in #J-1 that the field flag is not set, the field flag is set in this step.

If the 1'B mode is not set, that is, in recording mode, and the field flag is cleared in #J-2, the frame recording mode is set, and as explained in subroutines ■, ■, and ■, every second Continuous recording of 10 screens is not possible. Therefore, when switching from field mode to frame mode in the subroutine, if a track feeding speed of 10 frames per second is set as the track feeding speed, it is necessary to prohibit such switching.

Therefore, according to this embodiment, #J-6 and #
When a track feed speed of 10 screens per second is set by J-7, the track feed speed setting value is automatically changed to a track feed of 5 screens per second.

#J-5; Set the track feed speed setting value to CPU4.
Take it to 0.

#J-6; If the track feed speed setting value imported in #J-5 is 10 screens per second, #J
-7, and if it is not 10 screens per second, the flow branches to #J-8.

#J-7; I-rack feed speed setting value 5 per second
Change to screen.

#J-8; Field/frame setting switch 51
If the switch continues to be turned on, this step is repeated, and only when the switch turns off from on, returns to the step shown in #A-1 in FIG.

Next, subroutine (2) called when the RFC mode setting switch 51 is turned on will be explained.

When it is detected that the REC mode setting switch 51 is turned on in #B-1 and #A-1 shown in FIG. 6, the flow branches to this step, and PB shown in FIG.
The LED 44A lights up white and the PB mode flag is cleared.

#13, -5-1: This step is CPU4
0 controls the character generator 84 to temporarily stop generating characters.

It is determined whether or not the mode is the setting mode of #B-5-2.1D. If the mode is the setting mode, the process proceeds to #B-5-3; otherwise, the process proceeds to #B-6'.

#B 5-3; The CPU 40 reads the set ID from the RAM 27 and controls the character generator 84 to generate a character pattern. Therefore, the ID is displayed on the monitor 13 superimposed on the video signal input from the video signal input terminal 18. The flow then proceeds to #B-6'.

813-6'; REC mode setting switch 51
Repeat this step as long as the
When the switch is turned off, the flow branches to #B-7.

#l3-7; When the REC mode setting switch 51 is turned off, it is determined in this step whether the field flag is set, and if the field flag is set, the process goes to #A-1 in FIG. The flow returns to the step shown, and if the field flag is not set, jumps to subroutine #J-5, and #J-6 to #J-6.
By executing #J-8, when the track feed speed setting value is 10 screens per second, it is automatically corrected to 5 screens per second. Therefore, when the REC mode is set by the REC mode setting switch 51 and the frame mode is set, the track feed speed setting value is limited to a maximum of 5 screens per second.

Next, the subroutine ◎ called when the PB mode setting switch 53 is turned on will be explained using FIG. 1O.

#C-1: L in #A-3 shown in the 6th cause
(When it is detected that the mode setting switch 53 has been turned on, the flow branches to this step and the RECLED is turned on.
FF and the field flag is set once. That is, separate field video signals are recorded on the two tracks being accessed by heads 3-1 and 3-2, and a frame recording mode is set in which the PB mote flag is cleared and the field flag is reset. If it is detected that the PB mode setting switch 53 is turned on and the track accessed by head 3-1, 3-2 is immediately played back, separate field video signals will be interlaced and played back. In order to prevent this, a field flag is set once in this step.

#C-2, memory address is “0011”, i.e. head 3
-1 detects whether the accessed track is the outer track of the two tracks where the frame video signal is recorded, and if it is "0011", it is transferred to #C-3 with "001".
1”, the flow branches to #C-5.

#C-3: Detects whether the memory address N+1 is "0010", that is, the track being accessed by the head 3-2 is the inner track of the two tracks where the frame video signal is recorded, and reads "00IO". If so, go to #C-4“
001O'', the flow branches to #C-5.

#C-1l; When it is detected in #C-2 and #C-3 that frame video signals are recorded on the two tracks accessed by the head 3-113-2, the flow goes to this step. The field flag is cleared and the frame mode is set.

#C-5, No. 1 shown in Figure 3] 13, l, IC1)
ll·lΔ lights up, I) +3 motor flux is set, and the regeneration operation is started.

#C-5-1 In this step, the CPU 40 controls the character generator 811 to temporarily stop character generation. Further, the CPU 40 stores the ID DATA demodulated by the data demodulator 12 in the RAM 27.

#B-5-2; Determine whether or not it is the ID display mode. If it is the display mode, proceed to #C-5-3; otherwise, proceed to #C-6'.

#C-5-3: The CPU 40 reads out the ID which has been adjusted by the data demodulator 12 from the RAM 27, and sets the character generator 84 to 1 to generate a character pattern. Therefore, the ID is displayed on the monitor 13 superimposed on the video signal reproduced from the magnetic notebook. Flow then proceeds to #C-6.

#C-6: If the PB mote setting switch 53 is kept on, repeat this step, and when it is turned off, return to #A-1 via #l\-14 shown in Fig. 6. .

Next, using Fig. 11, set the interval time setting switch 5.
The subroutine ◎ called when 7 is turned on will be explained. First, in the subroutine #G-0, the timer T' is initialized to O and the interval time Ti is displayed on the 7-segment LED 25.

#G-1; In #A-7 of FIG. 6, when it is detected that the interval time setting switch 57 is turned on, the timer T' is initialized to O, and then the flow reaches this step, Furthermore, when the 10 key switches 63 to 72 are turned on, the signal goes to #G-2, and the 10 key switches 63 to 72 are turned on.
When 72 is not turned on, the flow branches to #G-3.

#(, -2; Change the interval time Ti to the interval time 1゛1 set by the lO key switches 63-72.

:(l-1, 1 key switch 6: Determine whether or not the switches other than 3 to 72 are turned on. If they are turned on, #G-4; if they are not turned on, #G-5 Branch to.

';: G4; Detects whether or not the interval time setting switch 57 is turned on. If it is turned on, #G-1; if not turned on, #A- shown in FIG. The flow branches to 1.

#G-5; Increase the above ``'' by 1. At 1 second f7j, the flow shifts to #G-6.

However, ]' is a timer that is incremented by 1 every second, and the addition is not performed if less than one second has elapsed.

#G-6: Determine whether or not 'l'' is lO, and
If ' is 10, add ''' to #A-1 shown in Figure 6.
is not 10, branches to #G-1 and returns to # above.
(, -1, #G-3, #G-5, and #G-6 loop ()) When 'I' or 10 is reached, return to #Δ-1.

Therefore, in the above-mentioned subroutine ◎, if no other switch is turned on within 10 seconds after the interval time setting switch 57 is turned on, #A shown in FIG.
The value returns to -1 and the interval time setting is canceled. Of course, while executing the subroutine ◎, the interhull time T1
is displayed on the two-digit 7-segment LED 25, but the display of the interval time Ti required when returning to #A-1 at #G-6 stops.

Also, in this subroutine ◎, the interval time is 1
When ``1'' is set to ``0'', an external trigger mode is set that performs the operation when connecting to a printer, for example, as described in subroutine (2) as a reproduction operation.

Next, using FIG. 12, the subroutine (2) that is called when the REC switch is turned on will be explained.

$N-1, REC switch 52 at #A-2 in Figure 6
When it is detected that the PI3 mote flag is turned on, the flow reaches this step, and it is detected whether the PI3 mote flag is cleared or not. The flow returns to #A-14 shown in (R
'I'S) When cleared, the flow branches to #N-2.

Therefore, if the REC mode is not set, no recording will be performed even if the REC switch 52 is turned on.

#N-2, it is determined whether the N address of the memory is "0000", that is, whether the track being accessed by the head 3-1 is unrecorded or not, and if it is not unrecorded, as shown in FIG. The flow returns to #A-14, and if it is unrecorded, the flow branches to #N-3.

#N-3, it is determined whether the field flag is set, and if it is set, the flow branches to #N-5; if it is not set, the flow branches to #N-4.

#N-11, This step will be entered when the frame recording mode is set, but it is necessary to check if address N+1 of the memory is "ooo, o", that is, if it is being accessed by Hella l-3-2. It is determined whether the track is unrecorded or not, and if the track is not unrecorded, the flow returns to #A-14 shown in FIG. In addition, in such a case, please check the REC and LED44 in advance.
B is blinking.

This track was also unrecorded. In this case, the flow branches to #N-6.

#N-5, a video signal for one field is recorded on one track on the magnetic sheet i by the head 3-1. At this time, SW6 shown in FIG. 1 is turned off and the character generator 8
4 output will no longer be output to the monitor. Also memory N
0001 is set to the address.

#N-6; When the flow reaches this step, the frame recording mode is set, so record the two tracks on the magnetic sheet l. A field worth of video signals is recorded by the head 3-1.3-2. 0011 is set at memory address N, 0010 is set at address N 1,000, and #N
SW6 is turned off similarly to -5. Next, the step motor 24 is driven to soften the heads 3-1 and 3-2 inward by one track.

Note that when #N-5 and #N-6 are executed, SW2 to SW5 are driven as explained in FIG. Also #N-6
When recording is executed in the CPU 40, the RA
The set ID is read from M27, and by outputting it to the data modulator 14, the data modulator 14
The ID modulated into a DPSK signal is input to the recording amplifier 16, where it is superimposed on the video signal and ID recording is performed. However, the ID display mode is
In the case of Figure 0C), even if the data is set, I
Recording of D is not performed. However, DAT indicates whether it is an inner track, an outer track, or a field recording of the frame.
A is simply recorded together with the video signal. Moreover, even in the display mode of FIG. 20 a) and b), #N-5. #N
By executing step -6, the ID DATA signal no longer appears on the monitor because SW6 is turned off during recording.

#N-7: The REC execution flag is set and SW6 in FIG. 1 is turned on.

By executing #N-1 to #N-7, when the set ID is generated by the character generator 84, superimposed on the video signal, and output to the monitor, the REC
The character signal that is generated only during execution is SW in Figure 1.
6 will turn it off and the characters will disappear. At #N-7, SW6 is turned on again, so ID DATA is displayed again.

#N-8, subroutine ■ is called, and if head 3-1 is accessing a track other than the 50th track, #D-
The flow moves from L#D-2 to #D-3. Then #D-3 to #D-1
Execute 4 and move the head 3-1.3- to the inner circumference side by l track.
Move 2. #N-6 in frame recording mode
Since the heads 3-1 and 3-2 have been moved in advance by one track to the inner circumferential side in #D-14, the head 3-1 can record the track next to the track recorded in #D-14 even in the frame recording mode. to access. Further, when the track recorded by the head 3-1.3-2 has been recorded, the REC and LED 44B shown in FIG. 3 blink to warn the user.

The flow then branches from #D-15 to #D-19 and #
The flow shown in steps #D-20 to #D-34 is executed via step D-19.

That is, if the set value of the track feed speed is single, the flow branches from #D-21 to #D-34, and returns to #N-9 according to the RFC execution flag set in advance in #N-7. .

If 2 screens or 5 screens per second are set, subtract the WAIT TIMER register by the time necessary for recording in #D-28, and then
Count down the TIMER register and
'ri' I M l When the reno star becomes 0, the flow is #N- from #I]-33 via #D 34 according to the REC execution flag set in #N-7 in the same way as described above. Return to 9.

#N-9; Clear the REC execution flag.

5N-10; This step is similar to #D-20, and the set value of the track feed speed is taken in from the memory.

#N-II; If the set value of the track feed speed is single, go to #N-12; if not, go back to #A-14 shown in FIG. 6.

#N-+2; When the track feed speed is set to single, this step is repeated as long as the REC switch 52 is turned on, and subroutine (2) is executed again to control so that no recording is performed.

If the track feed speed is set to other than single and the REC switch 52 is turned on, then from 11 to #7\-11 via #,・\]/1.
:A From 2, subroutine f,, 1II) is called and the above-mentioned flow is executed, and as long as the R15C switch 52 is on, recording continues at the set track feed speed'? ji, then 11. When the REC switch 52 is turned off, the flows are #t\-14, #A-1, #A-
Do not proceed to step 2 or call subroutine ① in A-2 (continuous 11th green ends').

Next, the subroutine called when the program setting switch 58 is turned on will be explained with reference to FIG.

#11-1; Go to #-8 in FIG. 6 When it is detected that the program setting switch 58 is turned on, this step is reached, and it is determined whether or not the PB mode flag is set. If set, return to # II-2; if not set, return to #A-1i, m shown in Figure 6 (RTS)
.

This step is provided to prohibit program settings in the recording mode. That is, in this embodiment, when setting the block diagram, the flj raw mode 1-
By selecting , the program is configured to be set while checking the video recorded on the magnetic notebook 1 on a monitor, for example.

Furthermore, by automatically setting the PB mote flag when the program setting switch 58 is turned on, the operation to the reproduction mode can be performed automatically.

In this case, a CALLC may be provided to call the subroutine ◎ in place of the steps shown in the subroutine ◎, that is, in place of the step shown in #'H-1.

31m-2, in the program track memory shown in FIG. 14 where the program is stored, when executing the program reproduction, the register indicating the address where the track number to be reproduced next is stored is set to 0.

, 2+1 1, block L, 111 indicating mode, +1) Set raw mote flag and return to #-11. .

Next, the program playback mode is set by subroutine (11), and then the program track setting switch 6
The subroutine called when 2 is turned on will be explained using FIG.

#f-1, determine whether the program playback mode flag is set, and if it is set, go to #I-2;
If not set, the flow branches to #A-1.

Therefore, when the program playback mode is not set by the program setting switch 58, no program setting operation is performed even if the program track setting switch 62 is turned on.

#I-2, register S indicating the start address where the program of the aforementioned program track memory is stored r6
(Initialized as S=0 when the power is turned on in #1) Register Ml:
Enter IF.

#Program-3, register M1. The data in the program track memory at the address stored in mt8 is stored at an address larger by 1 than the address. In other words, the data indicating the track number stored in the program track memory is stored from the address where the data is stored! Store at a larger address.

#I-4; Write the value obtained by adding 1 to the contents of register M to the register.

#I-5; Subtract 1 from the contents of register M.

#f-6; Determine whether the contents of register M are 0 or not,
If it is 0, the flow branches to #i-7, and if it is not 0, the flow branches to #i-3.

The flow from #1-3 to #i-6 is repeated, and when the contents of register M become O, all data stored at each address in the program track memory is transferred to an address larger by 1. Therefore, when this flow is repeatedly executed and the flow branches from #sou-6 to #1-7, the address of the program track memory! No data is stored in the .

The number of the track being accessed by the #f-77 head 3-1 is stored at address 1 of the program track memory. Therefore, by turning on the program track setting switch 62, the number of the track where the video being accessed by the head 3-1 and being reproduced is recorded is programmed.

#I-8, add 1 to the contents of register S. By executing this step, #i-3 is always stored in register S.
~#100-6 Flow 6 (start address 1 where the data of the program track memory moved after execution is stored is also a large address) will be stored.

#1-9, Program track setting switch 6
If 2 is on, repeat this step, and if it is off, return to #A-1.

If the user wants to continue setting the program, turn on the track UP switch 54 or the track DOWN switch 55 to set the head 3-1.3-.
Program settings can be made by changing the track being accessed in No. 2 and turning on the program setting switch 62 while checking the reproduced video when the desired track has been reproduced. .

Note that each time the program setting switch 62 is turned on, the 14th
The data stored at each address of the program track memory shown in the figure is stored at an address larger by l. Also, during program setting, the contents of register S and register i are exactly the same.

Next, program playback is performed to play the program set by turning on the program setting switch 58 and the program track setting switch 62, and the head 3-1
The first part about the program executed when performing interval playback, which plays recorded tracks sequentially at a set interval time, starting from the track being accessed.
This will be explained using FIGS. 6 to 18.

First, the subroutine (2) called when the start switch 60 is turned on will be explained with reference to FIG.

#-1; When it is detected that the start switch 60 is turned on in #A-11 of FIG. 6, the flow reaches this step, and it is detected whether the PB mode flag is set and the PB When the mode flag is not set, the flow branches to #A-1, and when the PB mode flag is set, the flow branches to #-2. Therefore, in this embodiment, if the playback mode is not set in advance, interval playback or program playback cannot be performed, so even if the start switch 60 is turned on by mistake during the recording mode, interval playback or program playback will start. It is possible to prevent this from happening.

Also, by providing a step similar to the step shown in subroutine ◎ instead of -1 in #, it is possible to immediately start playing the interval playback program by simply turning on the start switch 60 without having to set the playback mode in advance. .

-2 to #: It is determined whether or not the program reproduction mode flag is set, and if it is set, the flow branches to #-13. If it is not set, the flow branches to #-4.

Here, the flow will be described when the program playback mode flag is not set, that is, when interval playback is performed.

#-4: Determine whether the N address of the memory is "0000", that is, the track being accessed by head 3-1 is unrecorded, and if it is unrecorded, #K-6 must be unrecorded. Then, the flow branches to step #I5. First, the flow from #16 onward will be described assuming that the track being accessed by the head 3-1 is unrecorded.

According to this embodiment described below, when the track being accessed by the head 3-1 is other than the 49th or 50th track, the interval playback is performed from the track to the track being accessed by the head 3-1. When it is the 49th or 50th track, only the tracks that have been recorded sequentially from the 1st track are played back, but between #-2 and #K-4, the head 3-1 is moved to the 1st track. If a step of driving the step motor 24 is inserted to access the tracks, only the tracks that have been recorded sequentially from the first track are always reproduced.

Therefore, when the head 3-1 is not accessing the first track but is accessing another track, it is extremely effective for automatically performing interval playback sequentially from the first track to perform a search.

Set # to -6, an automatic track advance flag indicating that interval playback is in progress.

-7 to #: Determine whether or not the field flag is set, and if it is set, the flow branches to #-18; if it is set, the flow branches to #-9.

#-a; It is determined whether the track that the head 3-1 is accessing is the innermost track by detecting whether N is 50, and it is detected that N is 50. In this case, the flow branches to #-10, and when 50 is not detected, the flow branches to #-11.

-9 to #; Indicates whether the track that the head 3-1 is accessing is one track outside the innermost circumference.
The determination is made by detecting whether or not 49.
When 9 is detected, the flow branches to #-10 and when 48 is not detected, the flow branches to #-11.

#K-10; In this step, it is determined whether or not the interval time Ti set by executing the subroutine ◎ is "0".As will be described later, it is determined whether the interval time Ti is "0" or not. is a mode in which the head 3-1 is shifted according to a preset program according to an external trigger signal, and when the interval time Ti is set to "0" for this mode, the flow is #A. -1, and when it is not set to "0", the flow branches to -12 at #.

#-11; Call subroutine ◎, #D-1
The flow shown in ~#D-18 is executed.

When subroutine ■ is called in subroutine ■, the PB mode flag is set, so the flow branches from #D-2 to #D-9, and at #-4, the track accessed by head 3-1 is determined. When it is determined that a track on the outer circumference side of the frame and one track inner circumference than this track is the inner track of the two tracks on which the frame video signal is recorded, and that the head 3-1 is not accessing the 49th track. Head 3-1.3-2 is #D-
12. When the head 3-1, 3-2 is shifted inward by two tracks by #D-13 and no discrimination is made, the head 3-1, 3-2 is shifted inward by one track by #D-13. Further, if a frame video signal is recorded in the track being accessed by the head 3-1, 3-2, the field flag is cleared and the flow moves from #D-19 to #D-14.

#-12; Call subroutine ■#E-1~
The flows shown in #E-13 and #D-14 to #D-19 are executed, and the tracks on the outer circumferential side adjacent to the track accessed by the head 3-1 at -4 in # and the outer circumferential side by one more track are executed. If frame video signals are recorded on two of the tracks, head 3-1.3-2 is #E-
12, #E-13 shifts the track by two tracks toward the outer circumference; otherwise, #E-13 shifts only one track toward the outer circumference.

Also, if a frame video signal is recorded in the accessed track <3-1.3-2, which is the same as -11 in #, the field flag is cleared and the flow moves from #D-19 to #K-13. .

-13 in #, the content of Renostar N is 1 to determine whether the track being accessed by head 3-1 is the outermost track.
It is determined by detecting whether or not it is, and when it is detected that it is ■, the flow branches to #K-14, and when it is not detected that it is 1, it branches to #K-12. do. Therefore, if the flow branches to #-12 at #-8 or #-9, that is, head 3-1
When the 9th track or the 50th track is being accessed, the head 3-1 is controlled to access the first track by repeating steps -12 to # and -13 to #.

#-t4; Clear the automatic track feed flag.

As explained above, when the flow from #-14 to #-14 is executed, and the flow branches from #-4 to #-5, the head 3-1 tracks the track where the video signal is recorded. Tracks on which no video signals are recorded are essentially skipped without being played back.

Furthermore, by executing the flow from #K-4 to #K-14, when the flow branches from #K-4 to #K-5, the two tracks being accessed by heads 3-1 and 3-2 are #D if a frame video signal is recorded
Since the field flag is cleared at -18, the frame playback mode is automatically set. Further, when a field video signal is recorded on the track being accessed by the head 3-1, 3-2, the field playback mode is automatically set. Therefore, during interval playback, the most appropriate playback mode is automatically set according to the recording method of the video signal.

-5 to #: The interval time Ti set in the subroutine ◎ is fetched from the memory into the register T' of the CPU 40.

#K -15; Similar to -10 to #, detect whether the interval time Ti is "0" and if it is "0", set -17 to #; if not "0", set -16 to # Flow branches. Here, the following explanation will be given on the assumption that the external trigger mode is not set.

#1+6; Timer 1 starts timing operation and advances to #-18.

-18 to #; It is detected whether or not the timer 1 has clocked for 1 second. If the timer 1 is being counted, the flow branches to -19 to #, and if it is in the middle of counting, the flow branches to -20 to #.

-20 for #, detects whether the stop switch 61 is turned on, and if it is turned on, the flow branches to #A-1; if not, the flow branches to -21 for #. Here, when the flow branches to #A-1, from #A-1 to #A
-12 steps are executed, so stop switch 6
When 1 is turned on in normal condition, the flow is #A-12
The subroutine [phase] will be called from.

Below, subroutine 0 will be explained using FIG. 17.

8M-1; Detects whether the program playback mode flag is set and returns #A if it is not set.
-14, and if set, the flow branches to #M-2.

#M-2 detects whether or not the program reproduction execution flag is set, and if it is set, the flow branches to 9M-3; if not, the flow branches to 4M-4.

9M-3, make the contents of register I the same as the contents of register S.

#M-4; Set register S to 0 and then execute 9M-3.

This subroutine [phase] will be described in more detail in the program playback mode. Below, #K-21 and later will be explained in detail.

#2] ; Track UP switch 54 is on'
When it is detected that it is on, subroutine ■ is called and the head 3-1.3-2 is shifted to the inner circumferential side, and when it is not detected that it is on, it is called #. -22, the flow branches.

-22 to #; Detects whether the track DOWN switch 55 is on, and when it is detected that it is on, calls subroutine ■, shifts the heads 3-1, 3-2 to the outer circumferential side, and turns it on. If it is not detected, the flow branches to #-18.

-19 to #; Subtract 1 from T'.

-23 to #; T'ka "O", (7) -2 to niha #
When 4i, m, and T' are not "0", the flow branches to #-16.

Therefore, by executing the above-mentioned steps #15 to #23, turning on the track UP switch 54 and track DOWN switch 55 during interval playback will record data on the track adjacent to the track being played. You can play videos that are on the screen. In that case, by keeping switch 54 or switch 55 on, the tracks being played can be automatically updated sequentially according to the track feed speed set in subroutine [F], and the number of tracks during interval playback can be updated automatically. You can also easily play back the video in front of the screen.

Furthermore, when playing back a video recorded on a track adjacent to the track being played back by turning on the track UP switch 54 and the track DOWN switch 55, in this embodiment, before turning on the switches 54 and 55, When the remaining time of the interval time Ti of the track being played in is played back, the flow moves from # -23 to # -24 and is updated to play a new track. As shown by the dotted line,
By jumping the flow to -5 at #, it is possible to reset the interval time T' so that the image updated by the switches 54 and 55 can be reliably observed for a certain period of time.

#-24; When the interval time T' ends and the track to be played is updated, it is detected whether or not the program playback mode is set, and if it is set, the process returns to #K-3. If not, press #-
The flow branches to 6.

Next, about the routine ◎ that branches when the program playback mode flag is set at -2 in #, the 18th
This will be explained using figures.

#O-1; Detects whether the content of the register S is "0" and when "0" is detected, sends "0" to #A-1.
When it is detected that this is not the case, the flow branches to #O-2.

As mentioned above, register S stores the start address of the program in the program track memory, and the content of register S is "0" if no program is stored in the program track memory. Since it shows the current value, when it is “0”, the A in Fig. 6
Return to

#0-2, Detects whether the contents of register I are “0” and when “0” is detected, goes to #0-3;
When it is detected that it is not "0", the flow branches to #O-3.

As mentioned above, register I stores the address of the track memory where the track number to be played next is stored when program playback is executed.
When executing program playback, l is subtracted every time one step program playback is executed, as shown in #0-14 below.

Therefore, the reason why the flow branches to #O-2 and register ■ is detected as "0" is because the program is set and register S is not "0" (and the program playback steps have been executed -). In other words, when the program playback is executed as follows, #O
-3, the flow branches to #O-5 while the program playback is executed one way.

#O-3, takes in the interval time Ti set in subroutine ◎, detects whether the interval time T1 is "0'', and if it is "0'', the flow returns from routine 0 to #A-1. Then, the program playback operation ends.

Therefore, in the external trigger mode set by setting the interval time to 0'', the program playback operation is stopped after the program playback is executed one time.

Also, during normal program playback when interval time T1 is set to a value other than "0", #
The flow moves to O-4.

#O-4; Write the contents of register S to register I.

Program operation is started again.

#O-5; Enter the data (■) at the address of the program track memory set in register I (the data written to the address set in register ■ of the program track memory is shown with parentheses around ■). read out.

5O-6, data (I) is subtracted from N indicating the track number currently being accessed by head 3-1, and if it is less than "0", #0-7
, if it is smaller, the flow branches to #O-8.

#0-7. Set field flags. This set is for prohibiting head feeding by frame mote like #D-8.

#O-8; Head 3-1. , :3-2 by one track in the outer circumferential direction.

#O-9, detects whether data (I) is equal from N indicating the track number accessed by head 3-1;
If they are equal, the flow branches to #0-10; if they are not equal, that is, if they do not indicate a track number and data (1) is greater than N, the flow branches to #0-11.

#0-10, head 3-1.3-2 from 1 point in the inner circumferential direction; ill! Frame playback and field playback are automatically performed depending on whether the recorded video signal is a frame video signal or a field video signal.

By repeating steps #o-6 to #0-10, head 3
-1 is programmed] - Controlled to access tracks programmed in rack memory.

#0-14. Subtract 1 from register I.

#0-15; The program playback execution flag is set. With this step, the flow can be branched by determining whether the program reproduction mode flag is set at -24 in #.

The flow then jumps to #15.

Therefore, when branching to routine 0 at -3 in #, it is first determined whether or not a playback program is actually set, and then it is determined whether or not the external trigger mode is set, and the external trigger mode is set. When the program is running, the program is executed only one way, and at other times the program is played repeatedly.

Next, a flow when the external trigger mode is set will be explained. When the external trigger mode is set, the flow branches from #K, -15 to #K -17.

17'; Detects whether the printer connected as an external device is active (executing a print operation), and if it is busy, returns #A-1 to #A-1 if it is not busy. The flow branches at 18'.

#I18' sends a print start signal to the printer as an external device. The print start signal is executed by setting the signal level of a terminal connected to the printer to H level.

#11! -)'; Waiting for 150m5ec #12
0'; When the printer is busy, go to #-21';
If it is not busy, the flow branches to #K-24.

At #121', it is detected whether or not the stop switch 61 is turned on. If it is not turned on, the flow returns to #120', and when it is turned on, the flow returns to #A-1.

If the printer connected as an external device is busy when executing steps #'-117' to #K-21' above, the flow returns to #A-1 as described above and another switch is executed again. The flow shown in FIG. 16 is repeated until the switch is turned on. If the start switch 60 is turned on again while repeating the flow shown in FIG. 16, the above-described flow will be repeated and step 117' will be executed again.

In addition, if a printer is not connected as an external device, use the printer 1 shown in Figure 1 in #K-17'.
The terminal to which the signal from the busy signal output terminal 3' is input is open and becomes H level. Therefore, if a device such as a printer is not connected even though the external trigger mode is set, the head 3-1.3-
The track being accessed by No. 2 continues to be played, and the track being played is not updated.

Also, if a printer is connected as an external device and the printer is not busy,
When the flow advances to K -18', send the print start signal to the printer and then change # to 1 shown in -19.
After waiting for 50m5pc, printer operation is started, and if the printer becomes busy, -2, 0', -21 to # until the printer operation ends or the stop switch 60 is turned on. ' (Repeat, when the printer operation is finished, the flow is #120
' to #-24, and it is determined whether program playback is set by detecting whether the program playback mode flag is set. If program playback is set here, the flow is #
The process branches to K-3, and if program playback is not set, the process branches to -6 at #. Also stop switch 6
When 0 is turned on, the flow is as described above.

Further, if the external trigger mode is selected when program playback is set, the program playback operation is stopped after the program playback has been executed one time as described in #0-3.

Further, according to this embodiment, even if the external trigger mode is selected and program playback is not set, since -10 is set in #, the head 3 -
1. When the playback is performed in sequence from the accessed track in 3-2 to the last track, the playback operation is stopped.

Therefore, in external trigger mode, regardless of whether programmed playback is set or not, the playback operation stops after the normal playback is performed, so the printer is used as a device that performs external triggers. When using , only −-way printing is performed.

On the other hand, in modes other than external trigger mode, even if program playback is set or not, after playback is performed in a predetermined order, it will start again from the beginning. A playback operation is performed. Therefore, when such a playback device is used in a mode other than the external trigger mode, so-called endless playback can be performed because playback is performed repeatedly in a predetermined order.

Further, although a printer is shown as the external trigger device in this embodiment, it may be a device having an electric transmission function, or any other device as long as it processes a reproduced signal.

Next, the case of setting an ID will be explained.

When the 10 key switches 63 to 72 are turned on in the flow (2), the flow branches to the subroutine (2) shown in FIG.

#R-1; If the PB mode flag is set, the process branches to #R-10 and returns to the flowchart (2). Therefore, in a mode other than the recording mode, even if the IO key is turned on, virtually nothing is executed in this subroutine. If the PB mode flag is not set, that is, if it is in recording mode, the flow branches from #R-1 to #R-2.

#R-2; Here, it is determined whether the ID setting mode, that is, the ID is superimposed on the video signal and the mode is being monitored. The method for setting this mode will be described in detail with reference to FIG. 20. If this mode is not selected, the process branches to #R-10 and returns to #A-1 in the flowchart shown in FIG. If this mode is selected, the process branches to #R-3.

#R-3; The CPU 40 retrieves the set position from the register P of the RAM 27 for storing the set position indicating where on the monitor the ID set here is to be displayed.
The data corresponding to the one of the IO key switches 63 to 72 that is turned on is written and stored in the address corresponding to the set position in the RAM 27. Then CP
U40 controls character generator 84 to display the data on monitor B according to the read set position.

#R-4; Here, the process waits until the 10 key switches 63 to 72 are turned off once. If the switches that were turned on are turned off, the flow advances to #R-5.

#R-5; Here, the setting positions of data other than the date in the ID are 11 points from 0 to 10 as shown in Figure 21, so if register P is equal to 10 here. Branches to #R-6, otherwise branches to #R-7.

#R-6; Here, register P is set to O, and D
The setting position of ATA is initialized.

@R-7; Here, 1 is added to the value of register P and D
The ATA setting position moves to the next setting position.

#R-7-1 The data at the position stored in register P blinks.

#R-8: In this step, it is determined whether the IO key switches 63 to 72 are turned on, and if they are turned on, the process branches to #R-3 and the IO key switches 63 to 72 are turned on according to the flow described above. I set by
D is displayed on the motor 13.

If it is not turned on, the process branches to #R-9.

#R-9: At this point, it is determined whether any switches other than the IO main key switches 63 to 72 are turned on, and if they are not turned on, the process branches to R-8. If it is turned on, the process branches to #R-ii.

#R-9-1; Stop blinking the ID displayed on the monitor. Flow proceeds to @R-10.

#R-11; Here, register P at the ID setting position
Set O to initialize the ID setting position and select #R-9-1.
Proceed to.

#R-10; Return to the flow of ■.

As explained above, when the PB mode flag is not set and the ID setting mode, that is, the mode in which the set ID can be monitored, the lO key switch 6
Each time a switch 3 to 72 is turned on, the CPU 40 controls the character generator 84 to generate data at a position determined by the register P.

Next, the D switch 73 will be explained.

When the switch 73 is turned on, the subroutine ◎ shown in FIG. 20 is called from the flow shown in . Here, subroutine ◎ will be explained.

#Q-1; Here, determine whether or not the PB mode flag is set, and if it is set, #Q-2
Otherwise, the process branches to #Q-7.

#Q-2; Here, check whether it is in ID display mode or not.
That is, it is determined whether the mode is such that the ID is output on the monitor superimposed on the video signal. If you are in ID display mode, go to #Q-4, otherwise go to #Q-4.
Branch to Q-3.

#Ql-3; Here, the CPU 40 uses the character generator 84
is controlled to stop displaying the ID output from the generator 84. From here, the flow advances to #Q-6.

#Q-4; Here, the CPU 40 reads from the RAM 27,
The reproduced ID is taken into the CPU 40 and the flow is #Q
-Proceed to 5.

#Q-5; Here, the CPU 40 controls the character generator 84 based on the reproduced ID, and causes the character generator 84 to output the reproduced ID as a character pattern as shown in FIG. 21(a). The flow then proceeds to #Q-6.

#Q-6; Here, if the switch 73 is turned on, the process waits; if it is turned off, the flow proceeds to the next step and returns to the flow of (2).

#Q-7; When the PB mode flag is not set and the recording mode is selected, it is determined whether the mode is 10 setting mode or not. That is, if the ID is in a mode in which the character generator 84 outputs a character pattern superimposed on the video signal, the flow advances to #Q-9. Otherwise, the flow advances to #Q-8.

#Q-8, where the character “LD” is the character generator 84
If it is likely to be determined whether or not the mode is being output by
The flow continues.

#Q-9, in this step, the CPU 40 uses the character generator 8
4 to stop displaying the ID, and the character generator 8 generates a two-character pattern "ID" as shown in FIG. 21(b).
4, and enter the "ID" character display mode. The flow then proceeds to #Q-6. That is, when the ID switch 73 is turned on in the ID setting mode, the "ID" character display mode is set.

#Q-10; - In this step, the CPU 40 controls the character generator 84 to stop displaying all character patterns as shown in FIG. 21(c). Then the flow is #Q-6
Proceed to.

#Q-11; If the flow reaches this step, I
Since it is neither the D setting mode nor the "ID" character display mode, that is, the mode is set to stop displaying the ID on the monitor, the CPU 40 takes in the set ID from the RAM 2.7, controls the character generator 84, and sets it. The generated ID is output as a character pattern from the character generator 84 as shown in FIG. 21(a). That is, the ID setting mode is set by this step. The flow then proceeds to #Q-6.

As explained above, each time the ID switch 73 is turned on, the I
The display format of D will be rewritten.

In other words, in the playback mode, the ID switch 73
ID display mode that is superimposed on the playback ID DAT or video signal ° and monitored every time you turn on the playback ID
10 non-display modes in which no DATA is output are repeated. Specifically, I shown in FIG. 21(a)
The ID non-display mode shown in D display mode (C) is repeated. In addition, when in recording mode, there is an ID setting mode that displays all IDs to be set, and an “ID setting mode” that displays all IDs to be set.
The "ID" character display mode in which only characters are displayed and the mode in which no ID is displayed on the monitor are switched repeatedly each time the ID switch 73 is turned on. Specifically, as shown in FIG. a).

The modes shown in (b) and (c) are repeatedly switched. The ID display in the recording mode will be further described below. FIG. 21(a) in recording mode.

When recording a video signal in the mode shown in (b), the ID is modulated with the video signal in #N-5 and #N-6 in FIG. 12, is modulated into DPS, and is further frequency-multiplexed with the video signal and recorded. It turns out. Also, Figure 20(c)
When recording a video signal in this mode, I
D data is not recorded. However, DATA indicating whether the recording is inside or outside the frame, or whether it is field recording, is always truncated along with the video signal.

That is, in this embodiment, depending on the number of times the ID switch is pressed, the monitor 1 is
It is possible to switch the display related to ID 3.

In addition, in this embodiment, in the recording mode in which the ID is recorded together with the video signal, there is an ID setting mode in which the display shown in FIG. 21(a) is performed, and in the ID setting mode in which the display shown in FIG.
The reason for providing these two display modes will be explained below.
It is possible to set the year, month, date and 11-digit number, but if you try to display all of the ID information as shown in Figure 21(a), it will occupy a considerable area on the screen of the monitor 13. Therefore, there is a problem that the viewing of the image may be obstructed, so a display mode as shown in FIG. 21(b) is provided to solve this problem.

Next, a method of displaying the reproduced ID in the reproduction mode will be explained. That is, in the recording mode, the image shown in FIG. 21 (
A display method for reproducing the ID recorded together with the video signal when the modes shown in a) and (b) are set by the ID switch 73 will be described. In the playback mode, when the head is moved to a new track, the ID recorded on that track will be played back on the monitor 13. This is done by demodulating the ID reproduced by the data demodulator 12 shown in FIG. 1, reading this output by the CPU 40, and further driving the character generator 84. Here, the TD read by the CPU 40 is held in the RAM 27 by the CPU 40. Regarding the display of II), see FIG. 21(a).
However, in this embodiment, the following two modes 1) and n) are provided as display modes for characters held in the RAM 27.

I) Only the year, month, and day are set as ID data,
ID recorded without any other data set
The first display mode to be displayed when playing.

II) A second display mode when playing back an ID in which the year, month, date and other numerical data are both set as ID DATA.

FIG. 22(a) shows the ID display in (2).

The display of the LD in (2) is shown in FIG. 22(b).

That is, for ■), only the year, month, and day are displayed in the lower right corner of the monitor, and for ■), the year, month, day, and pond data are displayed in the lower right corner of the monitor. Therefore, the ID information is always displayed in the lower right corner of the monitor screen, so that it can be prevented from interfering with the video signal as much as possible. Further, in this embodiment, the display is displayed in the lower right corner of the screen, but it may be displayed anywhere as long as it is in the corner of the screen.

In order to execute this operation, after reading the output signal of the data demodulator 12 shown in FIG.
All you have to do is generate the characters after confirming that all data other than daily income has not been set. In other words, above I), II
), the CPU 40
controls character generator 84.

Also, if it is determined that data other than the date is not the DATA recorded by this device, the 22nd
The display shown in Figure (b) is performed.

This is ok (known check code ID DATA
Things that can be determined by recording them as follows:
The case where the year, month, and day are set as D will be explained.

In the flow (2), when the year setting switch 74 is turned on, the flow jumps to the subroutine (2) shown in FIG.

#S-1; If the PB mode flag is set here, the flow advances to #5-14 and returns to the flow of (2). If not set, proceed to #S-2.

#S-2; Here, it is determined whether the mode is ID setting mode, that is, a mode in which ID data is superimposed on a video signal and output to a monitor or printer. If it is not in this mode, proceed to #5-14 and return to the flow of (2). If this mode is selected, proceed to #S-3.

#S-3: Here, the year setting position 1 on the monitor 13
Blinking of the number in the 10th digit of the year setting position means that the character in the position shown in ■ in Figure 24 (a) blinks. This means that the CPU 4
This is accomplished by 0 controlling the character generator 84 to generate or not generate a character at this position. This is done by well-known interrupt processing. The flow then proceeds to #S-4.

#S-4; At this point, wait until the switch 74 is turned off. When switch 74 is turned off, the flow is #S-
Proceed to step 5.

#S-5; Here, it is determined whether the lO key switches 63 to 72 are turned on. If the 10 key switch is on, the flow advances to #S-6. If not, proceed to #5-12.

#S-6, here, the CPU 40 writes the input data from the 10 key switch to the RAM 27, and sets the character generator 84 to the year setting position shown as ■ in FIG. 24(a).
Generate character patterns by controlling . The flow then proceeds to #S-7.

#S-7; Blink the first digit of the year setting position. This means that the characters at the position shown in Figure 24 (■) are bricked.

Blinking is performed by CPU 40 controlling character generator 84. The flow proceeds to #S-8.

#S-8: Wait until the IO main key switch is turned off. When the 10 key switch is turned off, the flow is #S
Proceed to -9.

#S-9, here it is determined whether the IO main key switch is turned on. If turned on, the flow is #5
-10, otherwise go to #5-13.

When the #5-10+ to main key switch is turned on, the CPU 40 writes the data input by the 10 key switch to the RAM 27, and writes the data to the position shown in ■ in FIG. 24(a), which is the first digit of the year setting position. , character generator 8
4 to generate a character pattern. The flow then proceeds to #5-11.

#5-11: Blink the character at the year setting position with C
The PU 40 controls the character generator 84 to stop it. This allows the user to know that the year setting has been completed. Flow proceeds to #5-14.

#5-12; If the 10 key switch is not turned on in #S-5, it is determined whether a switch other than the lO primary key is turned on. If it is not turned on, the flow branches to #S-5.
゜Repeat steps #5-12, and if switches other than the 10 key are turned on, proceed to #S-I+.

#5-13; Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, the flow branches to #S-9, and if it is turned on, the flow branches to #5-11. Therefore, until the switch outside the primary key is turned on, #S-9. By repeating steps #5-13, the characters at the year setting position continue to blink, prompting the user to set the year using the IO main key switch.

#5-14; If the r'B mode flag is set, if the mode is ID setting mode, and if the blinking is stopped by #5-11, the flow returns to step (2) through this step.

As explained above, when the year setting switch 74 is turned on, the number in the 10th digit of the year setting position starts blinking, thereby informing the operator of the position where data is set. Here, by inputting a number using the IO main key switch, the data input at the blinking position is generated as a character pattern by the character generator 84, and the CPU holds the data in the RAM 27.

When the setting of the IO place digit is completed, the number in the first digit position starts blinking, and the DAT is placed at this position in the same way.
Settings for A are performed. Here, when the setting of the first digit is completed, the year setting mode ends and the process returns to the flow shown in ■, but it is also possible to proceed to the flow shown in ■ and enter the month setting mode.

Next, the setting of the month's DATA will be described in detail with reference to subroutine (2) shown in FIG.

In the flow of (2), when the switch 75 is turned on, subroutine (2) is called and the month DATA setting mode is entered.

#T-1; If the PB mode flag is set here, the flow advances to #T-16 and returns to the flow of ■. If the PB mode flag is not set, the flow proceeds to #T-2.

#T-2; Here, it is determined whether the mode is an ID setting mode, that is, a mode in which ID data is superimposed on a video signal and output to a monitor or printer. If it is not in this mode, proceed to #T-16 and return to the flow. If this mode is selected, proceed to #T-3.

#T-3; Here, blink the 10th digit number of the circumference setting position on the monitor. The blinking of the number in the 10th digit of the month setting position means that the character at the position indicated by ■ in FIG. 24(a) blinks. This is CPU40
is performed by controlling the character generator 84 to generate or not generate characters. The flow then proceeds to #'"-4.

#T-4, here the month setting switch 75 waits until it is turned off. When switch 75 is turned off, the flow is #
Proceed to 1'-5.

#T-5: Here, it is determined whether the 10 key switches 63 to 72 are turned on. If the IO main key switch is turned on, the flow advances to #T-6; otherwise, the flow advances to #T-13.

#T6; Here, it is determined whether the data input by the IO main key switch is 2 or more. If the number is 2 or more, the flow proceeds to #T-14, otherwise the flow proceeds to #T-7. In other words, in the case of month setting, the flow is branched according to the number set in this step in order to accept the first digit number only if the first number input is "1" or "O゛'". let

@T-7; Here, the CPU 40 stores the input data in the RAM.
27 and controls the character generator 84 to write the character pattern to the position shown in ■ in FIG. 24(a), that is, #.
It is generated at the position blinked at T-3. Flow proceeds to #T-8.

#T-8; Here, blink the first digit number at the column setting position. This means that the character at the position indicated by ■ in FIG. 24(a) blinks. The flow is #T-
Proceed to step 9.

#T-9, wait until the 10 key switch is turned off. When the 10 key switch is turned off, the flow is #T
-Go to 10.

#T-10; Here, it is determined whether the 10 key switch is turned on. If it is turned on, the flow advances to #T-11; otherwise, the flow advances to #T-15.

#T-11; Here, the CPU 40 writes the data entered manually using the 10 key switch at #T-5 or #]'-10 into the RAM 27, and writes the data to the RAM 27, which is the first digit of the column setting position, as shown in Figure 24 ■. character generator 8
4 to generate a character pattern, then the flow is #
Proceed to T-12. If #T-14 branches to this step, by executing #T-14゜#T-11, the data entered by the 10 key switch in #T-5 will be displayed in the 1st digit and the 10th place will be displayed. The digit is “0”
゛ is displayed.

#T-12; Stops blinking of the data at the column setting position and displays that month setting is completed.

Flow proceeds to #T-16.

#T-13, this step branches if the 10 gear switch is not turned on in #T-5. Kokote 10
Determine whether any switches other than the power switch are turned on. If it is not turned on, it branches to #T-5, and if it is turned on, it branches to #T-12. That is, until the lO key switch or other switch is turned on, #T-5. #T
-13 is repeated, and if the 10 key switch is turned on, the flow branches to #T-6; if any other than the 10 key switch is turned on, the flow branches to #T-12.

#T-14; The process branches to this step when it is determined in #T-6 that the input data is "2" or more. Here, the CPU 40 stores data “0” in the RAM 27.
” and set the character generator 8 to the 10th digit of the column setting position.
4 to generate a character pattern "0". The flow advances to #T-11.

#T-15: Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, branch to #T-10; if it is turned on, it branches to #T-10.
Branches into 12.

# Return to the flow of T-16, ■.

As explained above, when the switch 75 is turned on, the 10th digit at the month setting position first blinks, thereby first indicating the position where the data to be input using the IO main key switch is to be set. If two or more pieces of data are input here, "0" is automatically set in the 10th digit and the input data is automatically set in the 1st digit. Of course, if there is an input of 1 or less, 10
Needless to say, the next blinking position that is input in the 1st digit moves to the 1st digit, and the next data input using the 10 key is set to the 1st digit. Therefore, according to this embodiment, when setting the month, it is possible to easily set the month by taking advantage of the fact that 2 or more is never set in the 10th digit.

Further, in #T-3, only the 10th digit is blinked here, but the 10th digit and the 1st digit may be blinked together.

Furthermore, when the setting of the next first digit is completed, the process returns to the flow shown in (2) in this example, but it is also possible to proceed to the subroutine (2) shown in FIG. 26 and enter the day setting mode.

Next, the day data setting will be described in detail with reference to FIG. When the switch 76 is turned on in the flow (2), the day data setting mode is called and the flow jumps to (2).

#U-1; If the PB mode flag is set here, the flow advances to #U-16 and returns to the flow of (2). If the PB mode flag is not set, #
Proceed to U-2.

#U-2; Kokote jp data 5ET-+1-
- mode, that is, a mode in which ID data is superimposed on a video signal and output to a monitor or printer. If it is not in this mode, #U-16
Proceed to , and return to the flow of ■. If this mode is selected, proceed to #U-3.

#U-3; Here, blinking the number in the 10th place of the date setting position on the monitor means blinking the number in the 10th place of the column setting position. It means to blink. This is CPU40
is executed by controlling the character generator 84 to generate or not generate characters.

The flow then proceeds to #U-4.

#U-4; At this point, wait until the date setting switch 76 is turned off. When switch 76 is turned off, the flow advances to #U-5.

#U-5, here it is determined whether the IO key switches 63 to 72 are turned on. If the 1o key switch is on, the flow advances to #U-6; otherwise, the flow advances to #U-13.

#U-6; Here, it is determined by the 10 key switch whether the input data is 4 or more. If it is 4 or more, the flow goes to #U-14, otherwise it goes to #U-14.
Proceed to U-7. In other words, in the case of month settings, the number set in this step is to add a first digit number only when the first number entered is "3", "2", "bi", or "0". Branch the flow accordingly.

#U-7, here the CPU 40 transfers the input data to the RAM 27
At the same time, the character generator 84 is controlled to write the character pattern to the position shown in ■ in FIG. 21(a), that is, #U-
3, it is generated at the blinked position.

The flow proceeds to #U-8.

#U-8; Here, blink the first digit of the date setting position. This means that the characters at the positions indicated by ■ in FIG. 24(a) blink. Flow is #U-9
Proceed to.

#U-9, wait until the lO main key switch is turned off. When the 10 key switch is turned off, the flow is #U
-Go to 10.

#U-1o, it is determined whether the 10 key switch is turned on or not. If it is turned on, the flow goes to #U-I+, otherwise it goes to #U-15.

#U-11, where CPU 40 is #U-5 or #-
At 1O, the data input by the 1O main key switch is written into the RAM 27, and the character generator 84 is controlled to generate a character pattern at the position shown in Figure 24 (■), which is the first digit of the sunset position, and then the flow is as follows. #Proceed to U-12. In addition, when branching to this step from #U-14, #U-14゜#U-11 is executed.
In step 5, the data inputted by the 10 key switch is displayed in the first digit, and "0" is displayed in the 10th digit.

#U-】2: Stops blinking of the sunset fixed position data and displays that the date setting is completed.

Flow proceeds to #U-16.

#U-13: This step requires 1 in #U-5.
Branches if the 0 key switch is not turned on. Here, it is determined whether any switches other than the 10 key are turned on.

If it is not turned on, it branches to #U-5, and if it is turned on, it branches to #U-12. i.e. until the 10 key switch or other switch is turned on.
U-5. Repeating the flow of #U-13, if the 10 key switch is turned on, the flow goes to #T-6, and if any other than the 10 key switch is turned on, the flow goes to #U-1.
Branch to 2.

#U-+4; The process branches to this step when it is determined in #U-6 that the input data is "4" or more. Here, the CPU 40 stores data in the RAM 27.
0'' is written, and the character generator 84 is controlled to generate a character pattern "0゛°" in the 10th digit of the column setting position.

The flow advances to #U-11.

#U-15; Here, it is determined whether any switches other than the IO key are turned on. If it is not turned on, branch to #U-10; if it is turned on, it branches to #U-10.
Branches into 12.

Return to the flow of #U-16, ■.

As explained above, when the switch 76 is turned on, the 10th digit at the date setting position first blinks, thereby first indicating the position where the data to be input using the 10 key switch is to be set. If 4 or more data is entered here, "0" will be automatically set in the 10th digit and the input data will be set in the 1st digit. Of course, if 3 or less is entered 10 for
Needless to say, the next blink position that is input to the first digit moves to the first digit, and the data input next by the IO primary key is set to the first digit. Therefore, according to this embodiment, when setting the day, it is possible to easily set the day by taking advantage of the fact that 4 or more is never set in the 10th digit.

Further, in #U-3, only the 10th digit is blinked, but the 10th digit and the 1st digit may be blinked together.

In the embodiment described above, the display is blinked at the hth point indicating the setting position, but other methods such as changing the brightness or changing the color will be explained next. When erasing data, the erase execution switch 78 and erase standby switch 77 shown in FIG. 1 are used. That is, when erasing is to be executed, the switch 77 is used to put the data into an erase standby state in advance, and then the erasure is executed only when the erase execution switch 78 is turned on. Furthermore, there are two modes for erasing: a mode in which a plurality of tracks are continuously erased, and a mode in which only a single track is erased. Hereinafter, the above operation will be described in detail based on the flowchart (2) shown in FIG. In the flowchart of A in FIG. 1, switch 7
When 7 is turned on, the flow calls subroutine ■ and #
Proceed to V-1. At this point, the erase standby state is set, and at this time, "FF" is set in the buffer memory E for storing the number of erased tracks.

In addition, the track number accessed by the head 3-1 on the two-digit 7-segment LED 25 that displays the track number lights up at a cycle of about 2 Hz.
Performs a blinking operation that repeatedly turns off and off. In other words, the operator can confirm that the erase standby mode has been set by blinking the track number display LED (2Hz cycle).

That is, compared to the method of using a dedicated display element to indicate that the erase standby state is in effect, the method of the present embodiment not only does not require the use of such a dedicated display element, but also displays the track number. By changing the display format of the display, the standby state for erasing is displayed, making it easier to recognize the track number that is about to be erased. In addition, in this embodiment, 7 segments L
Although the standby state for erasure is indicated by blinking the display of the ED25, it is of course possible to use other liquid crystals as the display element, and in addition to blinking, the color and brightness of the display may be changed. Various methods are possible, such as changing the form of displayed characters.

In addition, if there is a display that displays other information than the track number, such as the number of free tracks, the display format of the display can be changed as described above to enable the erase standby state. It may be possible to display a certain thing.

The flow then proceeds to #■-2.

#V-2; Here, it is determined whether or not the PB mode flag is set, and if it is set, the flow advances to #V-4; otherwise, it is determined that the switch 77 is turned off. After confirmation, the flow advances to #v-3.

#V-3, the subroutine ◎ for setting the playback mode described above is called, the playback mode is set,
The flow advances to #v-4, so when the erase standby switch 77 is turned on, #V-2. By executing #V-3, the playback mode is set and the erase standby state is set.

#V-4; Here, it is determined whether the switch 78, that is, the erase execution switch is turned on. If it is on, #V-4-1; if not, #V-1
The flow advances to step 5.

#V-4-1. Here, the branch destination of this step is determined by a switch that is prepared in advance in the case (not shown) of the magnetic sheet 1 and that determines the presence or absence of a claw. In other words, this claw has the function of preventing accidental erasure, and if it is broken off, it is promised in advance not to erase the data. Therefore, if the accidental erasure prevention is set, the flow advances to #V-18. If not set, the flow advances to #v-5.

#V-5: In this step, it is determined whether the value set in the buffer memory E (hereinafter referred to as E) for storing the number of erased tracks is "0". The buffer memory E is previously set to "FF" in #V-1, but the setting value can be changed in #V-15, which will be described later. Here, if the value set in the buffer memory E is "0", the flow proceeds to #V-18; otherwise, the flow proceeds to #V-5-1. Next, #■-5-1 will be explained.

#l-5-1; In this step, it is determined whether the value set in the buffer memory E is "FF". If it is "FF'", the flow advances to #v-6, and if it is not "FF", the flow advances to #V-5-2.

#V-5-2; Set the field flag and set the field playback mode.

The flow proceeds to #U-6.

#V-6; Here, display the track number 7
The blinking of the segment LED 25 is switched from the 2Hz set in #V-1 to the fast cycle of 5H2. In addition, when performing continuous track erasure, the set track number is displayed on the 7-segment LED 25 instead of the track number being accessed by the head 3-1 in #V-17 described later. Even #v
By executing -6, the 7-segment LED 25 is automatically switched to display the track number. Therefore, the user can confirm which track is currently being erased during continuous track erasing.

#V-7; Here, the CPU 40 uses the erase signal generator 85
is controlled to generate an erase signal and erase is executed.

Note that when erasing is to be performed, the switches 2 and 3 shown in FIG. 1 are controlled so that the heads 3-1. 3-2 is connected to a recording amplifier. Here, when the field flag is set, that is, in the case of filled playback mode, the erase current flows only to the head 3-1 shown in FIG. 1 that is playing back, and one track is erased. If the field flag is cleared, that is, if frame playback is selected, the head 3 shown in Figure 1
Erasing current flows simultaneously to both of -1 and 3-2 to erase one frame's worth of tracks, in other words, two adjacent tracks' worth of video signals are erased.

Note that in this embodiment, erasure in frame mode is executed only when the flow advances from #V-5-1 to #v-6 without passing through #V-5-2. There is. In other words, in #V-5-1, the value of buffer memory E is “FF”.
”, that is, when the continuous erase mode, which will be described later, is not selected.

#V-8, wait until erasing is completed.

When erasing is completed, the flow advances to #V-8-1.

#V-8-1; Here, it is determined whether E is equal to "FF". If it is equal to "FF", the single erase mode is in effect, and the flow proceeds to #V-18; otherwise, continuous track erase is set, and the flow proceeds to #V-9.

#V-9; Here, the value of buffer memory E is subtracted by 1. Flow proceeds to #V-10.

#V-10; In this step, it is determined whether the value of buffer memory E is larger than O.

That is, the number of tracks to be erased when continuous track erasure is set is detected, and if it is greater than 0, the flow proceeds to #V-11; otherwise, it is assumed that continuous track erasure has ended. Proceed to #V-18.

#V-11; In this step, it is determined whether the stop switch 61 is turned on. If it is turned on, the flow branches to #V-18, and if it is not turned on, the flow proceeds to #V-12. That is, the continuous erasing mode, which will be described later, is selected, and if the stop switch 61 is operated while this mode is being executed, the continuous erasing can be interrupted. Flow then proceeds to #V-12.

#V-12; In this step, it is determined whether N of the track number buffer memory is 50 or more, that is, whether the track being accessed by the head 3-1 is the final track. If so, the flow proceeds to #V-18 and the erase operation is terminated. If not, the flow proceeds to #V-13.

#V-13: By executing this step, the track position accessed by the heads 3-1, 3-2 moves one track toward the inner circumference. Also head: 3
With the movement of -1.3-2, N+1 is set to N in the track number memory. Then the flow is #V-5
Branch to -2.

Therefore, when continuously erasing tracks, #V-5-2 to #V-1 are used until the stop switch 61 is turned on or until the innermost track is erased.
The flow of step 3 is repeated until the value of the buffer memory E becomes O, that is, until the set number of tracks has been erased.

Next, the flow after #V-15 for setting the continuous erase mode executed as described above will be explained.

#V-15; 10 shown in Figure 1 from 63 to 2
It is determined whether any of the key switches is turned on or not. If it is turned on, the flow proceeds to #■-16; if not, the flow proceeds to #V-15-1.

#V-16; In this step, the continuous track erase mode will be set. In other words, the number input using the IO key switches 63 to 72 becomes the number of tracks on which continuous erasure is to be performed. In the erase track number buffer E, the numerical value of the turned on IO key is set in the 1's digit. Flow then proceeds to #V-17.

#V-17, 7 segment LED in this step
25, the value of E is displayed. This situation will be explained with reference to FIG. 28. In #V-15, the value of the first 10 key switch turned on is set to the 1 digit of E (#V-16
), and in this step, Fig. 25 (a
), it will be displayed in the 1s digit of the LED 25. Here, before reaching the display shown in FIG. 22(a), the track number is displayed on the display and is blinking.

Further, F set to E is displayed as "0". In addition, the value displayed on the display is 2Hz in #V-1.
Since the blinking operation continues to be repeated, the display "0I" shown in FIG. 25(a) will blink. The flow then proceeds to #V-17-1.

#l-17-1; Now wait until the 10 key switch is turned off. When turned off, the flow is #V-15
Proceed to -1.

#V-15-1: Erase standby switch 7 here
7 is turned on. If it is turned on, the flow advances to #V-18, and if it is not turned on, the flow advances to #V-15-2.

That is, by turning on the erase standby switch 77, the erase standby state set in #V-1 is automatically canceled by turning on the switch 77 again and in the steps after #V-18. Therefore, there is no need to provide a dedicated release switch.

#V-15-2; Here, it is determined whether the switch 78 and the switches other than the IO primary key are turned on. If it is turned on, the flow branches to #V-18, and if it is not turned on, the flow branches to #V-4.

That is, the erase standby state is automatically canceled by turning on a switch other than the IO main key as well, by the steps after #V-18. Therefore, there is no need to provide a dedicated release switch. Therefore, there is no need to take the trouble to provide a separate switch. Above (7)
#V-15-1. If you pass step #V-15-2 with No, you will have to repeat the steps described above from #V-4, or the 7 segment 1-LED 25 has already been set to 2nd segment.
The operation when executing steps #V-4 and subsequent steps when "777" shown in FIG. 5 is displayed will be explained.

When the IO main key switch is turned on in #V-15, the numerical value input by the switch in #V-16 is set to the 1st place in the buffer memory E, and the number that was previously set in the 1st place is stored in the buffer memory E. The number set in the 10th place disappears.

For example, if the "5" key of the IO main key switches is turned on, #V-16. #V
-17, the display shown in FIG. 28(b) is displayed on the 7-segment LED 25. Of course, the value set in the buffer memory E in this case is I5.

Next, when a good value "2" is similarly input to the IO main key switch, the display shown in FIG. 25(c) is produced. The above display example shows the display performed by the LED 25 when 1, 5.2 of the 10 key switches are turned on in order in the erase standby state. Furthermore, the displayed numerical value matches the value set in E as it is. In other words, if a value of "2" or more is set using the 10-key switch, this is equivalent to selecting the continuous erase mode.
Further, the set value becomes the number of tracks on which continuous erasing is performed. This situation can be seen in #V in the flow description above.
~10, if the value of the buffer memory E is greater than O, the flow proceeds to #V-11, otherwise branches to #V-18, and if the track number N is less than 50, the flow proceeds to #V-11. UP L the track at 13
Step #V-5-2+: Branching and executing steps #V-6 and subsequent steps perform continuous erasure.

In other words, if the stop switch 6I is not turned on at #V-11, until the value of E becomes equal to 0 or the innermost track No. 50 is erased,
Erasing will be performed continuously.

Then after performing the steps described above run #
V-18 to #V-2o will be explained.

#V-+8; At this point, the blinking of the 7-segment LED 25 is stopped, and ]・Rack No. N is displayed on the display. The flow then reaches #V-19. In other words, this step erase standby state is released.

#V-19; If the switch 77 is turned on, the process waits; if the switch 77 is turned off, the process proceeds to #■-20.

#V-2o; At this point, the flow returns to the flow shown in 8 of FIG.

As explained above, when performing erasing, in this embodiment, there are two modes: a mode in which erasing is performed only once, a mode in which it is performed continuously, and a mode in which erasing is performed after specifying the number of tracks to be continuously erased in advance. However, for erasing when the number of erase tracks is not set using the 10-key switch, the value of E is set to "F" in advance in #■-5-1.
F", the process moves to #v-6 without passing through #V-5-2. Therefore, if the field flag is cleared in the erase standby state)
In this case, erasing in frame mode, that is, erasing for two tracks, is performed, and if the field flag is set, erasing for one track is performed in field mode. In other words, if it was played in frame mode, the 2
If a track has been played back in field mode, the played track [track] will be erased. However, since the number of erased tracks is set by the 10-key switch and the data goes through i#V-5-2, erasure is always performed in field mode. However, if “0” is set from the 10 key switch, #v-5 will be
1, no erase is performed to branch to #V-18. In addition, since the field flag is set in #V-5-2 when "B" is set, even if the frame is being played back, the outer periphery of the two tracks constituting the frame image will be Only one track will be erased.

Therefore, it is possible to erase only the signal recorded on one of the two tracks constituting a frame image.

Furthermore, when performing continuous track erasing, it is generally assumed in many cases that new information, such as a video signal, is recorded on the erased track. In the embodiment described above, when continuous track erasing is completed, the head 3-1 is located on the last erased track, so when recording new information, the user must press the track UP switch 54 and the track DOWN switch. It is necessary to operate the switch 55 so that the head 3-1 accesses the track on which erasing has started.

Therefore, the next step is to execute continuous track erasing, and when this is completed, the flow for realizing a highly effective function in terms of operability, in which the head 3-1 automatically accesses the track where continuous erasing started. is shown in FIG. The flow shown in FIG. 29 is similar to #V-18 shown in FIG.
This is a flow inserted between each step of #V-19.

First, when subroutine V is executed, the track number N that is being accessed at that time in #V-1 is stored in memory N'. After the erasure is executed according to the flow described above and reaches #V-18, the flow shown in FIG. 29 is executed. That is, in #V-18-1, it is determined whether the number of the track that the head 3-1 is accessing at that time matches the number of the track stored in the memory N' in #V-1, and if they match. If not, #V-18-2. #V18-3 is executed, the head 3-1 is controlled to access one track on the outer circumference, N-1 is set for N, and memory N is displayed in 7 segment I and ED25. . The flow then returns to #V-18-1 and #V-18-2 . until the number of the track being accessed by the head 3-1 matches the number of the track stored in the memory N'. #V-18-3 is repeated and when the track on which head 3-1 has started erasing is accessed, #V
The flow branches from 18-1 to #V-19, and the above-mentioned #
Steps after V-19 are executed. Therefore, the second
By executing the flow shown in Figure 9, the head 3-1 automatically accesses the track where erasing started when erasing is completed, thereby omitting the operation of manually searching for the position where erasing started at the time of next recording. I can do it.

Furthermore, when performing continuous erasing, the video to be erased is played back for a certain period of time, the operator is made to confirm this, and after determining whether or not the stop switch 61 is turned on, the erasing operation for that track is started. is extremely effective in preventing accidental erasure.

To realize this function, one track is UP in #V-13 of subroutine V shown in FIG.

After executing N+1 for N until executing #V-7, a step for a delay of about 1 second is preferably provided in the step immediately after #v-6, and furthermore, during this delay, the stop switch 61 is Determine whether or not is turned on,
If not turned on, go to #V-7; if turned on, go to #V-
What is necessary is to provide a step that branches to 18.

By providing such a step, it is possible to confirm the video signal to be erased, so that if a video that is not desired to be erased is played back, continuous erasing can be interrupted by turning on the stop switch 61. Therefore, the probability of erroneous erasing is dramatically reduced.

In addition, when performing continuous erasing, in the above-mentioned embodiment, the flow branches from #V5-1 to #V5-2 in subroutine ①, and by executing #V5-2, all data is erased one track at a time in field mode. However, in order to shorten the execution time of continuous erasing, it is necessary to erase two tracks at least once during continuous track erasing by sending an erasing signal to two heads at the same time in frame mode. is valid. An example in this case will be described below.

First, in FIG. 30, the flow shown in FIG. 30(a) is changed to @V-6 shown in FIG. This step is inserted between the step #V-7, and the flow shown in FIG. 30(b) is the step #V-11. This step is inserted between step #Vi2. Next, the flow will be explained.

After the subroutine (2) shown in FIG. 27 is executed up to #2-6, #V-6-1 is executed following the subroutine #V-6. In this step, it is determined whether the number of erased track buffers E is two or more, that is, whether continuous track erasure is being performed.

If it is 2 or more here, the flow is #V-6-2
If not, proceed to #V-7. #V-6-
2, set E to E-1 and clear the field flag. The flow reaches #v-7. Here, an erase signal is generated at #v-7 shown in FIG.
In this case, if the field flag is set, an erase signal is supplied to one of the heads 3-1 and 3-2, that is, the head that is performing field playback, and the field flag is cleared. In this case, the erase signal will be supplied to both heads 3-1 and 3-2 at the same time. After the erase is completed, #V-8 to #V-II are executed as described above, and if the continuous erase operation is not completed, the flow reaches #V-11-1 from #V-11, and the field Determine whether the flag is set.

If continuous track erasure is not set and the field flag is set, the flow advances to #V-12 and follows the flow described above. Also, if continuous track erasure is set in #V-11-1 and the field flag is not set, as described above, #V-
Since two tracks have been erased in step 7, the flow reaches #V-11-2, N is set to N+1, and the head 3-1.degree. 3-2 moves toward the inner circumferential side of the 1 track. After that, the flow reaches @V-13, and the head further moves toward the inner circumferential side of the l track according to the above-described flow.

By doing so, when performing continuous erasing, erasing is performed in frame mode until the number of remaining tracks for continuous erasing becomes 1, so that the execution speed of continuous erasing can be increased. However, in this case, if you want to check the video to be erased before executing the erase, follow #■-6.
When the field flag is set, it is necessary to select heads 3-1 and 3-2 in FIG. 1 for a certain period of time so that head 3-1 performs field reproduction and head 3-2 performs field reproduction. be. Also #V-
2. #Skip step V-3 and switch to PB mode, RE
In particular, by switching between C mode and mode C, a mode in which the reproduced video to be erased during continuous erasing is confirmed and a mode in which the reproduced video is not confirmed may be selected. In other words, select a mote that does not check the video to be erased when performing continuous erasure, and perform the flow shown in Figures 30 (a) and (b) in the 27th mode.
When added to the flow shown in the figure, the time for continuous erasing becomes the shortest, and this is an extremely effective means when erasing all tracks.

Next, subroutine (2) executed when the all-track erase standby switch 79 is turned on will be explained with reference to FIG.

#W-1 7-segment LED 25 flashes "j:;rE" (ALL-ERASE) at 2 Hz, indicating the all-track erase standby state.

#W-2: Determine whether or not the PB mode flag is set, and if it is not set and the flow branches to #W-4 if the flow goes to #W-3.

#W-3-1: Clear the PB mode flag to prohibit reproduction of the magnetic sheet l.

#W-3-2: Detects that the switch 79 is turned off and proceeds to #W-4.

#W-4: Determine whether the erase switch 78 is on or not. If it is on, the flow branches to #W-9; if not, the flow branches to #W-5.

#W-5: All track erase standby switch 79
Determine whether “is turned on or not. If it is turned on, #
If it is not on, the flow branches to #W-6.

#W-6 Determine whether any switch other than switch 79 has been turned on. If it is on, the flow branches to #W-7, and if it is not on, the flow branches to 4w-4.

#W-7: Stop the blinking of LED25, and
5 to display N, that is, the track number accessed by the head 3-1.

#W8: If the switch 79 is turned off at the same time, the process returns to ■.

#W-9: 'When the erase switch 78 is turned on in #W-4, the flow branches to this step. In this step, it is determined whether or not there is an erroneous erasure prevention claw (not shown). If there is, the flow branches to #W-10; if not, the flow branches to #W-7.

#W-10: Determine whether N is "B", that is, the track number accessed by the head 3-1 is "B", and if "P", then #W-12, if not, #W. The flow branches to -11.

#W-11 head: Move 3-1.3-2 to the outer periphery side by one track, then subtract l from N, and the flow is #W
- Return to 10. Therefore #W-10. The flow branches to #W-12 only when the number of the track being accessed by the head 3-1 reaches 1 by repeatedly executing #W-11.

#W-12: Flashing N on LED25 (5Hz)
let This allows the user to know which tracks have been erased when all tracks are erased.

@W-13: Field flag is cleared and frame mode is set. Therefore head 3-1.3-
2 are used together to erase the track.

#W-14: Both steps , and - are #V-7. @
Same as V-8#W-15.

#W-16: Since both heads 3-1 and 3-2 are used and two tracks are erased without moving the heads, in this step, the heads are moved two tracks to the outer circumferential side and further N Add 2 to .

#W-17: Determine whether or not N is 50 degrees, and if it is 5°, the flow branches to #w-7, and if it is not 5o, the flow branches to #W-12, completing erasure of all tracks. #W- until
Steps 12 to #W-17 are repeated.

As explained above, in the all-track erase mode, which is executed by turning on the erase switch after turning on the all-track erase standby switch, the PB mode flag is cleared before erasing, and the video to be erased is not checked. In addition, since erasing is performed two tracks at a time using both magnetic heads 3-1 and 3-2, the time required to erase all tracks is extremely short compared to the method of erasing one track at a time. It's over. Furthermore, when erasing all tracks, the head is moved to the end of the track (in this example, the outermost circumference) and then all the tracks are sequentially erased toward the opposite end. When attempting to erase all tracks, no matter which position the head 3-1 is accessing, all tracks can be surely erased.

Further, during erasing, the number of the track being accessed by the head 3-1 is displayed on the LED 25, so that the user can recognize how much erasing is being performed.

In the embodiments described above, the magnetic sheet 1 is used as the recording medium, but an optical recording medium may be used. A magneto-optical recording medium or other recording medium may also be used. The recording means is a means depending on the recording medium, for example, in the case of an optical disk, an optical head is used, and in the above embodiment, a discriminating means for discriminating the type of information recorded on the recording medium is shown in FIG. Steps #10 to #12≠K, that is, the step of determining whether the video signal to be recorded is a flat video signal or a frame video signal and storing it in memory, and recording it on a recording medium. The erasing means for erasing the recorded information is provided by the head 3-1. shown in FIG. : 3-2 and an erasing signal generator 85, and the control means for controlling the erasing range of the recording medium by the erasing means based on the determination result of the determining means is set to continuous erasing mode or not, and a single screen In the mode of erasing information, the head 3-1゜3
The type of video signal of the track being accessed by -2 is set or cleared by the data read from the memory, or an erase current is applied to both heads 3-1 and 3-2 based on the field flag controlled by 1+lJ. Subroutine (2), especially #V-5-1. #V-6. #V-8.

As mentioned above, in this embodiment, the continuous erasing mode is selected, and the erasure that is being accessed by head 3-1.3-2 is attempted only in the mode of erasing information on a single screen. Based on the result of determining whether a track's video signal is a frame video signal or a field video signal, it is controlled whether to erase two tracks or just one track, so one track at a time. It is not only easier to use than erasing, but also the time required for erasing can be shortened, but it is of course possible to perform such an operation in the continuous erasing mode.

Furthermore, in this embodiment, the information recorded on the recording medium is a field video signal and a frame video signal, but it is not limited to such information, and even if the recording medium is used to record other information, the type of information may vary. Of course, the present invention can be implemented as long as the erasing range is controlled accordingly.

<Effects of the Invention> As explained above, according to the present invention, the erasing range of the recording medium is controlled according to the determination result of the type of the four recorded reports. This has the effect of eliminating the need to manually determine the erasure range depending on the type of information.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a diagram showing combinations of switching states of SW2 to SW5 shown in FIG. 1, and FIG. 3 is a front view of the device of this embodiment. 4 are front views of the remote control device used with the device, FIGS. 5 to 20, 23, and 25.
Figures ~ Figure 27, Figure 29~''fJ31 are flowcharts of the CPU 40 shown in Figure 1, Figures 21, 22,
Figure 24 is a diagram for explaining the TD signal displayed on the monitor, Figure 28 is a diagram for explaining the flow of Figure 27, and Figure 32 is the erase signal generator shown in Figure 1. 85 is a diagram for explaining a signal generated/executed from 85. FIG. 1---- (a air sheet 3-1.3-2-m-head 4O---CPU

Claims (3)

[Claims] (1) Discriminating means for discriminating the type of information recorded on a recording medium, erasing means for erasing information recorded on the recording medium, and erasing means for erasing the information recorded on the recording medium based on the determination result of the discriminating means An erasing device comprising: control means for controlling an erasing range. (2) The information is a video signal, and the determining means is a means for determining whether the video signal is a field video signal or a frame video signal. The erasing device described. (3) When the determining means determines that a frame video signal is recorded, the control means erases a wider range by the erasing means than when it is determined that a field video signal is recorded. 3. The erasing device according to claim 2, wherein the erasing device is a means for controlling the erasing device so as to cause the erasure to occur.