JPS62233844A - Interruption control system - Google Patents

Abstract

PURPOSE:To simplify a program by providing a counter into an arithmetic unit to count the calling frequency of the interruption inhibiting instructions and to hold this count value and then resetting the interruption inhibiting mask of an interruption mask register when said count value is equal to 0. CONSTITUTION:A counter 50 is set into an arithmetic unit 4 to count the calling frequency of the interruption inhibiting instructions and hold this count value. A signal line 51 shows an operation where a computer program 10 writes and reads values to and out of the counter 50. The interruption mask value is written to an interruption mask register 8 by an interruption inhibiting instruction. Then '1' is added to the value of the counter 50 of the unit 4. While '1' is subtracted from the value of the counter with an interruption inhibition release instruction. It is decided whether the value of the counter 50 is equal to 0 or not. Then the interruption inhibition mask is reset if the value of the counter 50 is equal to 0. While the operation is completed as it is if the value of the counter 50 is not equal to 0.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interrupt control method for an information processing device, and particularly to control of interrupt inhibition and cancellation of interrupt inhibition.

[Conventional technology]

FIG. 4 is a schematic configuration diagram of the information processing device. In the figure, ■ indicates a human-powered device such as a keyboard, 2 indicates a storage device such as a RAM, 3 indicates an output device such as a CRT, 4 indicates an arithmetic device such as a CPU, and 5° 6.7 indicates the flow of data. shows.

In such an interrupt control system for an information processing device, interrupt prohibition and cancellation of interrupt prohibition are performed by a computer program stored in the storage device 2, and the interrupt mask register in the arithmetic device 4 is set to prohibit or! This is done by writing the corresponding mask value divided by 6. For example, 'M
ELCOM C03M0700S/700 ■ System Instruction Manual (Mitsubishi Electric) 1), 146, 148, 14
9 shows the specifications of interrupt prohibition and interrupt prohibition release instructions.

Also, ``Operating System'' (written by Madoni Tsuku/Dosonoman, Massachusetts College of Technology).

An example of the actual use of interrupt disabling and interrupt disabling commands is shown in P. 99 of Professor Katsuo Ikeda, University of Tsukuba (translated by Japan Computer Association). Figure 5 shows a conventional interrupt control method in an information processing device. FIG. 3 is a circuit configuration diagram of an interrupt control section used. In the figure, 8 is an interrupt mask register in the arithmetic unit 4, 9 is an interrupt determination circuit, and 10 is a computer program stored in the storage device 2 for controlling interrupts. Further, 11 indicates an operation in which the computer program 10 writes data to the interrupt mask register 8, 12 indicates the flow of data held by the interrupt mask register 8 to the interrupt judgment circuit 9, and 13 indicates the operation of the interrupt judgment circuit 9. Indicates an interrupt request signal to.

Normally, in information processing devices, programs are executed in units called tasks, but for special tasks such as those responsible for system processing, in order to maintain logical consistency of operations, programs are executed in units called tasks. It may be desirable to disable interrupts while a certain part is being executed to prevent task switching. A machine instruction normally prepared for this purpose is an interrupt prohibition (inhibit-1 interrupt) instruction, and after this instruction is called, interrupts are disabled and task switching does not occur. Also, the machine instruction for canceling the interrupt disable state is interrupt disable release (a 11 ).

w-interrupt) instruction.

FIG. 6 is a flowchart 1 showing a procedure for implementing an interrupt disabling instruction in a conventional interrupt control system. In step 14 in the figure, a value for inhibiting interrupts is written into the MIJ write mask register 8 in the arithmetic unit 4. Therefore, even if an interrupt occurs thereafter, all interrupts are prohibited by the interrupt determination circuit 9, resulting in an interrupt prohibited state in which task switching and the like do not occur.

FIG. 7 is a flowchart showing a procedure for implementing an interrupt prohibition release command in a conventional interrupt control system. In step 15 in the figure, the interrupt prohibition mask in the interrupt mask register 8 is reset. Therefore, when an interrupt occurs after this point, the interrupt is accepted and task switching and the like are performed.

FIG. 8 shows an interrupt inhibit instruction (inhibit-inte
rrupt) and interrupt disable release instruction (aI low-i
This is an example of a computer program using ``interrupt''. This program consists of process 1 (18) and process 2 (19).
) with interrupts disabled 5ubrout 1ne
This is an example of writing a subprogram called l.

In the figure, 16 indicates the name of this subprogram, and when this subprogram is called, first 1nhibr t-1n
interrupt is called, instruction 17 is called, and interrupts are disabled. Next, processing 1 (18) and processing 2 (19) are executed, and when they are completed, all low-interru
The pt instruction 20 is called to enable interrupts. 21
indicates the end of this subprogram. That is, 1nhi
When the bit-interrupt instruction 17 is called, the interrupt mask value is written to the interrupt mask register 8, and the interrupt is disabled.
When the pL instruction 20 is called, the interrupt prohibition mask is reset and the interrupt is enabled.

[Problem that the invention seeks to solve]

However, in the conventional interrupt control method as described above, it is not possible to call multiple interrupt prohibition instructions and interrupt prohibition release instructions. Below, this≠j? :: −')
lr' r Details 4: Explanation 6. FIG. 9 is an example of a computer program that calls the interrupt disable command and the interrupt disable release command ↓ multiple times.

Maintenance - The program executes process 3 (24), subroutine call 25, and process 4 (26) with interrupts disabled5.
This is a subprogram called ubrout 1ne2 (22). The points of contact for this program are processing 3 (24) and subroutine call 25.
By executing process 4 (26) with interrupts disabled, 1nhibit is set at the entrance and exit of the subprogram.
-interrupt instruction 23 and allow-int
The rrupt instruction 27 is not called. However, with the conventional interrupt control method, this program does not operate as intended.

First, subprogram 5ubrouL 1ne2 (22)
When this is called, the 1nhibit-interrupt instruction 23 is called, an interrupt mask value is written to the interrupt mask register 8, and interrupts are disabled. Next, process 3
('24) is executed with interrupts disabled, subroutine call 25 is executed and subprogram 5ubrou
t 1ne1 (16) is called. 5u shown in Figure 8
In broutinel (16'), first, i
It is executed with nh interrupts disabled. And allo
w-interrupt20 is called, the interrupt prohibition mask is reset, and the interrupt prohibition state is released. Therefore, when returning to 5ubrout 1ne2 (22>), I expected that process 4 (26) would be executed with interrupts disabled, but 5ubrouLinel (
16), the interrupt-disabled state is canceled, so process 4 is executed in the interrupt-enabled state, and the 5ub
routine2 (22) does not work as expected.

Therefore, in order to create a program that executes the intended part of the program shown in Figure 9 on an information processing device using the conventional interrupt control method, pay attention to the interrupt disable instructions used in each subprogram. I had to pay and program it. FIGS. 10 and 11 are examples of computer programs that operate as expected in the program shown in FIG. 9. The difference between the program shown in FIG. 10 and the program shown in FIG.
This is the car calling utine3 (38).

FIG. 11 shows the 5ubroutinel (
16) is modified, 5ubroutinel
When (36) is called, process 1 (39) and process 2 (
40) is executed with interrupts disabled, and 5ubrout
When calling 1ne3 (38), process 1 (39)
and process 2 (40) are executed in an interrupt-enabled state.

In other words, in conventional interrupt control methods such as this, in which interrupt disable instructions and interrupt disable cancel instructions cannot be called multiple times, careful attention must be paid to where each instruction is used and the flow of execution control, resulting in a complicated program. In addition, there was a problem in that the effort required to develop the program increased.

The present invention has been made to solve such problems, and an object of the present invention is to realize an interrupt control method that makes it possible to call interrupt disable instructions and interrupt disable cancel instructions multiple times.

[Failure to solve the problem]

In the interrupt control method according to the present invention, a counter for measuring and retaining the number of calls of an interrupt disabling instruction is provided in an arithmetic unit, and when an interrupt disabling instruction is called, the value of the counter is incremented by 1 and the interrupt is masked. Write the interrupt mask value to the register to disable interrupts, decrement the counter value by 1 when the interrupt disable release instruction is called, and reset the interrupt disable mask in the interrupt mask register only when the counter value becomes 0. This is what I did.

[Effect]

In the interrupt control method according to the present invention, since the counter holds the number of times the interrupt disabling instruction is called, the interrupt disabling instruction is called multiple times between the time when the interrupt disabling instruction is called and the interrupt disabling instruction is called. This makes programs that use these instructions simpler and reduces the effort required for program development.

〔Example〕

An embodiment of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a circuit configuration diagram of an interrupt control section using an interrupt control method according to the present invention in an information processing apparatus. In the figure, 8 is an interrupt mask register in the arithmetic unit 4, 9 is an interrupt determination circuit, 10 is a computer program for controlling interrupts stored in the storage device 2, and 1
1 indicates the operation of the computer program 10 writing data to the interrupt mask register 8, 12 indicates the transmission of data held by the interrupt mask register 8 to the interrupt judgment circuit 9, and 13 indicates the interrupt request signal. The upper four sides of the figure correspond to portions with the same reference numerals in the conventional example.

The KO is newly provided in the present application, and is a counter that counts the number of times the interrupt disabling instruction is called and holds the value, and is provided in the arithmetic unit 4. Also,
Reference numeral 51 indicates an operation in which the computer program 10 writes or reads a value into the counter 50.

FIG. 2 is a flowchart 1 showing a procedure for implementing an interrupt disabling instruction using the interrupt control section shown in FIG. In the figure, in step 52, an interrupt mask value is written into the interrupt mask register 8, and in step 53, the value of the interrupt disabling instruction call count counter 50 on the arithmetic unit 4 is incremented by one.

FIG. 3 is a flowchart showing the procedure for implementing the interrupt prohibition release command. In the figure, in step 54, the value of the interrupt prohibition instruction invocation count counter 50 is decremented by 1. In step 55, it is determined whether the value of the counter 50 is 0. If it is 0, the interrupt prohibition mask is reset in step 56, and if it is not 0, nothing is done and the process ends.

Figure 9 is an example of a computer program that calls interrupt disable instructions and interrupt disable cancel instructions multiple times.
4), subroutine call 25, and process 4 (26) are executed with interrupts disabled.
This is an example of writing a subprogram called 2).

In this example, the subprogera mu5ubrout 1ne
2 (22) is called 1nhibit-intc
When the rrupt instruction 23 is called and the interrupt mask value is written to the interrupt mask register 8, interrupts are disabled, and furthermore, assuming that the value of the interrupt disable instruction invocation count counter 50 is currently 0, it is incremented by 1. Write. Next, after processing 3 (24) is executed with interrupts disabled, subprogram 5ubrou is executed by subroutine call 25.
tinel (16) is called. 5 shown in Figure 8
In ubrout 1nel (16), first 1
After the nhibit-interrupt 17 is called and the interrupt mask value is written into the interrupt mask register 8 again, since the value of the counter 50 is currently 1, it is incremented by 1 and 2 is written. Next, process 1 (18).

Process 2 (19) is executed with interrupts disabled.

Next, a1 low-interrupt L20 is called, and since the value of the counter 50 is currently 2, it writes 1 decrement U゛i1. The condition continues.

Next, return to 5ubrouLine2 and process 4 (26
) is executed with interrupts disabled, then allow-in
The interrupt 27 is called and since the value of the counter 50 is currently 1, it is decremented by 1 and O is written. Next, the counter 50
Since the value of is 0, the interrupt mask of the interrupt mask register 8 is reset and the interrupt disabled state is released.

In the above embodiments, the type of information processing device is not particularly limited, but since interrupt control is a basic element of this type of device, the present invention can be applied to any information processing device.

〔Effect of the invention〕

As described above, according to the present invention, a counter is provided in the arithmetic unit to measure the number of times the interrupt disable instruction is called and hold the value, and only when this value is 0, the interrupt disable mask of the interrupt mask register is set. By setting it in the reset state, it becomes possible to call the interrupt disable instruction and the interrupt disable cancel instruction multiple times, which simplifies the program and reduces the effort required for program development. .

[Brief explanation of drawings]

&1 Figure 1 is a circuit configuration diagram of an interrupt control unit for carrying out the interrupt control method according to this invention, Figure 2 is a flowchart showing the procedure for realizing an interrupt disable instruction in the interrupt control method according to this invention, and Figure 3 is a diagram showing the interrupt Flowchart showing the procedure for realizing the prohibition release command: Fig. 4 is a block diagram of the information processing device; Fig. 5 is a circuit block diagram of the interrupt control unit for implementing the conventional interrupt control method; The figure is a flowchart showing means for realizing an interrupt disable instruction in a conventional interrupt control system, FIG. 7 is a flowchart showing a means for realizing an interrupt disable release instruction, and FIGS. An example of a computer program using a prohibition release instruction is shown below. 2... tα device, 4... Arithmetic device, 8... Interrupt mask register, 9... Interrupt determination circuit, 10...
- Computer program, 50... counter. Note that the same reference numerals in each figure indicate the same or corresponding parts. Figure 4 Figure 5 Figure 10 Figure 8 Raccoon 34, 31 call 5uboutine3 Hen 32 Figure 11 Processes 1-39 Processes 2-40 if 5aboutine3 then end ~
"δflow-ir+terrt+pj/"-742
°° sacrifice, 3 Figure 6 Figure 8 Figure 7 Figure 9 Processing 4-\-26

Claims (1)

[Claims] An interrupt mask register is provided in an arithmetic unit that executes a program stored in a storage device, and an interrupt prohibition mask of the interrupt mask register is set based on a called interrupt prohibition instruction or interrupt prohibition release instruction. In an interrupt control method for an information processing device that resets the interrupt, a counter is provided in the arithmetic unit to measure the number of times the interrupt disable instruction is called and to hold the value, and when the interrupt disable instruction is called, The value of the above counter is incremented by 1 and the interrupt prohibition mask of the interrupt mask register is set to disable interrupts. When the interrupt disable cancellation instruction is called, the value of the above counter is decreased by 1 and the value of the counter becomes 0. An interrupt control method characterized in that an interrupt prohibition mask of an interrupt mask register is reset to enable interrupts only when the interrupt is enabled.