JPS62198949A - Working control system for multi-processor system - Google Patents

Working control system for multi-processor system

Info

Publication number
JPS62198949A
JPS62198949A JP61042189A JP4218986A JPS62198949A JP S62198949 A JPS62198949 A JP S62198949A JP 61042189 A JP61042189 A JP 61042189A JP 4218986 A JP4218986 A JP 4218986A JP S62198949 A JPS62198949 A JP S62198949A
Authority
JP
Japan
Prior art keywords
processor
processors
load
working
average
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61042189A
Other languages
Japanese (ja)
Inventor
Takehisa Tokunaga
徳永 威久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61042189A priority Critical patent/JPS62198949A/en
Publication of JPS62198949A publication Critical patent/JPS62198949A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Power Sources (AREA)

Abstract

PURPOSE:To reduce the power consumption in a low load mode by changing the number of working processors in response to the total load quantity with no intervention of the manual operation. CONSTITUTION:A load monitor part 21 detects the working factors of all working processors 11-1n and informs them to a selection part 22. Thus the part 22 calculates the average working factor of those processors 11-1n and decides whether this average factor is larger than the prescribed maximum value or not. If the average factor is larger than the maximum level, the presence or absence of the processors that discontinued their operations is checked. If such processors are detected, one of these processors is selected and the start of this processor is instructed to a control part 23. If the average working factor is less than the prescribed level, the propriety of stopping a single processor is decided. Then one of those processors is selected and a command is given to the part 23 to stop the drive of the processor is the average working factor is less than the prescribed maximum level.

Description

【発明の詳細な説明】 発明の目的 産業上の利用分野 本発明は、fi荷分散型のマルチプロセッサ・システム
で使用される動作制御方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an operation control method used in a fi load distributed multiprocessor system.

従来の技術 データ処理システムでは、信頼性や動作のwA続性など
を考慮して負荷分散型のマルチプロセッサ・システムの
構成が採用されることが多い。
In conventional technical data processing systems, a load-balanced multiprocessor system configuration is often adopted in consideration of reliability, WA continuity, and the like.

このような負荷分散型のマルチプロセッサ・システムに
おいては、通常、処理すべき負荷の総量が時間帯によっ
て相当変動するため、予想される高負荷状態に合わせて
プロセッサの設置台数が決定される。
In such a load-balanced multiprocessor system, the total amount of load to be processed usually varies considerably depending on the time of day, so the number of processors to be installed is determined according to expected high load conditions.

発明が解決しようとする問題点 上記従来のマルチプロセッサ・システムでは、低負荷時
にも全てのプロセッサが低稼働率のもとで動作する構成
となっているので、システム全体の電力消費量が増大す
るという問題がある。
Problems to be Solved by the Invention In the above-mentioned conventional multiprocessor system, all processors are configured to operate at a low utilization rate even when the load is low, which increases the power consumption of the entire system. There is a problem.

また、低負荷時の消費電力を節減するため、何台かのプ
ロセッサを停止させようとすれば、人手の介入が必要に
なって手間がかかるだけでなく、総負荷量の誤認や、動
作の停止/開始の誤操作などによって処理に影響を及ぼ
すおそれもある。
Additionally, if you try to stop several processors to reduce power consumption during low loads, it not only requires manual intervention, which is time-consuming, but also leads to misjudgment of the total load and operational problems. There is also a risk that incorrect stop/start operations may affect the processing.

発明の構成 問題点を解決するための手段 上記従来技術の問題点を解決する本発明の動作制御方式
は、各プロセッサが処理中の負荷量を検出して各プロセ
ッサの負荷量が所定範囲の値となるように新たに動作を
停止又は開始させるプロセッサを自動的に選択する選択
手段と、この選択されたプロセッサに対し動作電力の供
給の停止ヒ又は開始を自動的に制御する手段とを備え、
人手を介入させずに総負荷量に応じてプロセッサの稼働
台数を動的に変更することにより、低負荷時の電力消費
量を節減するように構成されている。
Structure of the Invention Means for Solving the Problems The operation control method of the present invention which solves the problems of the prior art described above detects the amount of load being processed by each processor and determines whether the amount of load on each processor is within a predetermined range. a selection means for automatically selecting a processor whose operation is to be newly stopped or started so that the operation is newly stopped or started, and a means for automatically controlling the stoppage or start of supply of operating power to the selected processor,
It is configured to reduce power consumption during low loads by dynamically changing the number of operating processors according to the total load without human intervention.

以下、本発明の作用を実施例と共に詳細に説明する。Hereinafter, the operation of the present invention will be explained in detail together with examples.

実施例 第1図は、本発明の一実施例の動作制御方式を通用する
負荷分散型マルチプロセッサ・システムの構成を示すブ
ロック図である。
Embodiment FIG. 1 is a block diagram showing the configuration of a load-balanced multiprocessor system that uses an operation control method according to an embodiment of the present invention.

このマルチプロセッサ・システムは、制御対象のn台の
プロセッサ11.12・・・1nに加えて、負荷モニタ
部21、選択部22及び制御部23で構成される動作側
′4B装置20を備えている。
This multiprocessor system includes an operation-side '4B device 20 that is composed of a load monitor section 21, a selection section 22, and a control section 23 in addition to n processors 11, 12, . . . 1n to be controlled. There is.

負荷モニタ部21は、稼働中の各プロセッサが実行する
命令をモニタし、このプロセッサが負荷処理の開始と終
了時に実行する所定の命令を検出することにより稼働中
の各プロセッサについて稼働率を検出する。
The load monitor unit 21 monitors instructions executed by each operating processor, and detects the operating rate of each operating processor by detecting predetermined instructions executed by this processor at the start and end of load processing. .

すなわち、負荷モニタ部21は、第2図のフローチャー
トに例示するように、ステップ31において、稼働中の
各プロセッサが実行する負荷処理開始時の所定の命令か
ら負荷処理の開始を検出すると、ステップ32に進み、
その検出位置などから処理を開始したプロセッサ番号を
検出する。次に負荷モニタ部21は、ステップ33で各
プロセッサごとに保有している処理時間タイマのうち対
応のプロセッサのものを起動し、ステップ34で各プロ
セッサごとに保有している非処理時間タイマのうち対応
のものの内容を保存したのちステップ31に戻る。
That is, as illustrated in the flowchart of FIG. 2, when the load monitor unit 21 detects the start of load processing from a predetermined command at the start of load processing executed by each operating processor in step 31, it detects the start of load processing in step 32. Proceed to
The processor number that started the process is detected from the detected position. Next, in step 33, the load monitor unit 21 activates the processing time timer of the corresponding processor among the processing time timers held for each processor, and in step 34, the load monitoring unit 21 activates the processing time timer of the corresponding processor among the processing time timers held for each processor. After saving the corresponding contents, the process returns to step 31.

この負荷モニタ部21は、ステップ35で負荷処理終了
時の所定の命令から負荷処理の終了を検出すると、ステ
ップ36でそのプロセッサ番号を検出する。次に、負荷
モニタ部21は、ステップ37と38において、上記プ
ロセッサの処理時間タイマの内容の保存と非処理時間タ
イマの起動を行う。引き続き、負荷モニタ部21はステ
ップ39に進み、今回保存したプロセッサの処理時間タ
イマの内容と、前回保存した該当のプロセッサの非処理
時間タイマの内容からそのプロセッサの稼働率を算定し
、制御部22に通知する。
When the load monitoring unit 21 detects the end of load processing based on a predetermined command at the end of load processing in step 35, it detects the processor number in step 36. Next, in steps 37 and 38, the load monitor section 21 saves the contents of the processing time timer of the processor and activates the non-processing time timer. Subsequently, the load monitor unit 21 proceeds to step 39, calculates the operating rate of the processor based on the contents of the processing time timer of the processor saved this time and the contents of the non-processing time timer of the corresponding processor saved last time, and calculates the utilization rate of the processor. Notify.

選択部22は、定期的に起動され、第3図のフローチャ
ートに示すような、プロセッサの選択処理を開始する。
The selection unit 22 is activated periodically and starts processor selection processing as shown in the flowchart of FIG.

すなわち、選択部22は、ステップ41と42において
、稼働中の各プロセッサについて負荷モニタ部21から
受は取った最新のm個の稼働率の時間平均値を算定した
のらステップ43に進み、稼働中の全プロセッサについ
て稼働率の平均値を算定する。なお、この実施例では、
全プロセッサの処理能力を同一としている。引き続き、
選択部22はステップ44で稼働中の全プロセッサの稼
働率の平均値が所定の最大値(例えば80%)以上であ
るか否かを判定し、そうであればステップ45に進み、
動作停止中のプロセッサの有無を判定する。選択部22
は、動作停止中のプロセッサが存在すればステップ46
に進み、その一つを選択して動作の開始を制御部23に
指令し、選択処理を終了する。選択制御部22は、稼働
率が所定の最大値以上であっても動作停止中のプロセッ
サが存在しなければ、そのまま選択処理を終了する。
That is, in steps 41 and 42, the selection unit 22 calculates the time average value of the latest m operation rates received from the load monitor unit 21 for each operating processor, and then proceeds to step 43 to determine the operating rate. Calculate the average utilization rate for all processors in the system. In addition, in this example,
All processors have the same processing power. continuation,
In step 44, the selection unit 22 determines whether the average value of the operating rates of all operating processors is equal to or higher than a predetermined maximum value (for example, 80%), and if so, proceeds to step 45.
Determine whether there is a processor that is not operating. Selection section 22
If there is an inactive processor, step 46 is executed.
, selects one of them, instructs the control unit 23 to start the operation, and ends the selection process. Even if the operating rate is equal to or higher than a predetermined maximum value, if there is no inactive processor, the selection control unit 22 immediately ends the selection process.

選択部22は、ステップ44で稼働中の全プロセッサの
稼働率の平均値が所定の最大値以下である場合にはステ
ップ47に進み、これが所定の最小値(例えば60%)
以下であるかどうかを判定する。選択部22は、全プロ
セッサの稼働率の平均値が所定の最小値以下であればス
テップ48に進み、動作中のプロセッサの一つを停止さ
せた場合に稼働率の平均(1rtが所定の最大値を越え
るか否かにより1台停止の可否を判定する。選択部22
は、上記新たな稼働率が所定の最大値を越えない場合に
はステップ49に進み、稼働中のプロセ・7すの一つを
選択して動作の停止を制御部23に指令し、選択処理を
終了する。
In step 44, if the average value of the operating rates of all operating processors is less than or equal to the predetermined maximum value, the selection unit 22 proceeds to step 47, and sets this to a predetermined minimum value (for example, 60%).
Determine whether the following is true. If the average value of the operating rates of all processors is less than or equal to the predetermined minimum value, the selection unit 22 proceeds to step 48, and if one of the operating processors is stopped, the selecting unit 22 determines that the average operating rate (1rt is the predetermined maximum value) is It is determined whether or not one unit can be stopped depending on whether the value exceeds the value. Selection unit 22
If the new operating rate does not exceed the predetermined maximum value, the process proceeds to step 49, selects one of the operating processes, instructs the control unit 23 to stop its operation, and performs the selection process. end.

選択部22は、ステップ47又は48の判定結果が否定
的である場合には、新たなプロセッサの起動を制御部2
3に指令することなく直ちに選択処理を終了する。
If the determination result in step 47 or 48 is negative, the selection unit 22 causes the control unit 2 to activate the new processor.
The selection process is immediately terminated without issuing a command to 3.

制御部23は、選択部22からプロセッサの動作開始/
停止F指令を受けると、指定されたプロセッサに動作の
開始/停止指令を発したのち、動作電源の供給/供給停
止ヒを行う。
The control unit 23 causes the selection unit 22 to start the operation of the processor.
When receiving the stop F command, it issues an operation start/stop command to the specified processor, and then supplies/stops the supply of operating power.

以上、各プロセッサの処理能力が同一の場合を例示した
が、これらがプロセッサごとに異なる場合には、処理能
力を考!Qシた総負荷量を基準として動作の開始又は停
止対象のプロセ・ソサを選択すればよい。
Above, we have illustrated the case where each processor has the same processing capacity, but if these differ from processor to processor, consider the processing capacity! The processor/source to start or stop the operation may be selected based on the total load amount determined by Q.

また、負荷モニタ部でプロセッサの実行命令を検出して
処理の開始と終了を検出する構成を例示したが、各プロ
セッサが処理の開始と終了に際しその旨を4A、荷モニ
タ部21に通知する構成とじてもよい。あるいはまた、
プロセッサ間の負荷分世を制御するいずれか一つのプロ
セッサから選択部22に稼働中プロセッサの稼働率を直
接通知したり、そのような一つのプロセッサ自体が動作
の開始又は停止対象の選択処理を行う構成とすることも
できる。
In addition, although a configuration has been exemplified in which the load monitor unit detects an execution command of a processor to detect the start and end of processing, a configuration in which each processor notifies 4A and the load monitor unit 21 of the start and end of processing. You can close it. Or again,
Any one of the processors that controls load distribution between processors directly notifies the selection unit 22 of the operating rate of the operating processor, or such one processor itself performs processing for selecting a target to start or stop operation. It can also be configured.

発明の効果 以上詳細に説明したように、本発明の動作制御方式は、
各プロセッサが処理中の負荷量を検出して各プロセッサ
の負荷量が所定範囲になるように新たに動作を停止又は
開始させるプロセッサを自動的に選択する手段と、この
選択されたプロセッサの動作の開始/停止を自動的に制
御する制御手段を備える構成であるから、人手の介入な
く総負4:1景に応じてプロセッサの稼働台数が動的に
変更され、低負荷時の電力消費量が節減される。
Effects of the Invention As explained in detail above, the operation control method of the present invention has the following effects:
Means for detecting the amount of load being processed by each processor and automatically selecting a processor to newly stop or start operation so that the amount of load on each processor falls within a predetermined range, and controlling the operation of the selected processor. Since the configuration is equipped with a control means that automatically controls start/stop, the number of operating processors can be dynamically changed according to the total load ratio of 4:1 without human intervention, reducing power consumption during low loads. Saved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の動作制御方式を適用する負
荷分散型マルチプロセッサ・システムの構成を示すブロ
ック図、第2図は第1図の動作制御装置20の負荷モニ
タ部21による負荷モニタ処理の手順の一例を説明する
ためのフローチャート、第3図は同じく選択部22によ
る動作の開始/停止F対象のプロセッサ選択処理の手順
の一例を説明するためのフローチャートである。 1l−1n・・プロセッサ、20・・動作制御装置、2
1・・負荷モニタ部、22・・選択部、23・・制御部
FIG. 1 is a block diagram showing the configuration of a load-balanced multiprocessor system to which an operation control method according to an embodiment of the present invention is applied, and FIG. 2 shows a load monitoring unit 21 of the operation control device 20 shown in FIG. FIG. 3 is a flowchart for explaining an example of a procedure for monitoring processing. Similarly, FIG. 1l-1n...Processor, 20...Operation control device, 2
1: Load monitor section, 22: Selection section, 23: Control section.

Claims (1)

【特許請求の範囲】 負荷分散型のマルチプロセッサ・システムにおいて、 動作中の各プロセッサの負荷量を検出し、各プロセッサ
の負荷量が所定範囲の値となるように新たに動作を停止
又は開始させるプロセッサを自動的に選択する選択手段
と、 この選択されたプロセッサに対し動作電力の供給の停止
又は開始を自動的に制御する制御手段とを備えたことを
特徴とするマルチプロセッサ・システムの動作制御方式
[Claims] In a load-balanced multiprocessor system, the amount of load on each operating processor is detected, and the operation is newly stopped or started so that the amount of load on each processor falls within a predetermined range. Operation control of a multiprocessor system characterized by comprising: selection means for automatically selecting a processor; and control means for automatically controlling stop or start of supply of operating power to the selected processor. method.
JP61042189A 1986-02-26 1986-02-26 Working control system for multi-processor system Pending JPS62198949A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61042189A JPS62198949A (en) 1986-02-26 1986-02-26 Working control system for multi-processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61042189A JPS62198949A (en) 1986-02-26 1986-02-26 Working control system for multi-processor system

Publications (1)

Publication Number Publication Date
JPS62198949A true JPS62198949A (en) 1987-09-02

Family

ID=12629057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61042189A Pending JPS62198949A (en) 1986-02-26 1986-02-26 Working control system for multi-processor system

Country Status (1)

Country Link
JP (1) JPS62198949A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0210960A (en) * 1988-06-28 1990-01-16 Meisei Electric Co Ltd Line number and reception terminal number control system, and incoming call distribution system
JPH04215168A (en) * 1990-12-13 1992-08-05 Nec Corp Computer system
US5404541A (en) * 1987-08-28 1995-04-04 Hitachi, Ltd. Operation monitoring and controlling apparatus for computer system
JPH08202468A (en) * 1995-01-27 1996-08-09 Hitachi Ltd Multiprocessor system
JP2006301749A (en) * 2005-04-18 2006-11-02 Hitachi Information Technology Co Ltd Server device
JP2008129846A (en) * 2006-11-21 2008-06-05 Nippon Telegr & Teleph Corp <Ntt> Data processor, data processing method, and program
JP2008257578A (en) * 2007-04-06 2008-10-23 Toshiba Corp Information processor, scheduler, and schedule control method of information processor
JP2009009194A (en) * 2007-06-26 2009-01-15 Hitachi Ltd Storage system having function to reduce power consumption
JP2009037335A (en) * 2007-07-31 2009-02-19 Toshiba Corp Power management device and power management method
JP2009093383A (en) * 2007-10-07 2009-04-30 Alpine Electronics Inc Method and device for controlling multicore processor
JP2009134577A (en) * 2007-11-30 2009-06-18 Fujitsu Microelectronics Ltd Power source control device and system lsi having power source control device
WO2010029641A1 (en) * 2008-09-12 2010-03-18 富士通株式会社 Information processing device, method for controlling information processing device, and program for controlling information processing device
WO2011096249A1 (en) * 2010-02-05 2011-08-11 日本電気株式会社 Load control device
WO2012001783A1 (en) 2010-06-30 2012-01-05 富士通株式会社 Data restoration program, data restoration device, and data restoration method

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5404541A (en) * 1987-08-28 1995-04-04 Hitachi, Ltd. Operation monitoring and controlling apparatus for computer system
JPH0210960A (en) * 1988-06-28 1990-01-16 Meisei Electric Co Ltd Line number and reception terminal number control system, and incoming call distribution system
JPH04215168A (en) * 1990-12-13 1992-08-05 Nec Corp Computer system
JPH08202468A (en) * 1995-01-27 1996-08-09 Hitachi Ltd Multiprocessor system
JP2006301749A (en) * 2005-04-18 2006-11-02 Hitachi Information Technology Co Ltd Server device
JP2008129846A (en) * 2006-11-21 2008-06-05 Nippon Telegr & Teleph Corp <Ntt> Data processor, data processing method, and program
JP2008257578A (en) * 2007-04-06 2008-10-23 Toshiba Corp Information processor, scheduler, and schedule control method of information processor
US8261036B2 (en) 2007-06-26 2012-09-04 Hitachi, Ltd. Storage system comprising function for reducing power consumption
JP2009009194A (en) * 2007-06-26 2009-01-15 Hitachi Ltd Storage system having function to reduce power consumption
US8583883B2 (en) 2007-06-26 2013-11-12 Hitachi, Ltd. Storage system comprising function for reducing power consumption
JP2009037335A (en) * 2007-07-31 2009-02-19 Toshiba Corp Power management device and power management method
JP2009093383A (en) * 2007-10-07 2009-04-30 Alpine Electronics Inc Method and device for controlling multicore processor
JP2009134577A (en) * 2007-11-30 2009-06-18 Fujitsu Microelectronics Ltd Power source control device and system lsi having power source control device
JP5257453B2 (en) * 2008-09-12 2013-08-07 富士通株式会社 Information processing apparatus, information processing apparatus control method, and information processing apparatus control program
WO2010029641A1 (en) * 2008-09-12 2010-03-18 富士通株式会社 Information processing device, method for controlling information processing device, and program for controlling information processing device
US8732503B2 (en) 2008-09-12 2014-05-20 Fujitsu Limited Information processing apparatus and controlling method thereof
WO2011096249A1 (en) * 2010-02-05 2011-08-11 日本電気株式会社 Load control device
US9086910B2 (en) 2010-02-05 2015-07-21 Nec Corporation Load control device
WO2012001783A1 (en) 2010-06-30 2012-01-05 富士通株式会社 Data restoration program, data restoration device, and data restoration method
US9037808B2 (en) 2010-06-30 2015-05-19 Fujitsu Limited Restoring data using parity when suspending a core of a multicore processor

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