JPS6219878U - - Google Patents
Info
- Publication number
- JPS6219878U JPS6219878U JP11115885U JP11115885U JPS6219878U JP S6219878 U JPS6219878 U JP S6219878U JP 11115885 U JP11115885 U JP 11115885U JP 11115885 U JP11115885 U JP 11115885U JP S6219878 U JPS6219878 U JP S6219878U
- Authority
- JP
- Japan
- Prior art keywords
- recording
- circuit
- processing
- video signal
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Description
第1図はこの考案のビデオテープレコーダの1
実施例のブロツク図、第2図は従来のビデオテー
プレコーダを改良したブロツク図、第3図は第2
図の自動利得制御増幅回路の詳細なブロツク図、
第4図a〜cは第3図の動作説明用のタイミング
チヤートである。
Ix′,Ix″……第1、第2のビデオ入力端
子、3a,3b……記録ブロツク、5a,5b…
…自動利得制御回路、6a,6b……記録処理回
路、16……モニタ切換スイツチ、17……入力
切換スイツチ。
Figure 1 shows one of the videotape recorders of this invention.
A block diagram of the embodiment, Fig. 2 is a block diagram of an improved conventional video tape recorder, and Fig. 3 is a block diagram of an improved conventional video tape recorder.
Detailed block diagram of the automatic gain control amplifier circuit in Fig.
4a to 4c are timing charts for explaining the operation of FIG. 3. Ix', Ix''...first and second video input terminals, 3a, 3b...recording block, 5a, 5b...
...Automatic gain control circuit, 6a, 6b... Recording processing circuit, 16... Monitor changeover switch, 17... Input changeover switch.
Claims (1)
に自動利得制御増幅回路がそれぞれ接続され、該
増幅回路の出力ビデオ信号を記録処理回路により
処理してビデオテープに記録する2台の記録装置
と、一方の前記記録装置の前記増幅回路と前記記
録処理回路との間に設けられ、同一番組の同時記
録への切換により他方の前記記録装置の前記増幅
回路の出力ビデオ信号を前記一方の記録装置の前
記記録処理回路に出力し、非同時記録への切換え
により前記他方の記録装置の前記増幅回路の出力
ビデオ信号を前記他方の記録装置の前記記録処理
回路に出力する入力切換スイツチと、前記両処理
回路の入力ビデオ信号を択一的にモニタテレビジ
ヨン受像機に出力するモニタ切換スイツチとを備
えたビデオテープレコーダ。 Two recording devices each having first and second video input terminals and an automatic gain control amplifier circuit connected to both input terminals, and processing the output video signal of the amplifier circuit by a recording processing circuit and recording it on a video tape. and the amplifying circuit and the recording processing circuit of one of the recording devices, and when switching to simultaneous recording of the same program, the output video signal of the amplifying circuit of the other recording device is transferred to the one of the recording devices. an input changeover switch that outputs an output video signal of the amplifier circuit of the other recording device to the recording processing circuit of the other recording device by switching to non-simultaneous recording; A video tape recorder comprising a monitor changeover switch for selectively outputting the input video signals of both processing circuits to a monitor television receiver.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11115885U JPS6219878U (en) | 1985-07-20 | 1985-07-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11115885U JPS6219878U (en) | 1985-07-20 | 1985-07-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6219878U true JPS6219878U (en) | 1987-02-05 |
Family
ID=30990819
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11115885U Pending JPS6219878U (en) | 1985-07-20 | 1985-07-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6219878U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0194841U (en) * | 1987-12-16 | 1989-06-22 |
-
1985
- 1985-07-20 JP JP11115885U patent/JPS6219878U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0194841U (en) * | 1987-12-16 | 1989-06-22 |
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