JPS62175879A - Generating device for data on binary picture similarity conversion picture element - Google Patents

Abstract

PURPOSE:To attain the fast picture converting process in a simple constitution by providing a means that approximates the coordinate value to the integer value. CONSTITUTION:At the time of the picture similarity converting process is started, the prescribed optional four lattice point picture element data are read- out of a store means 1. At the same time, both the integer part data and the decimal part data which form the offset data corresponding to the similarity conversion factor are read-out of an offset data table 2. Then those read-out four lattice point picture element data are rearranged by a picture element data output means 4 under the control of the read-out integer part data and delivered as four lattice point picture element data (p), (q), (r) and (s) in a prescribed array. Then the value of an equation I and the data (p) are obtained by an arithmetic means 5 and totalized. Here (i) and (j) mean the decimal part data. This added value is delivered as the data on a single lattice point picture element of a converted picture which is discriminated by the prescribed threshold value and enclosed by the four lattice point picture elements of an original picture.

Description

[Detailed Description of the Invention] [Summary] While arbitrary four grid point pixel data are simultaneously read out from a storage means for storing a binary image, offset data integer part data and offset data decimal number corresponding to the similarity conversion rate are read out from an offset data table. Read out part data i and j. The four grid point pixel data read out from the storage means in response to the offset data integer part data are rearranged and output as four grid point pixel data p, q, .rlS in a predetermined arrangement. Then, this four grid point pixel data p, q, r,
In response to s and offset fractional part data i, j, (p-
q-rl5)xi×j, (q [1)Xi,
(r-p) Calculate xj and p, add them, determine whether the pixel is ``1'' or ``O'' based on the relationship that the added value has with a predetermined darkness value, and add this to the original image. Above 4
Processing such as outputting one lattice point pixel data of a converted image surrounded by lattice point pixel data is performed on desired four points of the original image.
This is done for each grid point pixel data.

By doing so, converted image data can be generated at high speed and with a simplified hardware configuration.

[Industrial application field]

The present invention relates to a binary image similarity conversion pixel data generation device,
More specifically, the present invention relates to a binary image similarity conversion pixel data generation device that improves the processing mode for obtaining one grid point pixel data of a converted image surrounded by four grid point pixel data of an original image from these data.

In processing binary images such as characters, it may be necessary to enlarge or reduce the images. In such image processing, since the number of pixel data involved in the processing is extremely large, high-speed processing is required. This requirement becomes even more urgent when real-time performance is required.

[Conventional technology]

As one of such image conversion processing techniques, a technique is known in which interpolation is performed after coordinate conversion and dark value processing is performed to obtain converted image data. The principle is as follows.

That is, when the size of the original image is m dots x m dots and the size of the converted image (enlarged or reduced) is n dots x n dots, the mapping from the converted image to the original image is as follows ( (See Figure 4).

In this mapping, the value of the point with coordinates (x, y) is equal to the value of the point with coordinates (a, b), so the mapping becomes 2
It can be expressed as a ×2 matrix, so X=rlxa/n
, y=mxb/n.

Using the above formula (1), while changing the values of a and b, the coordinates (
The desired converted image can be obtained by finding the value (■) of the points (x, y).

[Problem that the invention seeks to solve]

However, in the above technique, the values of the coordinates x, y are generally not integers, so the value of the point at the coordinates x, y is
must be approximated from its neighboring points (see Figure 5).

This approximation is based on the values p of four points near the point with coordinates (x, y)
, q, r, and s. And the coordinates (x,
Let i and j be the decimal parts of y), the approximate expression for the value I of the point with coordinates x and y is expressed as follows.

The value I of each pixel obtained by this formula (2) takes a value from 0 to 1 in the case of a binary image, so if you perform dark value processing on that value, you can obtain the desired converted image. (As an example of the device, Japanese Patent Laid-Open No. 57-3109
There is a disclosure in Publication No. 6. ), the calculation process according to the above equation (2) is relatively time consuming, which makes this technique unsuitable for high-speed image conversion processing. Moreover, the complexity of the hardware configuration is also unavoidable.

The present invention was created in view of such problems, and an object of the present invention is to provide a binary image similarity conversion pixel data generation device that can perform high-speed image conversion processing with a simple configuration.

[Means for Solving the Problems] FIG. 1 shows a block diagram of the principle of the present invention. In this figure, l is a storage means that stores a binary image and can read out pixel data of arbitrary four grid points at the same time.

2 is an offset data table that stores offset data from the origin of a lattice point of a converted image I surrounded by four lattice points of the original image, divided into integer part data and decimal part data i and j for each similarity conversion rate.

Reference numeral 3 denotes a table reading means for reading integer part data and decimal part data corresponding to the similarity conversion rate from the offset data table 2.

4 stores the 4 grid point pixel data read out from the storage means 2 in response to the integer part data read out from the offset data table 2 into the 4 grid point pixel data p, q, in a predetermined array.
This is pixel data output means for outputting as r and s.

5 is the output 4 grid point pixel data p+ q+ r
.

In response to S and read fractional part data i, j, (p
q r+s) xixj, (q-p) xi.

It is an arithmetic means that outputs the sum of (rp)×j and p.

Reference numeral 6 is a determining means for determining whether the sum is "1" or "0".

(Operation) When the image similarity conversion process is started, the pixel data of any four predetermined lattice points from the storage means 1 is read out, while the integer part data constituting the offset data corresponding to the similarity conversion rate is read out from the offset data table. and decimal part data are read.

The read out 4 lattice point pixel data is rearranged in the pixel data output means 4 under the control of the read out integer part data to form 4 lattice point pixel data p, q, r, in a predetermined arrangement.
Output as s.

Then, in the calculation means 5, (p-q-r+s)xi
xj, (q-p)xi, (r-p)×j and p
is determined and each value is summed. The added value is determined by a predetermined darkness value and output as data of one grid point pixel of the converted image surrounded by four grid point pixels of the original image.

The above processing is performed for each of the four lattice point pixels of the intended original image.

In this way, it becomes possible to generate converted image data at high speed and with a simplified hardware configuration.

〔Example〕

FIG. 2 shows an embodiment of the invention. As is clear from the description below, this embodiment is also based on the principle of the present invention, that is, finding the converted pixel value of the converted image from the following equation obtained by modifying equation (2).

And since p, q, r, and s take O or 1, p, q
, r, and s, the converted pixel value I becomes as shown in Table 1.

In Table 1 and Figure 2, 10 is a memory device (first
(corresponding to figure storage means). This is when m=8 (original image). Circles indicate memory cells. Pattern data input from the outside is performed through the data bus 10-1. A decoder 10-2 decodes the integer part data (int y) of the offset data, and provides the decoded outputs in pairs to the OR gate 10-3. The output 10-4 is used as a memory cell selection signal.

As a result, two selection signals are turned on depending on the value of int y. Two internal buses 10-5 are provided for each column of memory cells, and since the memory cells are connected alternately, any four bits can be accessed simultaneously. Moreover, when m=24, the amount of bird air is required according to the ratio. However, m
It has only ×2 bit memory cells, and one of the converted images can be stored at a time.
If only the columns are obtained, the amount of hardware can be reduced.

12 is an offset data table, which stores the offset data from 1 lattice point pixel of the converted image of 4 lattice point pixels of the original image for each similarity conversion rate as its integer part data int
It stores int V and decimal part data i and j. An example of offset data is shown in Table 2. This table is m
The data is shown when n=24 (original image) and n=16 (converted image).

The second table 14 is a counter (corresponding to the table reading means in FIG. 1 together with the register 16 described later), and is used to supply the coordinate values a and b of the converted image to the offset data table 12 and access it. It will be done.

A register 16 is used to set integer part data intX, 1nty and decimal part data i, j read from the offset data table 12.

18 is a multiplexer (corresponding to the pixel data output means in FIG. 1), which rearranges the four grid point pixel data read out from the memory device 10 according to the values of int Grid point pixel data p,
It is output as q, r, and s.

20 is an arithmetic unit (corresponding to the arithmetic means in Fig. 1), and register 1
6 i, j and 4 grid point pixel data p, q.

In response to r and s, (p-q-r+s)Xi×j.

Output (q-p)xi, (r-p)xj and p.

22 is a comparator (corresponding to the judgment means in FIG. 1);
It is determined whether the calculated value is larger or smaller than the dark value from the dark value register 24, for example 0.5.

26 is a converted image storage means (frame memory) not shown.
This is an address generation circuit that generates addresses for.

Next, the operation of the apparatus of the present invention having the above configuration will be explained.

Image data is stored in the memory device 10 as follows. The image data sent via the data bus 10-1 is written into the memory cell to which the output signal of the OR gate 10-3 which gates the decoded output signal of the decoder 10-2 is supplied. is stored.

Note that the decoder l0-2 sequentially generates counter 1
4 is read from the offset data table 12 and set in the register 16, the int_y is decoded and the above-mentioned decode signal is generated at its output.

When the apparatus of the present invention starts image conversion processing after the original image data as described above is stored in the memory device, the coordinates of the converted image are sequentially generated in the counter 14, and each time the coordinates are generated, the coordinates as described below are generated. 1 converted pixel data is generated from the comparator 22, and the converted pixel data is generated by the address generation circuit 2.
The address from 6 is stored in the storage area of the frame memory specified. That address is the origin of frame memory
It is generated by adding dyd and the converted pixel coordinates a and b.

The generation of the I-converted pixel data is as follows.

The offset data table 12 is accessed by the transformed pixel coordinates a, b generated in the counter 14 and from there the registers 16 are filled with int x, int y and i
, j are set.

Then, int y of the register 16 is set to the decoder 10-2.
According to the output signal, pixel data of arbitrary four grid points are simultaneously read out and supplied to the multiplexer 18. At this time, int x and int y are supplied to the multiplexer 18 from the register 16,
The above-mentioned readout four-lattice point pixel data is rearranged by both of these, and the four-lattice point pixel data is outputted from the multiplexer 18 as four-lattice point pixel data p, q, r, s in a predetermined arrangement. An example of this is shown in FIG.

In the arithmetic unit 20 which receives the rearranged four-lattice point pixel data p, q, r, s in a predetermined arrangement as well as the fractional part data i, j of the offset data, (p-q-r+s
)Xt×j, (q-p)xr, (r-p)×j, and p are generated from the corresponding calculation units 20A, 20B, 20c, and 20D. These partial calculation values are added in the addition section 20B, and the calculation value of the arithmetic unit 20 is generated from the addition section 20E.

The output value of this calculator 20 is “1” or “0” depending on whether it is larger or smaller than the dark value from the dark value register 24.
The pixel data of the converted image is output from the comparator 22.

Writing of this pixel data into the frame memory is performed as described above.

In the above embodiments, conversion processing for a specific size has been described, but the present invention is not limited by such size and can be applied to any size.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to perform phase-to-digital conversion of an original image at high speed while also enjoying a simplified hardware configuration.

[Brief explanation of drawings]

Figure 1 is a block diagram of the principle of the present invention, Figure 2 is a diagram showing an embodiment of the present invention, Figure 3 is a diagram showing an example of array conversion in the embodiment of Figure 2, and Figure 4 is a diagram of the original image. FIG. 5 is a detailed explanatory diagram of the conventional similarity transformation. In FIG. 1, 1 is a storage means, 2 is an offset data table, 3 is a table reading means, 4 is a pixel data output means, 5 is a calculation means, and 6 is a judgment means. In FIG. 2, 10 is a memory device, 12 is an offset data table, 14 is a counter, 16 is a register, 18 is a multiplexer, 20 is an arithmetic unit, 22 is a comparator, and 24 is a dark value register. Honsagi Kizuki's principle block diagram Figure 1 ○ 1234567 Figure 3 Changed image

Claims (2)

[Claims] (1) An apparatus for converting a binary image having image data at lattice points at a desired similarity conversion rate, comprising: a storage means (1) capable of storing the binary image and simultaneously reading out pixel data of any four lattice points; , an offset data table (2
), table reading means (3) for reading integer part data and decimal part data corresponding to the similarity conversion rate from the offset data table (2), and table reading means (3) for reading integer part data and decimal part data corresponding to the similarity conversion rate from the offset data table (2); 4 read from storage means (1)
The grid point image data is divided into four grid point pixel data p in a predetermined array,
Pixel data output means (4
), and (p-q-r+
s)×i×j, (q-p)×i, (r-p)×j and p
A binary image similarity conversion pixel characterized by comprising: an arithmetic means (5) for outputting the sum of , and a judgment means (6) for setting the output sum to "1" or "0". Data generator. (2) The storage means (1) is accessed using a part of the integer part data read from the offset data table (2).
Binary image similarity conversion pixel data generation device as described in 2.