JPS62172779A - Light output stabilizer - Google Patents

Abstract

PURPOSE:To accurately control the light output of a semiconductor laser against a temperature variation and to obtain a stable light output by controlling a bias current IB and a pulse width IP on the basis of an error signal of an output of a monitoring photodetector and an input pulse through a low pass filter. CONSTITUTION:A pulse current amplitude control regulator 11 controls the amplitude of an input pulse signal IP to generate a driving pulse. A variable bias current source 12 controls a bias current IB. An LD 13 receives the current IB and the driving pulse IP and outputs a light, which is received by a monitor PD 14. After the output signal of the PD 14 is amplified by an amplifier 15, it is applied to one input of a subtractor 16. An input pulse signal IP is amplified, limited in its band by a low pass filter 18, further delayed by a circuit 19, matched in phase with the output signal of the amplifier 15, and applied to the other input of the subtractor 16. Since the current IB and the pulse width IP are controlled by the error signal of the subtractor 15, and the integrated value of the product signal of a weight function of the presence or absence of the pulse, sufficiently accurate control can be performed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an optical output stabilizing device for stabilizing the optical output of a semiconductor laser.

[Technical background of the invention and its problems] The oscillation threshold and differential mother-child efficiency of a semiconductor laser vary greatly depending on temperature. Therefore, in order to obtain a constant optical output pulse from the semiconductor laser, it is necessary to optimally control the bias current 1a and the amplitude 1p of the drive pulse depending on the temperature of the semiconductor laser.

In order to cope with this, the optical output from the semiconductor laser (LD) is received by a monitoring photodiode (PD), and the bias current 1a of the LD or the amplitude ip of the driving pulse is controlled according to the amount of received light. Various optical output stabilizing devices have been developed.

As an optical output stabilizing device that does not require a high-speed monitoring PD, one is known that controls the bias current IB based on the average value of optical pulses received by the PD, for example. As shown in the eighth factor, this device controls the bias current to I BtaV13 at temperature T1, and controls the bias current to I azaVe at temperature T2, for example. It is something.

However, since this device does not control the amplitude ip of the driving pulse according to the temperature, if the pulse amplitude m I p is selected to be optimal at a concentration of 2 (Fig. 8), the amplitude of the driving pulse at a temperature T1 is “The LIT level falls significantly below the oscillation threshold 1thi, and the light emission delay becomes large as shown in Figure 8 (■).As a result, the optical pulse becomes thinner and the reliability of pulse transmission decreases. Since the amount of light emission delay is determined by the relationship between the "L" level pulse current value and the threshold value, the above problem becomes more pronounced as the pulse transmission speed becomes faster, and becomes a major problem in high-speed pulse transmission.

Conversely, if the pulse amplitude value is determined at temperature T1 (Fig. 8 ■), at temperature T2, as shown in Fig. 8 ■, the optical output does not become zero even if the driving pulse is at the L11 level, and the extinction ratio There is a problem in that deterioration occurs, leading to deterioration of reception S/N.

Therefore, a device has been proposed that controls the amplitude 1p of the drive pulse as well as the bias current IB.

The system shown in FIG. 9 is a system in which the peak value of the optical output is divided into a bias current 1a and a pulse amplitude 1p at a constant ratio. In other words, the optical output from the LD81 is monitored by the PD82.
, the preamplifier 83 amplifies the light, and the clamp circuit 84
After clamping the peak value, the peak value is sent to the peak detection circuit 85.
Detect with.

The distribution circuit 86 then multiplies the peak value by a predetermined coefficient to obtain the bias current Is and pulse amplitude Ip, and distributes 1B to the variable bias current source 87 and Ip to the pulse current amplitude adjuster 88, respectively. It is.

This device can optimally control the pulse amplitude 1p and bias current Is as long as there is no deterioration in the characteristics of the semiconductor laser.
If the ratio of ip and Is changes due to element deterioration or the like, there is a drawback that control becomes impossible.

Moreover, the one shown in FIG. 10 includes an upper peak detector 91 that detects the peak value when the optical output is at the 41 HII level.
and a lower peak detector 92 that detects the peak value when the optical output is at the "L" level.The respective peak values are compared by comparators 93 and 94, and the pulse amplitude 1p is determined by the upper peak value. The bias current IB is controlled based on the lower peak value.

However, with this device, it is difficult to detect errors when the optical output is L'', and the extinction ratio cannot be increased.

In addition, in the field of optical communications, transmission rates are becoming extremely high, reaching hundreds of MH2 or more, and in order to make the above two devices compatible with this, it is necessary to: ■ The monitor PD must be capable of high-speed operation ■ Peak value Two points are required: the ability to detect at high speed.

In order to operate a monitoring PD at high speed, it is necessary to reduce the light-receiving diameter of the PD and reduce the capacitance. However, if the PD is made small, the optical output from the LD cannot be detected sufficiently, which not only causes a decrease in the received light level, but also causes distortion of the pulse waveform when only a portion of the light emitted from the LD is received. also occurs. For this reason, PD
There was a limit to how fast the speed could be increased.

Furthermore, since the technology for detecting a specific peak point at high speed and with high accuracy is sophisticated, there are currently problems in terms of circuit scale and cost. Roughly speaking, the modulation speed is several M.
At higher speeds than pits, the sample and hold operation becomes incomplete, making it impossible to accurately and stably control the optical output.

As described above, the conventional optical output stabilizing device has a problem in that it is extremely difficult to stabilize the optical output during high-speed transmission.

[Purpose of the invention]

The present invention has been made in consideration of the above circumstances, and its purpose is to control the optical output of a semiconductor laser with high precision in response to temperature fluctuations without requiring a high-speed photodiode or peak hold technology. The object of the present invention is to provide a light output stabilizing device that can achieve extremely stable light output.

[Summary of the invention]

The present invention uses the output of a monitoring photodetector that receives optical output from a semiconductor laser, and a signal obtained by band-limiting the input pulse with a low-pass filter having approximately the same transfer characteristic as that of the monitoring photodetector. The amplitude of the driving pulse is controlled by the integral value of the product of this error signal and the weight where the input pulse is present, and the amplitude of the drive pulse is controlled by the integral value of the product of the error signal and the weight where the input pulse is not present. The present invention is characterized in that the bias current of the semiconductor laser is set to υ1 ml based on the integral value.

In addition, the present invention converts a part of the optical output of the semiconductor laser into an electrical signal and monitors it with a monitoring photodetector, branches this monitor signal into two, and also converts a part of the optical output of the semiconductor laser into an electrical signal, and divides the optical output pulse into a reference value of the ゛°H'' level. and the difference with the L''' level reference value, respectively, and the °H''H'' level W of the detected difference signal.
JWJL IT level period signals are detected by two level detection circuits, the average value is detected, and the amplitude of the semiconductor laser drive pulse is controlled by negative feedback using the average value of the "°H" level period, and 11 L 11 level is detected. It is characterized in that the bias current of the semiconductor laser is controlled by negative feedback using the average value of the period.

〔Effect of the invention〕

According to the present invention, an error signal is generated by taking the difference between the output of a monitoring photodetector and an input pulse passed through a low-pass filter having approximately the same transfer characteristic as that of the monitoring photodetector. Since the bias current [a and pulse amplitude 11A Ip are controlled based on this error signal, even if the band of the monitoring photodetector is somewhat narrow, the effect of the band limit will not appear on the error signal. do not have. That is, error signal and pulse presence,
Bias N by the integral value of the product signal of the non-existent weight function
Since the flow I and pulse amplitude 1p are controlled, even if the monitoring PD band is somewhat narrow, la and Ip with sufficiently high degrees of N can be obtained.
control becomes possible. Moreover, each of the first and second integrators performs one day separately.

Since IP is detected, highly accurate optical output control is possible. Further, since there is no need to sample a specific point as in the conventional method, the complexity of the circuit can be avoided.

Further, according to the present invention, the L II level Fl difference signal component and the P H' level error signal component of the optical output pulse are separated and detected by sampling, and the driving bias current In of the semiconductor laser and the driving pulse Since it is configured to perform negative feedback control independently of the current Ip, it is possible to control the "L level" and "H" level of the optical output pulse of the semiconductor laser to a specified value in response to changes in environmental temperature, etc. Therefore, it is possible to keep the extinction ratio of the optical output pulse constant. In addition, since the average value of the sampled signal is negatively fed back, there is no need for high-speed charging and holding operations, which are the main factors that reduce optical output control accuracy, and stability increases as the modulation speed increases. The decline can be significantly improved.

[Embodiments of the invention]

Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.

FIG. 1 is a circuit configuration diagram showing a schematic configuration of an optical output stabilizing device according to a first embodiment of the present invention.

The pulse current amplitude control regulator 11 receives the input pulse signal IP
The drive pulse is generated by controlling the amplitude Ip of the drive pulse. Further, the variable bias current source 12 controls the bias current 1e. The LD13 receives these bias current Ie and drive pulse I.
It outputs light given p. Optical output is P for monitor.
The light is received at D14. The output signal of the monitor PD14 is
After being amplified to a predetermined level by the preamplifier 15, it is applied to one input of the first subtracter 16.

On the other hand, the input pulse signal IP is amplified to a predetermined level by an amplifier 17, band-limited by a low-pass filter (LPF) 18, and further delayed by a first delay circuit 19 so that the phase thereof is different from that of the output signal of the amplifier 15. Can be matched. The output signal of the delay circuit 19 is then applied to the other input of the subtracter 16 as a comparison signal. The LPF 18 is set to be approximately equivalent to the transfer characteristics of the monitoring PD 14 and the preamplifier 15, and is intended to eliminate the influence of errors caused by differences in the two signal waveforms to be compared. In addition, a delay circuit, a circuit 19
The delay time has been adjusted.

The error signal from the subtracter 16 is given to one input of the first multiplier/descendator 22 via the second subtracter 21, and
It is applied to one input of a second multiplier 24 via a third subtracter 23. Here, the subtracters 21 and 23 set a predetermined reference level Ref1 from the error signal from the subtracter 16.
, Ref2 is subtracted. first multiplier 2
The other input of the second multiplier 24 is supplied with a signal Q obtained by delaying the input pulse signal IP by a second delay circuit 25, and the other input of the second multiplier 24 is supplied with an inverted signal of the delayed signal Q. Given. The delay circuit 25 takes into account that the error signal from the subtracter 16 is slightly delayed from the input pulse signal IP, and delays the phase of the input pulse signal IP by that amount.

The output signal of the first multiplier 22 is equivalent to 1i) calculated by a function that weights only the portion of the error signal where pulses exist, and is equal to H' of the input pulse.

It is possible to obtain a signal in which the error signal at the level is emphasized. The output signal of this multiplier 22 is transmitted to the first integrator 26
It is integrated by And is this integral value the pulse current amplitude scale? It is fed back as a control input to the J unit 11. Furthermore, the output signal of the second multiplier 24 is equivalent to multiplying only the portion of the error signal where no pulse exists by a weighted function, and the error signal at the "LTT level" of the input pulse is An enhanced signal can be obtained.The output signal of this multiplier 24 is integrated by a second integrator 27.The integrated value is then fed back as a control input of the variable bias current source 12.

Note that in this example, the time constant of the first integrator 26 is set smaller than the time constant of the second integrator 27, but there is no particular problem even if they are the same.

In the optical output stabilizing device configured in this way, as shown in FIG. 2, when the temperature is T1, the bias current is stable at Itt+1 and the pulse amplitude is Ip+, and when the temperature is T2, the bias current is stabilized at Itt+1 and the pulse amplitude is Ip+. The current is stabilized at l th2 and the pulse amplitude is I P2, and as a result, the optical output can be stabilized so that both the pulse width and the pulse amplitude are constant as shown in the figure.

FIG. 3 shows the temperature r! of the IL characteristic shown in FIG. ! Immediately after the state changes from Tl to T2, it shows the process toward stabilization. Moreover, FIG. 4 shows the process toward stabilization immediately after the state of the same temperature T2 changes to T1.

In the case of Fig. 3, initially the bias current IB also has a pulse amplitude of 1
p is also low, and the optical output of the LD 13 is small. As the optical output decreases, the amount of light received by the monitoring PD 14 also decreases, so the output signal of the preamplifier 15 also decreases as shown. Note that since the monitor PD 14 operates at a low speed, the output signal of the preamplifier 15 is also slow. Also, L
The output signal of the delay circuit 19 via the PF 18 is also band-limited and becomes dull. Initially, the difference between these two signals, ie the output signal of the subtracter 16, is large.

On the other hand, since the output signal Q of the delay circuit 25 is in phase with the output signal of the subtracter 16, the output signal of the first multiplier 22 corresponds to the portion of the output signal of the subtracter 16 where the pulse is present. The waveform emphasizes This waveform is initially a pulse waveform with a large pulse amplitude, and the output signal of the first integrator 26 also increases relatively rapidly at first, and the degree of increase gradually decreases. The pulse current amplitude control regulator 11 receives this integral value and gradually increases the pulse amplitude 1p.

Furthermore, since the inverted output signal of the delay circuit 25 is in phase with the output signal of the subtracter 16, the second multiplier 24
The output signal has a waveform that emphasizes the portion of the output signal of the subtracter 16 where no pulses are present. This waveform is initially a pulse waveform with a large pulse amplitude, and the output signal of the second integrator 27 also increases relatively rapidly at first, and the degree of increase gradually decreases. The variable bias current source 12 receives this integrated value and gradually increases the bias current IB as shown by the dotted line in the figure. This increase in bias current Is continues until it reaches the oscillation threshold I th2 at temperature T2.

In this embodiment, the time constant of the first integrator 26 is set to the second integrator 26.
Since the time constant of the integrator 2.7 is set smaller than the time constant of the integrator 2.7, the pulse amplitude Tp reaches a stable point first, and the shortfall is compensated for by the bias current 1a.

In this way the light output is stabilized.

In the case of FIG. 4, as the temperature decreases, the light emission level increases and the pulse amplitude also increases, so the optical output is initially large both in amplitude value and zero level. Therefore, in this case, since the output signal of the subtracter 16 becomes negative, the output signal of the first integrator 26 gradually decreases, reducing the pulse amplitude Ip. Furthermore, since the output signal of the second integrator 27 also gradually decreases, the bias current Is also decreases. In this way the light output is stabilized.

In this way, according to this embodiment, both the pulse amplitude 1p and the bias current 1e are controlled so that the optical output pulse is constant. Therefore, optical output can be effectively stabilized without using a high-speed monitoring PD, a peak hold circuit, or the like. Note that in this embodiment, the time constant of the first integrator 26 is changed to the time constant of the second integrator 26.
7, but if these are different, the loop with the smaller time constant will converge first, and both will always reach a stable point.

Further, in the above embodiment, the reference level Re of the subtracter 21
If ri is set to correspond to the bias level of the optical output of the semiconductor laser 13, only the drive pulse can be independently controlled by the output of the integrator 26, regardless of the bias level.

FIG. 5 is a circuit configuration diagram showing a schematic configuration of a second embodiment of the present invention.

In the figure, 51 is an input terminal for a modulation signal, 52 is a modulation circuit, and 53 is a laser diode (LD). Modulation circuit 5
2 converts the pulse signal inputted from the input terminal 51 into a current, and drives the LD 53 by superimposing the converted pulse current (pulse amplitude) Ip and bias current In. Note that the current values of the drive currents 1p and 1B of the LD53 are determined by the control terminal S.
l.

It can be controlled by the voltage applied to S2.

The output light of the LD 53 is taken out to the outside through an optical fiber etc. 9, and a part of it is sent to a photodiode (PD) 5.
4, it is converted into an electrical signal and monitored. The monitor signal obtained by the PD 54 is amplified as necessary (the amplifier is not shown) and then branched into two branches, one of which is input to the input terminal of the first difference signal detection circuit 55, and the other is input to the input terminal of the second difference signal detection circuit 55. It is input to the input terminal of the signal detection circuit 56. The first reference signal 61 corresponding to the "H" level reference value of the optical output pulse is input to the other input terminal of the first difference signal detection circuit 55, and the other input terminal of the second difference signal detection circuit 56 A second reference signal 62 corresponding to the "L" level reference value of the optical output pulse is input to the input terminal. The output of the first difference signal detection circuit 55 is input to the input terminal of the first level detection circuit 57, and the output of the second difference signal detection circuit 56 is input to the input terminal of the second level detection circuit 58. Ru.

The first level detection circuit 57 delays the pulse signal input to the input terminal 51 by an appropriate amount using a delay line DLr to create a sampling pulse, and the output signal of the output signal of the first difference signal detection circuit 55 is A signal portion corresponding to the "H°" level period of the output pulse is sampled, and the sampled output is input to the first average value detection circuit 59. Similarly, the second level detection circuit 58 delays the pulse signal input to the input terminal 51 by an appropriate amount using the delay line DL2 to create a sampling pulse, and outputs the output signal of the second difference signal detection circuit 56. A signal portion corresponding to the "L" period of the optical output pulse is sampled, and the sampled output is input to the second average value detection circuit 60. The average value detection circuits 59 and 60 detect the respective average values of the sampled output signals, input the outputs to the terminals Sr and S2 of the modulation circuit 52, and determine the drive pulse amplitude 1p and drive bias current In of the LD 53. Control.

FIG. 6 shows operating waveforms of the circuit in FIG. 5, where a is the pulse fl input to the input terminal 51, b is the monitor signal output from the PD 54, and C is the first level detection circuit 57.
d is the sampling pulse of the second level detection circuit 58, e is the output waveform of the first level detection circuit 57,
f indicates the output waveform of the second level detection circuit 58.

According to the configuration shown in FIG. 5, the optical output of the LD 53 is controlled as follows. For convenience of explanation, “L” of the optical output pulse
It is assumed that the "L" level value is lower than the "H" level value and the "H" level value is higher than the specified value.

The difference between the monitor signal of the PD 54 and the reference signal 61 (voltage value monitor signal and reference signal) is detected by the difference signal detection circuit 55.56, and then sampled by the level detection circuit 57.58, and is shown in FIG. The waveform is shown in f.Here, the waveforms e to f are the capacitor CI for average value detection,
This shows the case where C2 is excluded, but in reality Cr, C
2 is connected, the signal does not have a rectangular shape, but instead becomes a direct current signal. The average value detection circuits 59 and 60 detect the average 1-direction of the sampled output, and the level detection detection circuit 57 detects the input bias voltages E3 and E4 of the average 1-direction detection circuit when the monitor signal and the reference signal match. When set equal to the output potential of .58, the average value of the shaded portion e-f in FIG. 6 becomes the detection signal. In the average value detection circuits 59 and 60, this detection signal is sent to the amplifier At.

The signal is inverted and amplified by A2, matched to a voltage level suitable for terminals Sr and 82 of the modulation circuit 52 by level shifters LSl and LS2, and fed back. Therefore, the voltage fed back to the terminal S2 is higher than the matching potential of the monitor signal and the reference signal, and as a result, the drive bias current Is of the LD53
increases to increase the "L" level of the optical output pulse.

On the other hand, the voltage fed back to the terminal S1 is lower than the matching potential of the monitor signal and the reference signal, and as a result, LD5
3, the driving pulse amplitude 1p decreases, and the optical output pulse “°
The H'° level will decrease.

The output level of the optical output pulse is lower than the specified value, and 1
1 I explained the case where the HI+ level is higher than the specified value, but
It is clear that in this reverse situation, the ``L'' level of the optical output pulse decreases and the uHII level is controlled to increase.

As described above, according to this embodiment, the L'', BELL, and HII levels of the optical output pulse of the LD 53 can be controlled by negative feedback to their respective specified values, and the optical output pulse can be controlled in response to disturbances such as temperature. The extinction ratio of can be kept constant. In this case, there is no need for a sample hold that reduces the control ti+accuracy. In the configuration of FIG. 5, a sampling operation and a charging operation for the average value detection capacitors C1 and C2 are required, but there is no need to complete charging within the water recirculation period, and the difference signal detection circuit 55. There is no need to take measures to lower the output impedance of the circuit 56 or the impedance of the level detection circuits 57 and 58 when the gates are turned on, and the circuit can be simplified and power consumption can be reduced. Further, regarding vibrations in the charging waveform, the influence thereof can be removed by increasing the average value detection time constant and narrowing the control loop band.

FIG. 7 is a circuit configuration diagram showing the main part configuration of a third embodiment of the present invention. This embodiment is an example in which the error signal fed back in the second embodiment described above is detected differentially.

As is clear from FIG. 5, the drive bias current Is
Since the control loop for the drive pulse amplitude Ip and the control loop for the drive pulse amplitude Ip can be realized with substantially the same circuit format, only a part of the control loop for the drive pulse amplitude 1p is shown in this embodiment. In other words, the difference signal detection circuit 55. The level detection circuit 57 and the average value detection circuit 59 each have a differential configuration.

With such a configuration, not only the same effects as in the second embodiment described above but also the following effects can be obtained. That is, since the difference signal detection circuit, level detection circuit, average value detection circuit, etc. each have a differential configuration, it is possible to exclude drift components of the difference signal detection circuit and level detection circuit that are mixed in the process of detecting the feedback signal. This makes it possible to improve the detection accuracy of the feedback signal.

Note that the present invention is not limited to the embodiments described above. For example, in the first embodiment, the time constant of the first integrator is made larger than the time constant of the second integrator, and the bias current IB is controlled first, and then the pulse amplitude 1p is controlled. It's okay. By varying the constants in this way, it is possible to quickly converge to a stable point. Moreover, the same operation can be obtained by replacing the first and second integrators with low-pass filters whose cut-off frequency is lower than that of the input pulse. Even when the two integrators are replaced with low-pass filters, the above-mentioned effects can be obtained by making their cut-off frequencies different.

In addition, in the second and third embodiments, the sampling pulse is not only created based on the input pulse, but also modulation information such as a clock signal or a block synchronization signal may be used. In addition, various modifications can be made without departing from the gist of the present invention.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram showing a schematic configuration of an optical output stabilizing device according to a first embodiment of the present invention, and FIG. 2 is a schematic diagram showing the relationship between the drive pulse waveform, bias current, and optical output of the device. 3 and 4 are signal waveform diagrams for explaining the operation of the above device, FIG. 5 is a circuit configuration diagram showing a schematic configuration of the second embodiment of the present invention, and FIG. FIG. 7 is a signal waveform diagram for explaining the operation of the second embodiment, FIG. 7 is a circuit configuration diagram showing the main part configuration of the third embodiment of the present invention, and FIG. 8 is a diagram for explaining the drawbacks of the conventional device. Schematic diagram, Figures 9 and 10
The figure is a circuit configuration diagram showing a schematic configuration of a conventional optical output stabilizing device. 11... Pulse current amplitude control regulator, 12... Variable bias current source, 13.53... Laser diode (
LD), 14.54... Photodiode (PD),
16...Subtractor, 18...Low pass filter (LP
F), 19.25... Delay circuit, 22°24... Multiplier, 26.27... Integrator, 52... Modulation circuit,
55.56...Difference signal detection circuit, 57.58...Level detection circuit, 59.60...Average value detection circuit. Applicant's representative Patent attorney Takehiko Suzue1) D O0Φ. C! I''? Bow Zaa-Fig. 8 Fig. 10

Claims (4)

[Claims] (1) A monitoring photodetector that receives the optical output from the semiconductor laser, and a low frequency band that limits the band of the input pulse signal and has approximately the same transfer characteristics as the circuit that obtains the monitor signal using this photodetector. a pass filter; a subtracter for subtracting the output signal of the low-pass filter and the output signal of the photodetector so that they are substantially in phase; and the input pulse signal and the output signal of the subtracter being substantially in phase with each other; a first multiplier that multiplies the output signal of the first multiplier, a first integrator that integrates the output signal of the first multiplier, and an inverted signal of the input pulse signal and the output signal of the subtracter that are substantially in phase. a second multiplier that multiplies;
a second integrator for integrating the output signal of the second multiplier; a means for controlling the amplitude of the driving pulse of the semiconductor laser based on the output signal of the first integrator; 1. An optical output stabilizing device, comprising means for controlling a bias current of the semiconductor laser based on an output signal of the device. (2) a monitoring photodetector that receives the optical output from the semiconductor laser; a first difference signal detection circuit that detects the difference between the output signal of the photodetector and a first reference signal; a second difference signal detection circuit that detects the difference between the output signal of the photodetector and the second reference signal; and a second difference signal detection circuit that detects the difference between the output signal of the photodetector and the second reference signal; Of the output signals of the first level detection circuit that detects the corresponding signal and the second difference signal detection circuit, the "
a second level detection circuit that detects a signal corresponding to the L'' level period; a first average value detection circuit that detects an average value of the output signal of the first level detection circuit; and a second level detection circuit that detects the average value of the output signal of the first level detection circuit. a second average value detection circuit for detecting the average value of the output signal of the circuit; means for controlling the driving of the semiconductor laser and the amplitude of the pulse based on the output signal of the first average value detection circuit; 2. An optical output stabilizing device comprising: means for controlling a bias current of the semiconductor laser based on the output signal of the average value detection circuit of No. 2. (3) The first and second reference signals are signals that provide reference values of the light emission output for the "H" level and "L" level modulation signals, and are provided with a constant DC voltage or a constant DC current, respectively. The light output stabilizing device according to claim 2, characterized in that: (4) the difference signal detection circuit outputs a complementary difference signal;
The level detection circuit samples and outputs each of the complementary difference signals in the same period, and the average value detection circuit detects and outputs an average value between the complementary signals output from the level detection circuit. The light output stabilizing device according to claim 2, characterized in that: