JPS62144440A - Method for using signal in private branch data transmission - Google Patents

Abstract

PURPOSE:To simplify the peripheral circuit of a CPU and to send a data at high speed by providing a frame coupling circuit and a separation circuit for a data signal and using a data signal subjected to frame multiplexing without using the CPU. CONSTITUTION:In sending a data information signal D whose data bits are D1-D7 from a data terminal equipment 10, a frame coupling circuit 11 couples and ads a frame synchronizing signal S, a control information signal C and a control signal T and sends the result to the private branch of digital electronic exchange 8. A data terminal interface equipment 9' uses a frame separation circuit to separate the signals S, D, C and T and sends only the signal D to a data terminal equipment 10'. Then the signals C, T are inputted/outputted to/from the equipments 9, 9' and a CPU 12 in the exchange 8 and the exchange makes it possible to process the 8-bit of the signals T, D in one time slot. That is, since the exchange is controlled by the signal T only and the decoding/ recognition of the signal C by the CPU is not required, the peripheral circuit of the CPU is simplified and the high speed data transmission is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a signaling method for high-speed transmission of data information in a data transmission line using a private digital electronic exchange and a data terminal device.

(Prior Art) FIG. 2 is an explanatory diagram of a data transmission circuit using a conventional private digital electronic exchange and data terminal equipment.
) is a configuration diagram of a data transmission device, and FIG. 2(b) is a configuration diagram of a data signal used therein. In the figure (a), reference numeral 1 denotes a private digital electronic exchange, and this exchange performs data transmission between data terminal devices 2 and 2' via data terminal interface devices 3 and 3''. Data information 1 from 2 (see figure (b))
is transferred to the RAM via the receiving circuit section of the data transmitting/receiving interface circuit 4 included in the data terminal interface device 3.
, ROM or DAM (Direct Access
ss Memory) control circuit, etc.
The data is stored and stored mainly in the RAM in the peripheral circuit 6 of the U (central processing unit) 5. Here, the GPtJ5 creates a control information signal C (8 bits) between the data terminal interface device 3 and the local digital electronic exchange,
A dedicated transmitting/receiving circuit 7 transmits the data information I stored in the RAM together with the flag sequence input signal F, address signal A, and frame check sequence signal FCS (16 bits) as a data signal Da having an 11 frame structure.
The data is transmitted over the private digital electronic exchange. In this private digital electronic exchange 1, the sent data signal De is sent to the data terminal interface device 3' of the other party (receiving side), and here the control information signal C (8 bit), CPO5
'' (not shown) and sends it to the data terminal device 1' (not shown) on the receiving side, thereby performing data transmission.

(Problems to be Solved by the Invention) However, the data signal De with the above configuration
In this case, it is necessary for the CPU 5 (or 5', the same applies hereinafter) to analyze the signal, and in order to perform this processing, the peripheral circuit 6 of the CPU 5 becomes extremely complex, and since the processing by the CPU 5 takes time, high-speed data transmission is required. There was a problem in doing so.

The present invention aims to solve the above-mentioned problems.

(Means for Solving the Problems) In order to solve the above problems, the present invention provides a frame combination circuit for data signals and a separation circuit as well.
Frame multiplexed data 4 without using PU
No. 3 is used to perform data transmission.

(Function) With the above configuration, the present invention eliminates the need for the CPU to decode and recognize the control information signal C, thereby simplifying the peripheral circuitry of the CPU and allowing high-speed data transmission. I can do it.

(Example) The present invention will be explained below with reference to Examples.

FIG. 1 is a detailed explanatory diagram of the present invention, in which (a) shows the configuration of a data transmission circuit including a private digital electronic exchange to which the present invention is applied, and (b) shows the structure of a data transmission circuit that is used to implement the present invention. This figure shows the frame structure of the data signal.

First, in Figure (a), 8 is a private digital electronic exchange, 9 and 9' are data terminal interface devices having the same functions, and 10 and 10' are data terminal devices. When the data terminal device 10 transmits a data information signal consisting of data bits D1 to D7, a frame synchronization signal S, a premises digital electronic Control information signal C1 between exchange 8 and data terminal interface device v19 and control signal T between data terminal interface devices 9 and 9'
are combined and added as shown in FIG. 1(b), and serially sent from the transmitting circuit to the private digital multiplexer 8 as a multiplexed frame.

The data terminal interface device 9' on the receiving side uses a frame separation circuit 11' (not shown, but is shown in the data terminal interface device 9 with the same function instead) to transmit the frame synchronization signal S, control The information signal C1 and the control signal T are separated and only the data information signal is sent to the data terminal device 10'. At this time, the control information signal C
The control signal T is an 11-bit start-stop synchronization signal that is sent to each CPU 12 in the data terminal interface devices 9, 9' and the premises digital 'multiplex switch 8'.
Input/output via C. In the private digital electronic exchange 8, the control signal T and the data information signal 8-bit 1 can be processed in one time slot.

(Effects of the Invention) As explained above and easily understood, the present invention has the following features: (1) The frame combination and separation circuit enables control in communication between data terminal interface devices using only the control signal T in the frame. (2) Since the control signal T and the data information signal of the data terminal device together amount to 8 pins, 1 tie, 11 slots, 1
(3) This frame structure simplifies the peripheral circuitry of the CPU. (4) The burden on software involved in data processing can be reduced, making high-speed transmission and exchange possible.

Many effects can be achieved, such as:

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a data transmission line to which the present invention is applied (
a), and frame configuration diagram of data signal (b), second
The figures are a diagram (a) showing a conventional data transmission line and a diagram (b) showing the configuration of the data signal. 1.8 ... digital electronic exchange for premises, 2.2'
, 10.10'...Data terminal device, 3°3',
9.9'...Data terminal interface device, 4
...Data transmission/reception interface circuit, 5,1
2...CPU, 6...(CPU) peripheral circuit, 7...Transmission/reception circuit. Patent applicant: Matsushita Electric Industrial Co., Ltd., Agent: Kouji Hoshino, Fl-
T--1'Q''

Claims (1)

[Claims] A local data transmission device is provided with a frame combination circuit and a frame separation circuit, and the frame combination circuit converts the data information signal to be transmitted into a frame synchronization signal, a control information signal used for control between the data terminal interface device and the digital electronic exchange. , and a control signal used for control between the data terminal interface device and the frame to form a frame multiplexed signal and send it out.The receiving side uses the frame separation circuit to convert the data information signal into a frame multiplexed signal. A signaling method in local data transmission, characterized in that the signals are separated.