JPS62136857A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To realize a high integrity by a method wherein, after the 1st metal wiring is formed on a semiconductor substrate with the 1st insulating film between, the 2nd insulating film is formed over the whole surface and, after parts of the insulating film on the 1st metal wiring to form contact holes with diameters larger than the width of the wiring, the 2nd metal wiring is formed. CONSTITUTION:A heat oxide film 22 is formed on a silicon substrate 21 as a field insulating film to form an element region and an element isolation region. Then, after a semiconductor element is formed, a silicon oxide film 23 is formed on both of the regions and, after a W layer is formed, the W layer is etched with resist as a mask to form a metal wiring 24. Further, after a silicon nitride film 25 is formed over the whole surface, contact holes 26, which have diameters larger than the width of the metal wiring 24, are formed by etching. After that, an Al layer is deposited over the whole surface and etched to form a metal wiring 27 which are connected to the metal wiring 24 through the contact holes 26. With this constitution, restriction to the integrity around the contact holes can be avoided.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and particularly improves the connection between metal wirings in a multilayer structure.

[Technical transgression of invention]

As is well known, as the integration of semiconductor circuits progresses, patterns become finer, and metal wiring for connecting elements also has a multi@@ structure, and methods are used to interconnect these wires. Below, we will explain the conventional example using this method in the third section.
This will be explained with reference to FIG. Here, FIG. 4 is a sectional view taken along the line XX in FIG. 3.

First, a thermal oxide film 2 made of silicon oxide 11M or the like is formed on a semiconductor substrate 1 to a thickness of, for example, about 7,000 layers, an element isolation region and an element formation region are provided, and a predetermined semiconductor element is formed in the element formation region. Subsequently, the element formation region is covered with a first insulating film 3 made of a silicon oxide film with a thickness of about 5,000 layers, for example. Next, the first insulating film 3 corresponding to the connection portion between the semiconductor element and the first metal wiring described later is etched by reactive ion etching (RIE) using a resist formed into a predetermined shape by photolithography as a mask. do. Furthermore, for example, 1% of the total thickness of about 800 people
The bond having the A2 layer 81 formed thereon is etched by RIE or the like using a resist formed into a predetermined shape by photolithography as a mask to form the first metal wiring 4.

Next, after forming a second insulating film 5 made of silicon oxide or the like with a thickness of 10,000 on the entire surface, a second insulating film 5 is formed on the entire surface of the insulating film 5 corresponding to the connection portion between the first wiring 4 and the second wiring described below. Etch the area by RIE or the like using a predetermined resist,
A contact hole 6 having a diameter larger than the width of the first contact hole `fA4' is formed. Next, the thickness is 10,000 on the entire surface.
After forming an AMW containing, for example, 1% Si, this is etched by RIE using a prescribed resist as a mask to form a second metal wiring 7 connected to the first metal wiring 4. Obtain a semiconductor device.

(Problems with the background technology) However, according to the prior art, the contact hole 6
Since the diameter of the first metal wiring 4 is larger than the width of the first metal wiring 4, the insulating film 3 of 7J41 under the first metal wiring 4 is partially etched by the etching facing the contact hole opening, and the semiconductor device deteriorating the reliability of Therefore, in the vicinity of the contact hole 6, the width of the first metal wiring 4 needs to be wider than the diameter of the contact hole 6.

Therefore, the degree of integration of the first metal wiring around the contact 1-hole 6 is limited, which impedes miniaturization of the pattern of the semiconductor device.

[Purpose of the invention]

The present invention was developed in view of the above circumstances, and an object of the present invention is to provide a method for manufacturing a highly integrated semiconductor device that can avoid limiting the degree of integration of metal wiring around contact holes.

[Summary of the invention]

The present invention relates to a semiconductor (*a first insulating film on a substrate
forming a second insulating film on the entire surface, and selectively removing the second insulating film on the first metal wiring to form a diameter larger than the width of the metal wiring. and a step of forming a second metal wiring connected to the top and side surfaces of the first metal wiring. The degree of integration of is limited. C,
Takana (The main idea is to make it four-dimensional.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. Here, FIG. 2 is a sectional view taken along the Y-Y line in FIG. 1.

[1] First, on the silicon substrate 21, a normal ocos
A field insulating film having a thickness of, for example, about 7,000 yen was formed by thermal oxidation to form an element region and an element forming region. Next, a predetermined semiconductor element is
After forming the silicon oxide film 23 on both regions, a silicon oxide film 23 having a thickness of about 5,000 mm was formed as a first insulating film. Next, after forming a tungsten (~V) layer with a thickness of 8000 APj over the entire surface, the W layer was selectively etched by RIE or the like using a resist (not shown) as a mask to form the first metal wiring 24. . Furthermore, a second insulating film is formed on the entire surface with a thickness of about 10,000 0 silicon nitride III! After forming the first metal wiring 25, this is etched by RIE using a predetermined resist to form the first metal wiring 2.
A contact hole 26 having a diameter larger than the width of 4 was formed. At this time, RIE used CF4 type gas,
The silicon nitride film 25 is etched at a rate of 900,000 pm, while the silicon nitride film 25 is etched at a rate of 400,000 pm.
It is etched only at a speed of 7°. Further, the first metal wiring 24 is hardly etched. Therefore, the first metal wiring 24 and the silicon oxide film 23 thereunder are not immersed in the etching. Thereafter, after depositing an Aβ layer with a thickness of 10,000 on the entire surface, etching is performed by RIE or the like using a predetermined resist as a mask to form a second metal wiring that is connected to the first metal wiring 24 through the contact hole 26. 27 was formed to manufacture a semiconductor device. At this time, when the Ag layer is etched using a J-grade gas, the first metal wiring 24 is hardly immersed.

According to the present invention, the following effects are achieved.

■When etching the silicon nitride film 25 to form the contact hole 26, the size of the contact hole 26 is changed because the etching is performed with a material that is difficult to etch, that is, the silicon oxide film 23, provided under the first metal wiring 24. The width of the first metal wiring 24 can be determined without depending on the width of the first metal wiring 24. Therefore, the degree of integration of the first metal wiring 24 is not limited around the contact hole 26.

■Since the contact hole 26 is opened wider than the width of the first metal wiring 24, the second metal wiring 27 comes into contact with the first metal wiring 24 not only from the top surface but also from the side thereof, as shown in FIG. , the contact area is larger than before,
Contact resistance can be lowered.

■Since the etching speed of the second metal interconnect tlA27 is higher than the etching speed of the first metal interconnect 23, the width of the second metal interconnect 27 is also advantageous in terms of the spacing between the interconnects, regardless of the size of the contact hole 26. Become.

In the above embodiment, a silicon oxide film was used as the first insulating film, and a silicon nitride film was used as the second insulating film, but the present invention is not limited to this. For example, phosphorous glass or the like can be used as the first insulating film. At this time, it is desirable that the etching rate of the second insulating film is higher than the etching rate of the first insulating film, so that the first insulating film is not etched when forming the contact hole in the second insulating film. It is possible to suppress the

In the above embodiment, tungsten was used as the material of the first metal wiring, and aluminum was used as the material of the second metal wiring, but the material is not limited to this. For example, a high melting point metal such as molybdenum can be used as the material of the first metal wiring. At this time, it is desirable that the etching rate of the second metal wiring is higher than that of the first metal wiring, so that etching of the first metal wiring can be suppressed when forming the second metal wiring. Further, in the embodiment L, a case has been described in which the first metal wiring and the second metal wiring are made of different materials, but the present invention also applies to the same materials. At first glance,
In this case, the l1 bundle thickness of the first metal wiring material is formed to be large, and the III thickness of the second metal wiring material is formed to be thinner than this.

In the above embodiment, the first and second insulating films and the first and second metal wirings are used alone, but the invention is not limited thereto. for example,
These may be pasted onto other materials. Specifically, if it is the first insulating film under the first gold 5L wiring, a silicon nitride film with a thickness of approximately 4000 mm is formed. rear,
An example of this method is to form a silicon oxide film with a thickness of about 1,000 mm on top of the silicon oxide film. Further, in the case of the first metal wiring, a method of depositing an 0Aff layer with a thickness of about 8,000 layers and then attaching a tungsten layer thereon can be used.

In the above embodiment, the relationship between the etching speeds of the first and second insulating films and the etching speed of the first and second metal wirings is determined in the vicinity of the connection between the first and second metal wirings. It is only necessary that this holds true; this is not the case in other areas.

〔Effect of the invention〕

As described in detail above, according to the present invention, it is possible to provide a method for manufacturing a highly integrated semiconductor device that can avoid limiting the degree of integration of metal wiring around contact holes.

[Brief explanation of drawings]

FIG. 1 is a plan view of a semiconductor device according to an embodiment of the present invention;
Fig. 2 is a cross-sectional view taken along line Y-Y in Fig. 1, Fig. 3 is a plan view of a conventional semiconductor device, and Fig. 4 is a cross-sectional view taken along line X-X in Fig. 3. . 21... Silicon substrate, 22... Thermal oxide film, 23.
...Silicon oxide film, 24...First metal wiring, 25
... silicon nitride film, 26 ... contact hole,
27...Second metal wiring. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2

Claims (6)

[Claims] (1) A step of forming a first metal wiring on a semiconductor substrate via a first insulating film, a step of forming a second insulating film on the entire surface, and a step of forming a first metal wiring on the first metal wiring. a step of selectively removing an insulating film to form a contact hole having a diameter larger than the width of the metal wiring; and a step of forming a second metal wiring connected to the top and side surfaces of the first metal wiring. A method of manufacturing a semiconductor device, comprising: (2) The method of manufacturing a semiconductor device according to claim 1, wherein the etching rate of the second insulating film is higher than the etching rate of the first insulating film. (3) The method of manufacturing a semiconductor device according to claim 1, wherein the etching rate of the second metal wiring is higher than the etching rate of the first metal wiring. (4) The method of manufacturing a semiconductor device according to claim 1, wherein the etching rate of the second insulating film is higher than the etching rate of the first metal wiring. (5) The method for manufacturing a semiconductor device according to claim 1, wherein the first insulating film is a silicon oxide film and the second insulating film is a silicon nitride film. (6) The method of manufacturing a semiconductor device according to claim 1, wherein the first metal wiring is made of a high melting point metal and the second metal wiring is made of aluminum.