JPS62130016A - Pulse width modulation control circuit - Google Patents

Pulse width modulation control circuit

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Publication number
JPS62130016A
JPS62130016A JP60271103A JP27110385A JPS62130016A JP S62130016 A JPS62130016 A JP S62130016A JP 60271103 A JP60271103 A JP 60271103A JP 27110385 A JP27110385 A JP 27110385A JP S62130016 A JPS62130016 A JP S62130016A
Authority
JP
Japan
Prior art keywords
output
oscillator
signal
pulse width
error amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60271103A
Other languages
Japanese (ja)
Inventor
Takashi Yamashita
隆司 山下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP60271103A priority Critical patent/JPS62130016A/en
Publication of JPS62130016A publication Critical patent/JPS62130016A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To generate an accurate waveform by a simple circuit by applying synchronization to triangle wave generators so as to generate triangle waves or sawtooth waves respectively whose phase differs by 180 deg.. CONSTITUTION:The 3rd oscillator 11 generates waveforms (g), (h), that is, two rectangulat wave signals whose time ratio is 50% and whose phase differs by 180 deg., the rectangular wave signal (g) is fed to the 1st oscillator 5a and the signal (h) is fed to the 2nd oscillator 5b respectively. The 1st and 2nd oscillators 5a, 5b generate sawtooth waves (j), (k) synchronized with the rectangular wave signals (g), (h) and are inputted to a non-inverting input terminal (+) of the 1st and 2nd comparators 6, 7. On the other hand, an error amplifier 4 compares a detection signal with a reference signal, amplifies the difference and inputs the result to an inverting input terminal (-) of the 1st and 2nd comparators 6, 7. The comparators 6, 7 compare the sawtooth waves (j), (k) with an output (i) of the error amplifier 4 and a signal having a pulse width in response to the output level of the error amplifier 4 is outputted.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、パルス幅変調制御回路に関し、詳しくはプッ
シュプル形昇降圧コンバータのように、入出力変動に対
して位相が180度異4る2個のスイッチング素子のオ
ン時間の時間比率を0〜100%変化させることができ
るパルス幅変調(以下、PWM)制御回路に関するもの
である。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a pulse width modulation control circuit, and more specifically, a pulse width modulation control circuit, such as a push-pull buck-boost converter, whose phase differs by 180 degrees with respect to input/output fluctuations. The present invention relates to a pulse width modulation (hereinafter referred to as PWM) control circuit that can change the on-time ratio of two switching elements from 0 to 100%.

〔従来の技術〕[Conventional technology]

一般に、コンバータやスイッチングレギュレータ等のコ
ンl−ロール回路は、誤差増幅器、発振器。
Generally, control circuits such as converters and switching regulators include error amplifiers and oscillators.

変調部、論理ゲート回路、そしてスイッチングがプッシ
ュプル構成の場合には、2相分割回路から構成される。
It consists of a modulation section, a logic gate circuit, and, if the switching is a push-pull configuration, a two-phase split circuit.

第3図、第4図は、従来におけるプッシュプル形昇降圧
コンバータ等のPWM制御回路の構成図および動作波形
図である。第3図において、1は検出信号の入力端子、
2,3はパルス幅制御された信号の出力端子、4は検出
信号と基準!!電圧IOとを比較増幅する誤差増幅器、
5は三角波発生器、6.7は誤差信号と三角波店市波形
とを比較する比較器、8は反転増幅器、9はレベルシフ
1−回路である。また、第4図において、aは誤差増幅
器4の出力信号、bは三角波発生器5の出力信号、Cは
反転増幅器8の出力信)、dはレベルシフト回路9の出
力信号、eは出力端子2の波形、fは出力端子3の波形
である。
FIGS. 3 and 4 are a configuration diagram and an operating waveform diagram of a conventional PWM control circuit such as a push-pull buck-boost converter. In FIG. 3, 1 is an input terminal for the detection signal;
2 and 3 are output terminals for pulse width controlled signals, and 4 is the detection signal and reference! ! an error amplifier that compares and amplifies the voltage IO;
5 is a triangular wave generator, 6.7 is a comparator for comparing the error signal and the triangular waveform, 8 is an inverting amplifier, and 9 is a level shift circuit. In FIG. 4, a is the output signal of the error amplifier 4, b is the output signal of the triangular wave generator 5, C is the output signal of the inverting amplifier 8), d is the output signal of the level shift circuit 9, and e is the output terminal. 2, and f is the waveform of output terminal 3.

第3図においては、コンバータやスイッチングレギュレ
ータの出力回路より、検出出力を取り出して入力端子l
に入力し、誤差増幅器4において基゛準′屯圧10と比
較する。一方、発生器5において、基準の二角波を発生
し、その出力をそのまま比較tG 6の一方の入力端子
に入力するとともに、他方の出力を反転増幅器8に入力
して反転出力を取り出し、さらにこの反転出力をレベル
シフト回路9に入力して、発生器5で発生した三角波と
位相が180度異4る三角波を作成し、比較器7の一方
の入力端子に入力する。また、誤差増幅器4の出力を両
比較器6,7の他方の入力端子に、それぞれ入力する。
In Figure 3, the detection output is taken out from the output circuit of the converter or switching regulator and the input terminal l
and is compared with a reference pressure 10 in an error amplifier 4. On the other hand, the generator 5 generates a reference square wave, inputs its output as it is to one input terminal of the comparison tG 6, inputs the other output to the inverting amplifier 8 to take out the inverted output, and further This inverted output is input to the level shift circuit 9 to create a triangular wave whose phase is 180 degrees different from the triangular wave generated by the generator 5, and input to one input terminal of the comparator 7. Further, the output of the error amplifier 4 is inputted to the other input terminals of both comparators 6 and 7, respectively.

第4図(イ)は比較器6の動作波形を示しており、比軸
器6は誤差信号ごと三角波すとを比較して、三角波すか
ら誤差信号aを差引き、正極性の部分のみ一定レベルで
出力すると、第4図(ニ)のPWM出力eを得る。また
、第4図(ロ)に示すように、反転増幅器8の出力信号
Cは負極性となるので、レベルシフト回路9によりこれ
を正極性dに変換し、比較器7に出力するど、第4図(
ハ)に示すような動作となる。第4図(ハ)において、
三角波dから誤差信号aを差引き、正極性の部分を同一
・レベルで出力するど、第4図(ホ)のP W M出力
fを得る。このPWM出力e、fにより、スイッチング
素子を制御するのである。
Figure 4 (A) shows the operating waveform of the comparator 6, and the ratio unit 6 compares the triangular wave with each error signal, subtracts the error signal a from the triangular wave, and only the positive polarity portion is constant. When the level is output, the PWM output e shown in FIG. 4(d) is obtained. Further, as shown in FIG. 4(b), since the output signal C of the inverting amplifier 8 has negative polarity, it is converted to positive polarity d by the level shift circuit 9 and output to the comparator 7. Figure 4 (
The operation is as shown in c). In Figure 4 (c),
By subtracting the error signal a from the triangular wave d and outputting the positive polarity portion at the same level, the PWM output f shown in FIG. 4(e) is obtained. The switching elements are controlled by the PWM outputs e and f.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このように、第3図に示す従来の回路では、発振器5で
三角波を発生し、反転増幅器8とレベルシフト回路9に
よりこの三角波と位相が180度異4るパルス幅側fi
′111コ号を発生している。しかし、このような構成
では、発振器5の三角波出力信号の立上りと立下りの傾
きが同一でない場合には、出力端2および3のパルス幅
制御信号の位相を正確に180度ずらすことができなく
なる。また、反転増幅器8やレベルシフト回路9が必要
であるため、回路構成が複雑となり、部品数が増加する
という問題がある。
In this way, in the conventional circuit shown in FIG. 3, the oscillator 5 generates a triangular wave, and the inverting amplifier 8 and level shift circuit 9 generate a pulse width side fi whose phase differs by 180 degrees from the triangular wave.
'111 is being generated. However, with such a configuration, if the rising and falling slopes of the triangular wave output signal of the oscillator 5 are not the same, it becomes impossible to accurately shift the phases of the pulse width control signals of the output terminals 2 and 3 by 180 degrees. . Further, since the inverting amplifier 8 and the level shift circuit 9 are required, there is a problem that the circuit configuration becomes complicated and the number of parts increases.

本発明の目的は、このような従来の問題を改苦し、位相
が180度異4る1時比率が0〜100%変化する2つ
の制御信号を、簡単な構成で得ることができ1回路の部
品数を削減することができるパルス幅変調制御回路を提
供することにある。
It is an object of the present invention to overcome these conventional problems, and to obtain two control signals whose phases are 180 degrees apart and whose hour ratio changes from 0 to 100% with a simple configuration, and which requires only one circuit. An object of the present invention is to provide a pulse width modulation control circuit that can reduce the number of parts.

c問題点を解決するための手段〕 上記目的を達成するため、本発明のパルス幅変調制御回
路は、検出電圧と基準電圧を比較増幅する誤差増幅器お
よび該誤差増幅器の出力と鋸歯状波または二角波を発生
する発振器の出力を比較して、上記検出電圧に応じたパ
ルス幅の信号を出力する2以上の比較器を備えたパルス
幅変調制御回路において、鋸歯状波または二角波を発生
する第1と第2の発振器、該第1と第2の発振器の出力
信号の位相を180度ずらせて同期をかけるための第3
の発振器を何し、一方の比較器で第1の発振器出力と誤
差信号を比較し、他方の比較器で第2の発振器出力と誤
差信号を比較することに特徴がある。
c. Means for Solving Problems] In order to achieve the above object, the pulse width modulation control circuit of the present invention includes an error amplifier that compares and amplifies a detection voltage and a reference voltage, and an output of the error amplifier and a sawtooth wave or a double wave. A sawtooth wave or a square wave is generated in a pulse width modulation control circuit equipped with two or more comparators that compare the outputs of oscillators that generate square waves and output signals with pulse widths according to the detected voltage. a third oscillator for synchronizing the output signals of the first and second oscillators by shifting their phases by 180 degrees;
The feature is that one comparator compares the first oscillator output and the error signal, and the other comparator compares the second oscillator output and the error signal.

〔作  用〕[For production]

第3図の回路では、1個の三角波発生回路の出力を反転
およびレベルシフトすることにより位相の異なる三角波
に変換していたので、立上りと立下りの傾きが異なるど
出力に誤差が生じることになる。そこで2本発明におい
ては、2個の三角波発生器に同期をかけることにより、
それぞれ位相が180度異4る三角波または鋸歯状波を
発生するようにして、正確な波形を発生させ、かつ部品
数の少ない、U潔な回路で実現できるようにしている。
In the circuit shown in Figure 3, the output of one triangular wave generation circuit is inverted and level shifted to convert it into a triangular wave with a different phase, so errors may occur in the output due to different slopes of rise and fall. Become. Therefore, in the present invention, by synchronizing the two triangular wave generators,
By generating triangular waves or sawtooth waves whose phases differ by 180 degrees, accurate waveforms can be generated and realized with a clean circuit with a small number of components.

[実施例] 以下、本発明の実施例を、図面により詳細に説明する。[Example] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

第1図は1本発明の一実施例を示すPWM制御回路の構
成図であり、第2図は第1図の各部における動作波形図
である。第1図において、■は検出信号の入力端子、2
,3はパルス幅制御された(3号の出力端子、4は検出
信号と基準電圧を比較増幅する誤差増幅器、5a、5b
は鋸歯状波または三角波を発生する第1および第2の発
振器、6,7は第1および茅2の比較器、10は基準電
圧、11は第1および第2の発振器に同期をかける第3
の発振器である。また、第2図において、g+hは位相
の180度異4る第3の発振器11の出力、iは誤差増
幅器4の出力、jは第1の発振器5aの出力、kは第2
の発振器5bの出力、Qは出力端子2の出力波形、mは
出力端子3の出力波形である。
FIG. 1 is a block diagram of a PWM control circuit showing an embodiment of the present invention, and FIG. 2 is an operation waveform diagram of each part of FIG. 1. In Fig. 1, ■ is the input terminal of the detection signal, 2
, 3 is the pulse width controlled (output terminal of No. 3, 4 is an error amplifier that compares and amplifies the detection signal and the reference voltage, 5a, 5b
are first and second oscillators that generate sawtooth waves or triangular waves, 6 and 7 are first and second comparators, 10 is a reference voltage, and 11 is a third oscillator that synchronizes the first and second oscillators.
It is an oscillator. In FIG. 2, g+h is the output of the third oscillator 11 with a 180 degree phase difference, i is the output of the error amplifier 4, j is the output of the first oscillator 5a, and k is the output of the second oscillator 5a.
Q is the output waveform of the output terminal 2, and m is the output waveform of the output terminal 3.

先ず、第3の発振器11により、第2図(イ)(ロ)に
示す波形g+ h、つまり時比率50%で互いに位相の
180度異4る2つの矩形波信号を発生する。これらの
矩形波信号gを第1の発振器5aに、またhを第2の発
振器5bに、それぞれ供給する。第1および第2の発振
器5a、5bは。
First, the third oscillator 11 generates waveforms g+h shown in FIGS. 2(a) and 2(b), that is, two rectangular wave signals with a duty ratio of 50% and a phase difference of 180 degrees from each other. These rectangular wave signals g are supplied to the first oscillator 5a, and h is supplied to the second oscillator 5b. The first and second oscillators 5a, 5b.

それぞれの矩形波信号g、hに同期した鋸歯状波または
三角波(第2図(ハ)(ニ)では、鋸歯状波を発生)し
、それぞれ第1および第2の比較器6゜7の非反転入力
端子(+)に入力する。
A sawtooth wave or a triangular wave (a sawtooth wave is generated in Fig. 2 (c) and (d)) synchronized with the respective rectangular wave signals g and h is generated, and the non-conductive signals of the first and second comparators 6 and 7 are generated. Input to the inverting input terminal (+).

一方、誤差増幅器4は、検出信号と基準信号を比較し、
それらの差を増幅して第1および第2の比較器6,7の
反転入力端一7−(−)に入力する。
On the other hand, the error amplifier 4 compares the detection signal and the reference signal,
The difference between them is amplified and input to the inverting input terminals 7-(-) of the first and second comparators 6 and 7.

各比較器6,7は、fJA歯状波J+にと誤差増幅器4
の出力iを比較し、誤差増幅器4の出力レベルに応じた
パルス幅の信号を出力する。すなわち、第1の比較器6
においては、第2図(ハ)に示すように、鋸歯状波jが
誤差信号iより大きいJtIJ間だけハイレベル、jが
iより小さい期間はローレベルの矩形波信号、つまりP
WM制御信号Q (第2図(ホ)参照)を出力する。ま
た、第2の比較器7においては、第2図(ニ)に示すよ
うに、鋸歯状波kが誤差信号iより大きい期間だけハイ
レベル、kがiより小さい期間はローレベルの矩形波4
8号、つまりPWM制919信号m(第2図(へン参照
)を出力する。本実施例においては、検出信号レベルが
増加するとパルス幅が減小し、検出(8号レベルに応じ
て出力端子2および3のパルス幅は位相が180度異4
るた状態で0〜180%変化する。
Each comparator 6, 7 connects the fJA toothed wave J+ to the error amplifier 4.
, and outputs a signal with a pulse width corresponding to the output level of the error amplifier 4. That is, the first comparator 6
As shown in FIG. 2(c), the sawtooth wave j is at a high level only during JtIJ, which is larger than the error signal i, and is at a low level during the period when j is smaller than i, that is, a rectangular wave signal P
A WM control signal Q (see FIG. 2 (E)) is output. In addition, in the second comparator 7, as shown in FIG. 2(d), the sawtooth wave k is at a high level only during the period when it is larger than the error signal i, and the rectangular wave 4 is at a low level during the period when k is smaller than i.
No. 8, that is, the PWM system 919 signal m (see Figure 2) is output. In this embodiment, as the detection signal level increases, the pulse width decreases, and the detection (output according to the No. 8 level) is performed. The pulse widths of terminals 2 and 3 have a phase difference of 180 degrees.
Changes from 0 to 180% in the idle state.

また、本実施例では、このような構成であるため、誤差
増幅器4と第1の発振器5aおよび第1の比較器6は、
1つのPWM制御回路用ICを用いることができ、第2
の発振器5bと第2の比較器7も1つのPWM制御用I
Cを用いることができる。また、第3の発振器11は、
本実施例のPWM制御回路を使用するコンバータが一般
的に持っている補助電源回路の発振器を流用することが
できる。すなわち、本実施例においては、位相が180
度異4る、時比率が0〜100%変化する2つの制御信
号を得るPWM制御回路の部品数を削減することができ
る。
Furthermore, in this embodiment, since the configuration is as described above, the error amplifier 4, the first oscillator 5a, and the first comparator 6 are
One PWM control circuit IC can be used, and the second
The oscillator 5b and the second comparator 7 also have one PWM control I
C can be used. Further, the third oscillator 11 is
The oscillator of the auxiliary power supply circuit that converters that use the PWM control circuit of this embodiment generally have can be used. That is, in this example, the phase is 180
It is possible to reduce the number of components of a PWM control circuit that obtains two control signals whose duty ratios vary from 0 to 100%.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、一般のPWM制
御用ICを適用し易い回路構成にしたので、180度位
相が異なり1時比率が0〜100%変化する2つの制御
信号を、簡単な構成、かつ少ない部品で出力することが
可能である。
As explained above, according to the present invention, the circuit configuration is such that a general PWM control IC can be easily applied, so that two control signals with a 180 degree phase difference and a 1 o'clock ratio changing from 0 to 100% can be easily controlled. It is possible to output with a simple configuration and a small number of parts.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すPWM制御回路の構成
図、第2図は第1図における各部の動作波形図、第3図
は従来のPWM制御回路の構成図。 第4図は第3図における各部の動作波形図である。 1:検出信号の入力端子、2,3:パルス幅制御信号出
力端子、4;誤差増幅器、5+ 5a、5b:鋸歯状波
または三角波発振器、6,7:比較器、8:反転増幅器
、9ニレベルシフ1〜回路、10:u(v4電圧、ll
:第3の発振器。 特許出願人日本電信電話株式会社 、−7 ■  1  図 牛 第   2   図 第   5   図 牛 第   4   図
FIG. 1 is a configuration diagram of a PWM control circuit showing an embodiment of the present invention, FIG. 2 is an operational waveform diagram of each part in FIG. 1, and FIG. 3 is a configuration diagram of a conventional PWM control circuit. FIG. 4 is an operational waveform diagram of each part in FIG. 3. 1: Detection signal input terminal, 2, 3: Pulse width control signal output terminal, 4: Error amplifier, 5+ 5a, 5b: Sawtooth wave or triangular wave oscillator, 6, 7: Comparator, 8: Inverting amplifier, 9 two-level shift 1 ~ circuit, 10: u (v4 voltage, ll
:Third oscillator. Patent applicant Nippon Telegraph and Telephone Corporation, -7 ■ 1 Figure Cow Figure 2 Figure 5 Cow Figure 4

Claims (1)

【特許請求の範囲】[Claims] (1)検出電圧と基準電圧を比較増幅する誤差増幅器お
よび該誤差増幅器の出力と鋸歯状波または三角波を発生
する発振器の出力を比較して、上記検出電圧に応じたパ
ルス幅の信号を出力する2以上の比較器を備えたパルス
幅変調制御回路において、鋸歯状波または三角波を発生
する第1と第2の発振器、該第1と第2の発振器の出力
信号の位相を180度ずらせて同期をかけるための第3
の発振器を有し、一方の比較器で第1の発振器出力と誤
差信号を比較し、他方の比較器で第2の発振器出力と誤
差信号を比較することを特徴とするパルス幅変調回路。
(1) An error amplifier that compares and amplifies the detected voltage and a reference voltage, and compares the output of the error amplifier with the output of an oscillator that generates a sawtooth wave or triangular wave, and outputs a signal with a pulse width corresponding to the detected voltage. In a pulse width modulation control circuit equipped with two or more comparators, first and second oscillators that generate sawtooth waves or triangular waves are synchronized by shifting the phases of the output signals of the first and second oscillators by 180 degrees. 3rd to multiply
1. A pulse width modulation circuit comprising an oscillator, wherein one comparator compares a first oscillator output and an error signal, and the other comparator compares a second oscillator output and an error signal.
JP60271103A 1985-12-02 1985-12-02 Pulse width modulation control circuit Pending JPS62130016A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60271103A JPS62130016A (en) 1985-12-02 1985-12-02 Pulse width modulation control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60271103A JPS62130016A (en) 1985-12-02 1985-12-02 Pulse width modulation control circuit

Publications (1)

Publication Number Publication Date
JPS62130016A true JPS62130016A (en) 1987-06-12

Family

ID=17495386

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60271103A Pending JPS62130016A (en) 1985-12-02 1985-12-02 Pulse width modulation control circuit

Country Status (1)

Country Link
JP (1) JPS62130016A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006051854A1 (en) * 2004-11-12 2006-05-18 Rohm Co., Ltd. Controller ic, dc/ac converter, and parallel operation system of dc/ac converter
JP2008258819A (en) * 2007-04-03 2008-10-23 Freescale Semiconductor Inc Pulse width modulated wave output circuit
WO2015002125A1 (en) * 2013-07-02 2015-01-08 株式会社村田製作所 Pwm control circuit and switching power supply device

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JPS5245248A (en) * 1975-10-07 1977-04-09 Yaskawa Electric Mfg Co Ltd Pre-amplifier

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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006051854A1 (en) * 2004-11-12 2006-05-18 Rohm Co., Ltd. Controller ic, dc/ac converter, and parallel operation system of dc/ac converter
JP2006141160A (en) * 2004-11-12 2006-06-01 Rohm Co Ltd Direct-current-to-alternating current converter, controller ic therefor, and parallel operation system for direct-current-to-alternating current converter
US7394671B2 (en) 2004-11-12 2008-07-01 Rohm Co., Ltd. Controller IC, DC-AC conversion apparatus, and parallel running system of DC-AC conversion apparatuses
US7554823B2 (en) 2004-11-12 2009-06-30 Rohm Co., Ltd. Controller IC, DC-AC conversion apparatus, and parallel running system of DC-AC conversion apparatuses
US7859866B2 (en) 2004-11-12 2010-12-28 Rohm Co., Ltd Controller IC, DC-AC conversion apparatus, and parallel running system of DC-AC conversion apparatuses
JP2008258819A (en) * 2007-04-03 2008-10-23 Freescale Semiconductor Inc Pulse width modulated wave output circuit
WO2015002125A1 (en) * 2013-07-02 2015-01-08 株式会社村田製作所 Pwm control circuit and switching power supply device
CN105210285A (en) * 2013-07-02 2015-12-30 株式会社村田制作所 PWM control circuit and switching power supply device
JPWO2015002125A1 (en) * 2013-07-02 2017-02-23 株式会社村田製作所 PWM control circuit and switching power supply device
CN105210285B (en) * 2013-07-02 2018-06-12 株式会社村田制作所 Pwm control circuit and switching power unit

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