JPS62112760U - - Google Patents

Info

Publication number
JPS62112760U
JPS62112760U JP1386U JP1386U JPS62112760U JP S62112760 U JPS62112760 U JP S62112760U JP 1386 U JP1386 U JP 1386U JP 1386 U JP1386 U JP 1386U JP S62112760 U JPS62112760 U JP S62112760U
Authority
JP
Japan
Prior art keywords
circuit
input signal
memory circuits
rectangular
rectangular wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1386U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1386U priority Critical patent/JPS62112760U/ja
Publication of JPS62112760U publication Critical patent/JPS62112760U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案実施例の構成を示した図、第２
図は第１図における各部の波形図、第３図は本考
案の他の実施例の構成を示した図、第４図は第３
図の装置における各部の波形図である。なお図に
おいて１はバーコード、２は光学センサである。 Figure 1 is a diagram showing the configuration of an embodiment of the present invention, Figure 2 is a diagram showing the configuration of an embodiment of the present invention.
The figure is a waveform diagram of each part in FIG. 1, FIG. 3 is a diagram showing the configuration of another embodiment of the present invention, and FIG.
FIG. 3 is a waveform diagram of each part in the device shown in the figure. In the figure, 1 is a bar code, and 2 is an optical sensor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号の極大値および極小値をそれぞれ記憶
保持する２つの記憶回路と、上記２つの記憶回路
の出力を一定の割合で合成して得られるそれらの
中間値を弁別レベルとして前記入力信号を矩形波
に変換するコンパレータ回路と、上記矩形波の立
上がりまたは立下がり時点で前記記憶回路をリセ
ツトする回路とよりなるコンパレータ装置。 Two memory circuits each store and hold the maximum value and minimum value of the input signal, and the intermediate value obtained by combining the outputs of the two memory circuits at a constant rate is used as the discrimination level to convert the input signal into a rectangular waveform. A comparator device comprising: a comparator circuit for converting the rectangular wave into a square wave; and a circuit for resetting the memory circuit at the rising or falling point of the rectangular wave.
JP1386U 1986-01-06 1986-01-06 Pending JPS62112760U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1386U JPS62112760U (en) 1986-01-06 1986-01-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1386U JPS62112760U (en) 1986-01-06 1986-01-06

Publications (1)

Publication Number Publication Date
JPS62112760U true JPS62112760U (en) 1987-07-17

Family

ID=30776626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1386U Pending JPS62112760U (en) 1986-01-06 1986-01-06

Country Status (1)

Country Link
JP (1) JPS62112760U (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4949251A (en) * 1972-09-14 1974-05-13
JPS51129131A (en) * 1975-05-01 1976-11-10 Omron Tateisi Electronics Co Analog-digital conversion circuit
JPS55115168A (en) * 1979-02-21 1980-09-04 Ibm Signal transfer detector
JPS5644974A (en) * 1979-09-21 1981-04-24 Fujitsu Ltd Information read system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4949251A (en) * 1972-09-14 1974-05-13
JPS51129131A (en) * 1975-05-01 1976-11-10 Omron Tateisi Electronics Co Analog-digital conversion circuit
JPS55115168A (en) * 1979-02-21 1980-09-04 Ibm Signal transfer detector
JPS5644974A (en) * 1979-09-21 1981-04-24 Fujitsu Ltd Information read system

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