JPS62104243A - Multi-channel packet composing system - Google Patents

Abstract

PURPOSE:To attain the real time processing of packet composition at each channel by generating a transmission header corresponding to a channel during communication, adding it to a data extracted from a buffer at each prescribed period to constitute a packet. CONSTITUTION:A processor 1 sets identification information (b) in an identification information memory 3 corresponding to a channel number ch=i set to a call to logical '1'. After a transmission header hi is stored in the transmission header memory 4, a control section 7 references the identification information memory 3 periodically and when a channel number ch=i in which the identification information (b) is set to logical '1' is detected, a header addition circuit 5 adds the transmission header hi extracted from the memory 4 to the data di extracted from a packet composition buffer 2 to compose a data packet pdi. Thus, the assembling load of the data packet is eliminated from the processor 1 and the data packet requesting the real time of voice is composed.

Description

[Detailed Description of the Invention] [(Already required)] In a packet assembling device that accommodates a time-division multiplex transmission path, a transmission header is created in advance corresponding to the channel in communication, and a transmission header is created in advance at predetermined intervals. By configuring a packet by adding it to the data extracted from the data, it is possible to assemble packets for each channel in real time.

[Industrial application field]

The present invention relates to an improvement in a multi-channel packet assembly method in a packet assembly device for a time division multiplex transmission line.

When a packet-switched network accommodates non-packet-switched subscribers, an ffU setup is installed at the interface between the subscriber and the packet-switched network that assembles the data sent from the subscriber into packets and sends them to the packet-switched network. equipment is used.

When a non-packet format subscriber transmits data that requires real-time performance, such as voice, to a packet switching network via a time division multiplex transmission path, the packet assembling device It is required to have the ability to assemble data transmitted via each channel constituting a division multiplex transmission path into packets without impairing real-time performance.

[Conventional technology]

FIG. 3 is a diagram showing an example of a conventional multi-channel packet assembly method.

In FIG. 3, the time division multiplex transmission path has a 30 channel configuration.

In FIG. 3, a processor l executes call control such as route selection based on call control information rfvIC arriving from a subscriber (not shown), creates a call control bucket (pc), and sends it to a packet switching network (not shown). Send.

Subsequently, data d transmitted from the subscriber via each channel constituting the time division multiplex transmission path is sequentially stored in the first-in, first-out format packet assembly buffer 2 in correspondence with the channel number ch. In Figure 3.

, data d1 and d30 are stored corresponding to channel numbers ch=1 and 30 that are in a communication state, and invalid data dd is stored corresponding to a channel number ch=2 that is not in a communication state.

Processor 1 calculates each channel number ch=i (i is l
30 to 30, and the same applies hereinafter), each time the data cli stored corresponding to the data bucket) reaches a predetermined amount for assembling the data bucket) pdi, the header addition mechanism 11 creates a transmission header hi corresponding to channel i, and assembles the packet. A data packet pdi is assembled by adding data di extracted from the buffer 2 and transmitted to the packet switching network.

[Problem that the invention seeks to solve]

As is clear from the above description, in the conventional multi-channel packet assembly method, each time the processor 1 transmits data di of each channel, it sets an optimal route and sends the transmission header hi corresponding to the set route to the header. Since data packets PDI are created by the addition mechanism 11 and added to data di to assemble data packets PDI, as the multiplicity of the time division multiplex transmission path increases, the load on the processor 1 for assembling packets increases. There was a fear that it would be difficult to assemble packets that require high quality.

c.Means for solving problems] FIG. 1 is a diagram showing the principle of the present invention.

In FIG. 1, there is an identification information setting means lOO that sets identification information indicating whether or not each channel is in communication, and a transmission node h that is created when setting up a call via each channel. Transmission header storage means 200 stored in correspondence with each channel and identification information setting means 100 are used to add a transmission header h stored in the transmission header storage means 200 to the data arriving from each channel to create a packet. A header adding means 300 for assembling is provided.

[Effect]

Changing the transfer route of data packets belonging to one call each time is not necessarily desirable for communication that requires real-time performance such as voice, and rather the transfer route of data packets should be constant for each call. is desirable.

The present invention focuses on this point, and once a call is set up, a transmission header h corresponding to a certain transfer route is created and stored in the transmission header storage means 200, and data d arriving from the channel in progress is created. Since data packets are assembled by adding data to the data, it is possible to fully handle data that requires real-time performance such as voice.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a diagram illustrating a multi-channel packet assembly method according to an embodiment of the present invention. Note that the same reference numerals refer to the same objects throughout the plan. Further, the time division multiplex transmission line has a 30-channel configuration similar to that shown in FIG.

In FIG. 2, an identification information memory 3 is used as an identification information setting means (100), and a transmission header memory 4 is used as a transmission header storage means (200).
However, the header adding circuit 5 is used as the header adding means (300).
A control unit 7 is provided to control the identification information memory 3, the transmission soda memory 4, the header addition circuit 5, and the disposal circuit 6. Figure 3) has been removed.

In FIG. 2, all the channels constituting the time division multiplex transmission path are initially in a non-communication state, and all the identification information corresponding to each channel number ch in the identification information memory 3 is set to logic "0". ”.

In this state, as described above, the processor 1 executes call control such as route selection based on the call control information C arriving from a subscriber (not shown), creates a call control packet solution I-pc, and connects it to a packet switching network (not shown). Send to. When a call via channel i is set up and the transfer route for data packet 7) pdi is determined, processor 1 creates a transmission header hi to be added to data packet pdi, and sets the channel number ch= At the same time, the identification information corresponding to the channel number ch=i of the identification information memory 3 is stored in the area corresponding to i.
Set to . In FIG. 2, in the identification information memory 3, identification information corresponding to channel numbers ch=1 and 30 are set to logic "1", and identification information corresponding to channel number ch=2 is set to logic "O". ”, and the transmission soda memory 4 has the channel number ch=
Transmission headers h1 and h30 are stored in areas corresponding to numbers 1 and 30.

Subsequently, the data di transmitted from the subscriber via each channel is sequentially stored in the packet assembly buffer 2 in a first-in, first-out format in correspondence with the channel number ch, as described above. In Fig. 2, the channel number c in communication state is also
Data d1 and d3 corresponding to h = l and 30
Channel number ch where 0 is stored and is not in communication state h=2
Invalid data dd is stored corresponding to .

The control unit 7 controls each channel of the identification information memory 3 every cycle when the data di stored corresponding to each channel number ch=i of the packet assembly buffer 2 reaches a predetermined amount for assembling the data packet l-p di. When the identification information set corresponding to the number ch is sequentially referred to and a channel number ch set to logic "1" (for example, l) is detected, the channel number Ch in the transmission header memory 4 is set to 1. The transmission header h1 stored in the corresponding area is extracted and transmitted to the header addition circuit 5, and the channel number ch of the packet m stand-alone sofa 2 is extracted and transmitted to the header addition circuit 5.
The data d1 extracted from the =1 corresponding area is transmitted to the header addition circuit 5 without being discarded by the discard circuit 6. The header addition circuit 5 adds a transmission header h1 to the transmitted data d1, assembles a data packet pd1, and transmits it to the packet switching network. On the other hand, the channel number ch whose identification information is set to logic “0” (for example, 2
) is detected, the invalid data dd extracted from the area corresponding to channel number ch=2 of packet 3 and buffer 2 is
It is discarded by the discard circuit 6.

As is clear from the above description, according to the present embodiment, the processor 1 sets the identification/InfD b in the identification information memory 3 to the logical "
After setting the identification information to logic "l" and storing the transmission soda hi in the transmission header memory 4, the control unit 7 periodically refers to the identification information memory 3 and sets the identification information to logic "l". When channel number ch=i is detected, the header addition circuit 5 sends the packet assembling buffer 2
The transmission header hi extracted from the transmission header memory 4 is added to the data di extracted from the transmission header memory 4.
Since the processor 1 assembles the data packet (data bucket) PDI, the load of assembling data packets is removed from the processor 1, and it becomes possible to assemble data packets that require real-time performance such as voice.

Note that FIG. 2 is only one embodiment of the present invention, and for example, the time division multiplex transmission line is not limited to a 30-channel configuration (channel numbers ch=l to 30), but may have a 24-channel or 120-channel configuration. Many other modifications may be considered in addition to the configuration, but the effects of the present invention remain the same in any case.

〔Effect of the invention〕

As described above, according to the present invention, in the packet assembly device, packet assembly for each channel of a multiplex transmission path can be processed in real time, and it is also possible to fully handle data that requires real time, such as voice. .

[Brief explanation of drawings]

FIG. 1 is a diagram showing the principle of the present invention, FIG. 2 is a diagram showing a multi-channel packet assembly method according to an embodiment of the present invention, and FIG.
The figure shows an example of a conventional multi-channel packet assembly method. In the figure, 1 is a processor, 2 is a packet assembly buffer, 3 is an identification information memory, 4 is a transmission header memory, 5 is a header addition circuit, 6 is a discard circuit, 7 is a control unit, 11 is a header addition mechanism, and b is an identification information, C is call control information, ch is channel number, d is data, dd is invalid data, h is transmission header, pci is call control packet. le+tneIL//the7. ．． t-,=
1L Horokuno'ban 2.1\ll Company←Ryoaroi Chaornozo Muto 4 Sho Cube - Inu No. 3I
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Claims (1)

[Claims] In a packet assembling device that assembles and transmits data arriving from each channel constituting a time division multiplex transmission path into packets, identification information (b) is set that indicates whether each channel is in communication. an identification information setting means (100); a transmission header storage means (200) for storing a transmission header (h) created when a call is set up via each of the channels, corresponding to each of the channels; header addition means (300) that assembles a packet by adding a transmission header (h) stored in the transmission header storage means (200) to the data arriving from each channel with reference to the identification information setting means (100); ).